| 1 | /*
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| 2 | * Copyright (c) 2012 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /**
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| 30 | * @defgroup root_amdm37x TI AM/DM37x platform driver.
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| 31 | * @brief HelenOS TI AM/DM37x platform driver.
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| 32 | * @{
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| 33 | */
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| 34 |
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| 35 | /** @file
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| 36 | */
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| 37 | #define _DDF_DATA_IMPLANT
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| 38 |
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| 39 | #define DEBUG_CM
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| 40 |
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| 41 | #include <ddf/driver.h>
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| 42 | #include <ddf/log.h>
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| 43 | #include <errno.h>
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| 44 | #include <ops/hw_res.h>
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| 45 | #include <stdio.h>
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| 46 | #include <ddi.h>
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| 47 |
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| 48 | #include "uhh.h"
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| 49 | #include "usbtll.h"
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| 50 | #include "cm/core.h"
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| 51 | #include "cm/clock_control.h"
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| 52 | #include "cm/usbhost.h"
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| 53 |
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| 54 | #define NAME "rootamdm37x"
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| 55 |
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| 56 | typedef struct {
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| 57 | uhh_regs_t *uhh;
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| 58 | tll_regs_t *tll;
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| 59 | struct {
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| 60 | core_cm_regs_t *core;
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| 61 | clock_control_cm_regs_t *clocks;
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| 62 | usbhost_cm_regs_t *usbhost;
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| 63 | } cm;
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| 64 | } amdm37x_t;
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| 65 |
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| 66 | #ifdef DEBUG_CM
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| 67 | static void log(volatile void *place, uint32_t val, volatile void* base, size_t size, void *data, bool write)
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| 68 | {
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| 69 | printf("PIO %s: %p(%p) %#"PRIx32"\n", write ? "WRITE" : "READ",
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| 70 | (place - base) + data, place, val);
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| 71 | }
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| 72 | #endif
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| 73 |
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| 74 | static int amdm37x_hw_access_init(amdm37x_t *device)
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| 75 | {
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| 76 | assert(device);
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| 77 | int ret = EOK;
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| 78 |
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| 79 | ret = pio_enable((void*)USBHOST_CM_BASE_ADDRESS, USBHOST_CM_SIZE,
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| 80 | (void**)&device->cm.usbhost);
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| 81 | if (ret != EOK)
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| 82 | return ret;
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| 83 |
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| 84 | ret = pio_enable((void*)CORE_CM_BASE_ADDRESS, CORE_CM_SIZE,
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| 85 | (void**)&device->cm.core);
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| 86 | if (ret != EOK)
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| 87 | return ret;
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| 88 |
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| 89 | ret = pio_enable((void*)CLOCK_CONTROL_CM_BASE_ADDRESS,
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| 90 | CLOCK_CONTROL_CM_SIZE, (void**)&device->cm.clocks);
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| 91 | if (ret != EOK)
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| 92 | return ret;
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| 93 |
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| 94 | ret = pio_enable((void*)AMDM37x_USBTLL_BASE_ADDRESS,
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| 95 | AMDM37x_USBTLL_SIZE, (void**)&device->tll);
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| 96 | if (ret != EOK)
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| 97 | return ret;
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| 98 |
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| 99 | ret = pio_enable((void*)AMDM37x_UHH_BASE_ADDRESS,
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| 100 | AMDM37x_UHH_SIZE, (void**)&device->uhh);
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| 101 | if (ret != EOK)
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| 102 | return ret;
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| 103 |
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| 104 | #ifdef DEBUG_CM
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| 105 | pio_trace_enable(device->tll, AMDM37x_USBTLL_SIZE, log, (void*)AMDM37x_USBTLL_BASE_ADDRESS);
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| 106 | pio_trace_enable(device->cm.clocks, CLOCK_CONTROL_CM_SIZE, log, (void*)CLOCK_CONTROL_CM_BASE_ADDRESS);
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| 107 | pio_trace_enable(device->cm.core, CORE_CM_SIZE, log, (void*)CORE_CM_BASE_ADDRESS);
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| 108 | pio_trace_enable(device->cm.usbhost, USBHOST_CM_SIZE, log, (void*)USBHOST_CM_BASE_ADDRESS);
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| 109 | pio_trace_enable(device->uhh, AMDM37x_UHH_SIZE, log, (void*)AMDM37x_UHH_BASE_ADDRESS);
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| 110 | #endif
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| 111 | return EOK;
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| 112 | }
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| 113 |
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| 114 | static int usb_clocks(amdm37x_t *device, bool on)
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| 115 | {
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| 116 | /* Set DPLL3 to automatic */
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| 117 | pio_change_32(&device->cm.clocks->autoidle_pll,
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| 118 | CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_CORE_DPLL_AUTOMATIC,
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| 119 | CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_CORE_DPLL_MASK, 5);
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| 120 |
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| 121 | /* Set DPLL4 to automatic */
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| 122 | pio_change_32(&device->cm.clocks->autoidle_pll,
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| 123 | CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_PERIPH_DPLL_AUTOMATIC,
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| 124 | CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_PERIPH_DPLL_MASK, 5);
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| 125 |
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| 126 | /* Set DPLL5 to automatic */
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| 127 | pio_change_32(&device->cm.clocks->autoidle2_pll,
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| 128 | CLOCK_CONTROL_CM_AUTOIDLE2_PLL_AUTO_PERIPH2_DPLL_AUTOMATIC,
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| 129 | CLOCK_CONTROL_CM_AUTOIDLE2_PLL_AUTO_PERIPH2_DPLL_MASK, 5);
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| 130 |
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| 131 |
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| 132 | #ifdef DEBUG_CM
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| 133 | printf("DPLL5 could be on: %"PRIx32" %"PRIx32".\n",
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| 134 | pio_read_32((ioport32_t*)&device->cm.clocks->idlest_ckgen),
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| 135 | pio_read_32((ioport32_t*)&device->cm.clocks->idlest2_ckgen));
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| 136 | #endif
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| 137 |
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| 138 | if (on) {
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| 139 | /* Enable interface and function clock for USB TLL */
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| 140 | pio_set_32(&device->cm.core->fclken3,
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| 141 | CORE_CM_FCLKEN3_EN_USBTLL_FLAG, 5);
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| 142 | pio_set_32(&device->cm.core->iclken3,
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| 143 | CORE_CM_ICLKEN3_EN_USBTLL_FLAG, 5);
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| 144 |
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| 145 | /* Enable interface and function clock for USB hosts */
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| 146 | pio_set_32(&device->cm.usbhost->fclken,
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| 147 | USBHOST_CM_FCLKEN_EN_USBHOST1_FLAG |
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| 148 | USBHOST_CM_FCLKEN_EN_USBHOST2_FLAG, 5);
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| 149 | pio_set_32(&device->cm.usbhost->iclken,
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| 150 | USBHOST_CM_ICLKEN_EN_USBHOST, 5);
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| 151 | #ifdef DEBUG_CM
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| 152 | printf("DPLL5 (and everything else) should be on: %"PRIx32" %"PRIx32".\n",
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| 153 | pio_read_32((ioport32_t*)&device->cm.clocks->idlest_ckgen),
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| 154 | pio_read_32((ioport32_t*)&device->cm.clocks->idlest2_ckgen));
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| 155 | #endif
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| 156 | } else {
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| 157 | /* Disable interface and function clock for USB hosts */
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| 158 | pio_clear_32(&device->cm.usbhost->iclken,
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| 159 | USBHOST_CM_ICLKEN_EN_USBHOST, 5);
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| 160 | pio_clear_32(&device->cm.usbhost->fclken,
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| 161 | USBHOST_CM_FCLKEN_EN_USBHOST1_FLAG |
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| 162 | USBHOST_CM_FCLKEN_EN_USBHOST2_FLAG, 5);
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| 163 |
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| 164 | /* Disable interface and function clock for USB TLL */
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| 165 | pio_clear_32(&device->cm.core->iclken3,
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| 166 | CORE_CM_ICLKEN3_EN_USBTLL_FLAG, 5);
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| 167 | pio_clear_32(&device->cm.core->fclken3,
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| 168 | CORE_CM_FCLKEN3_EN_USBTLL_FLAG, 5);
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| 169 | }
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| 170 |
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| 171 | return EOK;
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| 172 | }
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| 173 |
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| 174 | /** Initialize USB TLL port connections.
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| 175 | *
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| 176 | * Different modes are on page 3312 of the Manual Figure 22-34.
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| 177 | * Select mode than can operate in FS/LS.
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| 178 | */
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| 179 | static int usb_tll_init(amdm37x_t *device)
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| 180 | {
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| 181 |
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| 182 | /* Reset USB TLL */
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| 183 | pio_set_32(&device->tll->sysconfig, TLL_SYSCONFIG_SOFTRESET_FLAG, 5);
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| 184 | ddf_msg(LVL_DEBUG2, "Waiting for USB TLL reset");
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| 185 | while (!(pio_read_32(&device->tll->sysstatus) & TLL_SYSSTATUS_RESET_DONE_FLAG));
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| 186 | ddf_msg(LVL_DEBUG, "USB TLL Reset done.");
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| 187 |
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| 188 | /* Setup idle mode (smart idle) */
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| 189 | pio_change_32(&device->tll->sysconfig,
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| 190 | TLL_SYSCONFIG_CLOCKACTIVITY_FLAG | TLL_SYSCONFIG_AUTOIDLE_FLAG |
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| 191 | TLL_SYSCONFIG_SIDLE_MODE_SMART, TLL_SYSCONFIG_SIDLE_MODE_MASK, 5);
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| 192 |
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| 193 | /* Smart idle for UHH */
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| 194 | pio_change_32(&device->uhh->sysconfig,
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| 195 | UHH_SYSCONFIG_CLOCKACTIVITY_FLAG | UHH_SYSCONFIG_AUTOIDLE_FLAG |
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| 196 | UHH_SYSCONFIG_SIDLE_MODE_SMART, UHH_SYSCONFIG_SIDLE_MODE_MASK, 5);
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| 197 |
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| 198 | /* Set all ports to go through TLL(UTMI)
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| 199 | * Direct connection can only work in HS mode */
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| 200 | pio_set_32(&device->uhh->hostconfig,
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| 201 | UHH_HOSTCONFIG_P1_ULPI_BYPASS_FLAG |
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| 202 | UHH_HOSTCONFIG_P2_ULPI_BYPASS_FLAG |
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| 203 | UHH_HOSTCONFIG_P3_ULPI_BYPASS_FLAG, 5);
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| 204 |
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| 205 | /* What is this? */
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| 206 | pio_set_32(&device->tll->shared_conf, TLL_SHARED_CONF_FCLK_IS_ON_FLAG, 5);
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| 207 |
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| 208 | for (unsigned i = 0; i < 3; ++i) {
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| 209 | /* Serial mode is the only one capable of FS/LS operation.
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| 210 | * Select FS/LS mode, no idea what the difference is
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| 211 | * one of bidirectional modes might be good choice
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| 212 | * 2 = 3pin bidi phy. */
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| 213 | pio_change_32(&device->tll->channel_conf[i],
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| 214 | TLL_CHANNEL_CONF_CHANMODE_UTMI_SERIAL_MODE |
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| 215 | TLL_CHANNEL_CONF_FSLSMODE_3PIN_BIDI_PHY,
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| 216 | TLL_CHANNEL_CONF_CHANMODE_MASK |
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| 217 | TLL_CHANNEL_CONF_FSLSMODE_MASK, 5);
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| 218 | }
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| 219 | return EOK;
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| 220 | }
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| 221 |
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| 222 | typedef struct {
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| 223 | hw_resource_list_t hw_resources;
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| 224 | } rootamdm37x_fun_t;
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| 225 |
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| 226 | #define OHCI_BASE_ADDRESS 0x48064400
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| 227 | #define OHCI_SIZE 1024
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| 228 | #define EHCI_BASE_ADDRESS 0x48064800
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| 229 | #define EHCI_SIZE 1024
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| 230 |
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| 231 | static hw_resource_t ohci_res[] = {
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| 232 | {
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| 233 | .type = MEM_RANGE,
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| 234 | /* See amdm37x TRM page. 3316 for these values */
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| 235 | .res.io_range = {
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| 236 | .address = OHCI_BASE_ADDRESS,
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| 237 | .size = OHCI_SIZE,
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| 238 | .endianness = LITTLE_ENDIAN
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| 239 | },
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| 240 | },
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| 241 | {
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| 242 | .type = INTERRUPT,
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| 243 | .res.interrupt = { .irq = 76 },
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| 244 | },
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| 245 | };
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| 246 |
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| 247 | static const rootamdm37x_fun_t ohci = {
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| 248 | .hw_resources = {
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| 249 | .resources = ohci_res,
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| 250 | .count = sizeof(ohci_res)/sizeof(ohci_res[0]),
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| 251 | }
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| 252 | };
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| 253 |
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| 254 | static hw_resource_t ehci_res[] = {
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| 255 | {
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| 256 | .type = MEM_RANGE,
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| 257 | /* See amdm37x TRM page. 3316 for these values */
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| 258 | .res.io_range = {
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| 259 | .address = EHCI_BASE_ADDRESS,
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| 260 | .size = EHCI_SIZE,
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| 261 | .endianness = LITTLE_ENDIAN
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| 262 | },
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| 263 | },
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| 264 | {
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| 265 | .type = INTERRUPT,
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| 266 | .res.interrupt = { .irq = 77 },
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| 267 | },
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| 268 | };
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| 269 |
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| 270 | static const rootamdm37x_fun_t ehci = {
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| 271 | .hw_resources = {
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| 272 | .resources = ehci_res,
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| 273 | .count = sizeof(ehci_res) / sizeof(ehci_res[0]),
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| 274 | }
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| 275 | };
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| 276 |
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| 277 | static hw_resource_list_t *rootamdm37x_get_resources(ddf_fun_t *fnode);
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| 278 | static bool rootamdm37x_enable_interrupt(ddf_fun_t *fun);
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| 279 |
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| 280 | static hw_res_ops_t fun_hw_res_ops = {
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| 281 | .get_resource_list = &rootamdm37x_get_resources,
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| 282 | .enable_interrupt = &rootamdm37x_enable_interrupt,
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| 283 | };
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| 284 |
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| 285 | static ddf_dev_ops_t rootamdm37x_fun_ops =
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| 286 | {
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| 287 | .interfaces[HW_RES_DEV_IFACE] = &fun_hw_res_ops
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| 288 | };
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| 289 |
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| 290 | static bool rootamdm37x_add_fun(ddf_dev_t *dev, const char *name,
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| 291 | const char *str_match_id, const rootamdm37x_fun_t *fun)
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| 292 | {
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| 293 | ddf_msg(LVL_DEBUG, "Adding new function '%s'.", name);
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| 294 |
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| 295 | /* Create new device function. */
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| 296 | ddf_fun_t *fnode = ddf_fun_create(dev, fun_inner, name);
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| 297 | if (fnode == NULL)
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| 298 | return ENOMEM;
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| 299 |
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| 300 |
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| 301 | /* Add match id */
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| 302 | if (ddf_fun_add_match_id(fnode, str_match_id, 100) != EOK) {
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| 303 | ddf_fun_destroy(fnode);
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| 304 | return false;
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| 305 | }
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| 306 |
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| 307 | /* Set provided operations to the device. */
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| 308 | ddf_fun_data_implant(fnode, (void*)fun);
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| 309 | ddf_fun_set_ops(fnode, &rootamdm37x_fun_ops);
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| 310 |
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| 311 | /* Register function. */
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| 312 | if (ddf_fun_bind(fnode) != EOK) {
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| 313 | ddf_msg(LVL_ERROR, "Failed binding function %s.", name);
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| 314 | // TODO This will try to free our data!
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| 315 | ddf_fun_destroy(fnode);
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| 316 | return false;
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| 317 | }
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| 318 |
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| 319 | return true;
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| 320 | }
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| 321 |
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| 322 | /** Add the root device.
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| 323 | *
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| 324 | * @param dev Device which is root of the whole device tree
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| 325 | * (both of HW and pseudo devices).
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| 326 | *
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| 327 | * @return Zero on success, negative error number otherwise.
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| 328 | *
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| 329 | */
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| 330 | static int rootamdm37x_dev_add(ddf_dev_t *dev)
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| 331 | {
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| 332 | assert(dev);
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| 333 | amdm37x_t *device = ddf_dev_data_alloc(dev, sizeof(amdm37x_t));
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| 334 | if (!device)
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| 335 | return ENOMEM;
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| 336 | int ret = amdm37x_hw_access_init(device);
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| 337 | if (ret != EOK) {
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| 338 | ddf_msg(LVL_FATAL, "Failed to setup hw access!.\n");
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| 339 | return ret;
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| 340 | }
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| 341 |
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| 342 | ret = usb_clocks(device, true);
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| 343 | if (ret != EOK) {
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| 344 | ddf_msg(LVL_FATAL, "Failed to enable USB HC clocks!.\n");
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| 345 | return ret;
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| 346 | }
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| 347 |
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| 348 | ret = usb_tll_init(device);
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| 349 | if (ret != EOK) {
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| 350 | ddf_msg(LVL_FATAL, "Failed to init USB TLL!.\n");
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| 351 | usb_clocks(device, false);
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| 352 | return ret;
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| 353 | }
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| 354 |
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| 355 | /* Register functions */
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| 356 | if (!rootamdm37x_add_fun(dev, "ohci", "usb/host=ohci", &ohci))
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| 357 | ddf_msg(LVL_ERROR, "Failed to add OHCI function for "
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| 358 | "BeagleBoard-xM platform.");
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| 359 | if (!rootamdm37x_add_fun(dev, "ehci", "usb/host=ehci", &ehci))
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| 360 | ddf_msg(LVL_ERROR, "Failed to add EHCI function for "
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| 361 | "BeagleBoard-xM platform.");
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| 362 |
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| 363 | return EOK;
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| 364 | }
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| 365 |
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| 366 | /** The root device driver's standard operations. */
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| 367 | static driver_ops_t rootamdm37x_ops = {
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| 368 | .dev_add = &rootamdm37x_dev_add
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| 369 | };
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| 370 |
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| 371 | /** The root device driver structure. */
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| 372 | static driver_t rootamdm37x_driver = {
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| 373 | .name = NAME,
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| 374 | .driver_ops = &rootamdm37x_ops
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| 375 | };
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| 376 |
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| 377 | static hw_resource_list_t *rootamdm37x_get_resources(ddf_fun_t *fnode)
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| 378 | {
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| 379 | rootamdm37x_fun_t *fun = ddf_fun_data_get(fnode);
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| 380 | assert(fun != NULL);
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| 381 | return &fun->hw_resources;
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| 382 | }
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| 383 |
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| 384 | static bool rootamdm37x_enable_interrupt(ddf_fun_t *fun)
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| 385 | {
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| 386 | /* TODO */
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| 387 | return false;
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| 388 | }
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| 389 |
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| 390 | int main(int argc, char *argv[])
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| 391 | {
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| 392 | printf("%s: HelenOS AM/DM37x(OMAP37x) platform driver\n", NAME);
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| 393 | ddf_log_init(NAME);
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| 394 | return ddf_driver_main(&rootamdm37x_driver);
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| 395 | }
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| 396 |
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| 397 | /**
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| 398 | * @}
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| 399 | */
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