source: mainline/uspace/drv/char/pl050/pl050_hw.h

Last change on this file was 8d2dd7f2, checked in by Jakub Jermar <jakub@…>, 8 years ago

Reduce the number of files that include <sys/types.h>

  • Property mode set to 100644
File size: 2.6 KB
Line 
1/*
2 * Copyright (c) 2009 Vineeth Pillai
3 * Copyright (c) 2014 Jiri Svoboda
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup pl050
31 * @{
32 */
33/** @file ARM PrimeCell PS2 Keyboard/Mouse Interface (PL050) registers
34 */
35
36#ifndef PL050_HW_H
37#define PL050_HW_H
38
39#include <stdint.h>
40
41typedef struct {
42 /** Control register */
43 uint8_t cr;
44 /** Padding */
45 uint8_t pad1[3];
46 /** Status register */
47 uint8_t stat;
48 /** Padding */
49 uint8_t pad5[3];
50 /** Received data */
51 uint8_t data;
52 /** Padding */
53 uint8_t pad9[3];
54 /** Clock divisor */
55 uint8_t clkdiv;
56 /** Padding */
57 uint8_t pad13[3];
58 /** Interrupt status register */
59 uint8_t ir;
60 /** Padding */
61 uint8_t pad17[3];
62} kmi_regs_t;
63
64typedef enum {
65 /** 0 = PS2 mode, 1 = No line control bit mode */
66 kmi_cr_type = 5,
67 /** Enable receiver interrupt */
68 kmi_cr_rxintr = 4,
69 /** Enable transmitter interrupt */
70 kmi_cr_txintr = 3,
71 /** Enable PrimeCell KMI */
72 kmi_cr_enable = 2,
73 /** Force KMI data LOW */
74 kmi_cr_forcedata = 1,
75 /** Force KMI clock LOW */
76 kmi_cr_forceclock = 0
77} kmi_cr_bits_t;
78
79typedef enum {
80 kmi_stat_txempty = 6,
81 kmi_stat_txbusy = 5,
82 kmi_stat_rxfull = 4,
83 kmi_stat_rxbusy = 3,
84 kmi_stat_rxparity = 2,
85 kmi_stat_clkin = 1,
86 kmi_stat_datain = 0
87} kmi_stat_bits_t;
88
89#endif
90
91/** @}
92 */
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