| 1 | /*
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| 2 | * Copyright (c) 2006 Josef Cejka
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| 3 | * Copyright (c) 2011 Jiri Svoboda
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| 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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| 30 | /** @file
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| 31 | * @brief Msim console driver.
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| 32 | */
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| 33 |
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| 34 | #include <async.h>
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| 35 | #include <ddf/driver.h>
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| 36 | #include <ddf/log.h>
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| 37 | #include <ddi.h>
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| 38 | #include <errno.h>
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| 39 | #include <io/chardev_srv.h>
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| 40 |
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| 41 | #include "msim-con.h"
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| 42 |
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| 43 | static void msim_con_connection(ipc_call_t *, void *);
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| 44 |
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| 45 | static errno_t msim_con_read(chardev_srv_t *, void *, size_t, size_t *);
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| 46 | static errno_t msim_con_write(chardev_srv_t *, const void *, size_t, size_t *);
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| 47 |
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| 48 | static chardev_ops_t msim_con_chardev_ops = {
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| 49 | .read = msim_con_read,
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| 50 | .write = msim_con_write
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| 51 | };
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| 52 |
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| 53 | static irq_cmd_t msim_cmds_proto[] = {
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| 54 | {
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| 55 | .cmd = CMD_PIO_READ_8,
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| 56 | .addr = (void *) 0, /* will be patched in run-time */
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| 57 | .dstarg = 2
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| 58 | },
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| 59 | {
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| 60 | .cmd = CMD_ACCEPT
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| 61 | }
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| 62 | };
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| 63 |
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| 64 | static void msim_irq_handler(ipc_call_t *call, void *arg)
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| 65 | {
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| 66 | msim_con_t *con = (msim_con_t *) arg;
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| 67 | uint8_t c;
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| 68 | errno_t rc;
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| 69 |
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| 70 | fibril_mutex_lock(&con->buf_lock);
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| 71 |
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| 72 | c = IPC_GET_ARG2(*call);
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| 73 | rc = circ_buf_push(&con->cbuf, &c);
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| 74 | if (rc != EOK)
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| 75 | ddf_msg(LVL_ERROR, "Buffer overrun");
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| 76 |
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| 77 | fibril_mutex_unlock(&con->buf_lock);
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| 78 | fibril_condvar_broadcast(&con->buf_cv);
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| 79 | }
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| 80 |
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| 81 | /** Add msim console device. */
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| 82 | errno_t msim_con_add(msim_con_t *con, msim_con_res_t *res)
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| 83 | {
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| 84 | ddf_fun_t *fun = NULL;
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| 85 | irq_cmd_t *msim_cmds = NULL;
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| 86 | errno_t rc;
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| 87 |
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| 88 | circ_buf_init(&con->cbuf, con->buf, msim_con_buf_size, 1);
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| 89 | fibril_mutex_initialize(&con->buf_lock);
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| 90 | fibril_condvar_initialize(&con->buf_cv);
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| 91 |
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| 92 | con->irq_handle = CAP_NIL;
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| 93 |
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| 94 | msim_cmds = malloc(sizeof(msim_cmds_proto));
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| 95 | if (msim_cmds == NULL) {
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| 96 | rc = ENOMEM;
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| 97 | goto error;
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| 98 | }
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| 99 |
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| 100 | con->res = *res;
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| 101 |
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| 102 | fun = ddf_fun_create(con->dev, fun_exposed, "a");
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| 103 | if (fun == NULL) {
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| 104 | ddf_msg(LVL_ERROR, "Error creating function 'a'.");
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| 105 | rc = ENOMEM;
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| 106 | goto error;
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| 107 | }
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| 108 |
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| 109 | rc = pio_enable((void *)res->base, 1, (void **) &con->out_reg);
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| 110 | if (rc != EOK) {
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| 111 | ddf_msg(LVL_ERROR, "Error enabling I/O");
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| 112 | goto error;
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| 113 | }
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| 114 |
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| 115 | ddf_fun_set_conn_handler(fun, msim_con_connection);
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| 116 |
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| 117 | con->irq_range[0].base = res->base;
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| 118 | con->irq_range[0].size = 1;
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| 119 |
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| 120 | memcpy(msim_cmds, msim_cmds_proto, sizeof(msim_cmds_proto));
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| 121 | msim_cmds[0].addr = (void *) res->base;
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| 122 |
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| 123 | con->irq_code.rangecount = 1;
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| 124 | con->irq_code.ranges = con->irq_range;
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| 125 | con->irq_code.cmdcount = sizeof(msim_cmds_proto) / sizeof(irq_cmd_t);
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| 126 | con->irq_code.cmds = msim_cmds;
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| 127 |
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| 128 | rc = async_irq_subscribe(res->irq, msim_irq_handler, con,
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| 129 | &con->irq_code, &con->irq_handle);
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| 130 | if (rc != EOK) {
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| 131 | ddf_msg(LVL_ERROR, "Error registering IRQ code.");
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| 132 | goto error;
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| 133 | }
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| 134 |
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| 135 | chardev_srvs_init(&con->cds);
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| 136 | con->cds.ops = &msim_con_chardev_ops;
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| 137 | con->cds.sarg = con;
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| 138 |
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| 139 | rc = ddf_fun_bind(fun);
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| 140 | if (rc != EOK) {
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| 141 | ddf_msg(LVL_ERROR, "Error binding function 'a'.");
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| 142 | goto error;
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| 143 | }
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| 144 |
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| 145 | ddf_fun_add_to_category(fun, "console");
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| 146 |
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| 147 | return EOK;
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| 148 | error:
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| 149 | if (CAP_HANDLE_VALID(con->irq_handle))
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| 150 | async_irq_unsubscribe(con->irq_handle);
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| 151 | if (fun != NULL)
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| 152 | ddf_fun_destroy(fun);
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| 153 | free(msim_cmds);
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| 154 |
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| 155 | return rc;
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| 156 | }
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| 157 |
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| 158 | /** Remove msim console device */
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| 159 | errno_t msim_con_remove(msim_con_t *con)
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| 160 | {
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| 161 | return ENOTSUP;
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| 162 | }
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| 163 |
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| 164 | /** Msim console device gone */
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| 165 | errno_t msim_con_gone(msim_con_t *con)
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| 166 | {
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| 167 | return ENOTSUP;
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| 168 | }
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| 169 |
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| 170 | static void msim_con_putchar(msim_con_t *con, uint8_t ch)
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| 171 | {
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| 172 | pio_write_8(con->out_reg, ch);
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| 173 | }
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| 174 |
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| 175 | /** Read from msim console device */
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| 176 | static errno_t msim_con_read(chardev_srv_t *srv, void *buf, size_t size,
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| 177 | size_t *nread)
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| 178 | {
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| 179 | msim_con_t *con = (msim_con_t *) srv->srvs->sarg;
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| 180 | size_t p;
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| 181 | uint8_t *bp = (uint8_t *) buf;
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| 182 | errno_t rc;
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| 183 |
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| 184 | fibril_mutex_lock(&con->buf_lock);
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| 185 |
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| 186 | while (circ_buf_nused(&con->cbuf) == 0)
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| 187 | fibril_condvar_wait(&con->buf_cv, &con->buf_lock);
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| 188 |
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| 189 | p = 0;
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| 190 | while (p < size) {
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| 191 | rc = circ_buf_pop(&con->cbuf, &bp[p]);
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| 192 | if (rc != EOK)
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| 193 | break;
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| 194 | ++p;
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| 195 | }
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| 196 |
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| 197 | fibril_mutex_unlock(&con->buf_lock);
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| 198 |
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| 199 | *nread = p;
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| 200 | return EOK;
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| 201 | }
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| 202 |
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| 203 | /** Write to msim console device */
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| 204 | static errno_t msim_con_write(chardev_srv_t *srv, const void *data, size_t size,
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| 205 | size_t *nwr)
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| 206 | {
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| 207 | msim_con_t *con = (msim_con_t *) srv->srvs->sarg;
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| 208 | size_t i;
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| 209 | uint8_t *dp = (uint8_t *) data;
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| 210 |
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| 211 | for (i = 0; i < size; i++)
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| 212 | msim_con_putchar(con, dp[i]);
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| 213 |
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| 214 | *nwr = size;
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| 215 | return EOK;
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| 216 | }
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| 217 |
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| 218 | /** Character device connection handler. */
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| 219 | static void msim_con_connection(ipc_call_t *icall, void *arg)
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| 220 | {
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| 221 | msim_con_t *con = (msim_con_t *) ddf_dev_data_get(
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| 222 | ddf_fun_get_dev((ddf_fun_t *) arg));
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| 223 |
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| 224 | chardev_conn(icall, &con->cds);
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| 225 | }
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| 226 |
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| 227 | /** @}
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| 228 | */
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