| 1 | /* | 
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| 2 | * Copyright (c) 2001-2004 Jakub Jermar | 
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| 3 | * Copyright (c) 2006 Josef Cejka | 
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| 4 | * Copyright (c) 2017 Jiri Svoboda | 
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| 5 | * Copyright (c) 2011 Jan Vesely | 
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| 6 | * All rights reserved. | 
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| 7 | * | 
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| 8 | * Redistribution and use in source and binary forms, with or without | 
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| 9 | * modification, are permitted provided that the following conditions | 
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| 10 | * are met: | 
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| 11 | * | 
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| 12 | * - Redistributions of source code must retain the above copyright | 
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| 13 | *   notice, this list of conditions and the following disclaimer. | 
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| 14 | * - Redistributions in binary form must reproduce the above copyright | 
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| 15 | *   notice, this list of conditions and the following disclaimer in the | 
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| 16 | *   documentation and/or other materials provided with the distribution. | 
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| 17 | * - The name of the author may not be used to endorse or promote products | 
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| 18 | *   derived from this software without specific prior written permission. | 
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| 19 | * | 
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| 20 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 
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| 21 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 
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| 22 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 
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| 23 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 
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| 24 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 
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| 25 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | 
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| 26 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | 
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| 27 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 
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| 28 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 
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| 29 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 
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| 30 | */ | 
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| 31 |  | 
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| 32 | /** @addtogroup kbd_port | 
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| 33 | * @ingroup kbd | 
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| 34 | * @{ | 
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| 35 | */ | 
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| 36 |  | 
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| 37 | /** @file | 
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| 38 | * @brief i8042 PS/2 port driver. | 
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| 39 | */ | 
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| 40 |  | 
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| 41 | #include <adt/circ_buf.h> | 
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| 42 | #include <ddf/log.h> | 
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| 43 | #include <ddf/interrupt.h> | 
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| 44 | #include <ddi.h> | 
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| 45 | #include <device/hw_res.h> | 
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| 46 | #include <errno.h> | 
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| 47 | #include <str_error.h> | 
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| 48 | #include <inttypes.h> | 
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| 49 | #include <io/chardev_srv.h> | 
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| 50 |  | 
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| 51 | #include "i8042.h" | 
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| 52 |  | 
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| 53 | /* Interesting bits for status register */ | 
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| 54 | #define i8042_OUTPUT_FULL  0x01 | 
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| 55 | #define i8042_INPUT_FULL   0x02 | 
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| 56 | #define i8042_AUX_DATA     0x20 | 
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| 57 |  | 
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| 58 | /* Command constants */ | 
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| 59 | #define i8042_CMD_WRITE_CMDB  0x60  /**< Write command byte */ | 
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| 60 | #define i8042_CMD_WRITE_AUX   0xd4  /**< Write aux device */ | 
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| 61 |  | 
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| 62 | /* Command byte fields */ | 
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| 63 | #define i8042_KBD_IE         0x01 | 
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| 64 | #define i8042_AUX_IE         0x02 | 
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| 65 | #define i8042_KBD_DISABLE    0x10 | 
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| 66 | #define i8042_AUX_DISABLE    0x20 | 
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| 67 | #define i8042_KBD_TRANSLATE  0x40  /* Use this to switch to XT scancodes */ | 
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| 68 |  | 
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| 69 | static void i8042_char_conn(ipc_call_t *, void *); | 
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| 70 | static errno_t i8042_read(chardev_srv_t *, void *, size_t, size_t *); | 
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| 71 | static errno_t i8042_write(chardev_srv_t *, const void *, size_t, size_t *); | 
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| 72 |  | 
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| 73 | static chardev_ops_t i8042_chardev_ops = { | 
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| 74 | .read = i8042_read, | 
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| 75 | .write = i8042_write | 
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| 76 | }; | 
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| 77 |  | 
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| 78 | static const irq_pio_range_t i8042_ranges[] = { | 
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| 79 | { | 
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| 80 | .base = 0, | 
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| 81 | .size = sizeof(i8042_regs_t) | 
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| 82 | } | 
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| 83 | }; | 
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| 84 |  | 
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| 85 | /** i8042 Interrupt pseudo-code. */ | 
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| 86 | static const irq_cmd_t i8042_cmds[] = { | 
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| 87 | { | 
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| 88 | .cmd = CMD_PIO_READ_8, | 
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| 89 | .addr = NULL,  /* will be patched in run-time */ | 
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| 90 | .dstarg = 1 | 
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| 91 | }, | 
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| 92 | { | 
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| 93 | .cmd = CMD_AND, | 
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| 94 | .value = i8042_OUTPUT_FULL, | 
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| 95 | .srcarg = 1, | 
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| 96 | .dstarg = 3 | 
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| 97 | }, | 
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| 98 | { | 
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| 99 | .cmd = CMD_PREDICATE, | 
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| 100 | .value = 2, | 
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| 101 | .srcarg = 3 | 
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| 102 | }, | 
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| 103 | { | 
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| 104 | .cmd = CMD_PIO_READ_8, | 
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| 105 | .addr = NULL,  /* will be patched in run-time */ | 
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| 106 | .dstarg = 2 | 
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| 107 | }, | 
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| 108 | { | 
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| 109 | .cmd = CMD_ACCEPT | 
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| 110 | } | 
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| 111 | }; | 
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| 112 |  | 
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| 113 | /** Wait until it is safe to write to the device. */ | 
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| 114 | static void wait_ready(i8042_t *dev) | 
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| 115 | { | 
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| 116 | assert(dev); | 
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| 117 | while (pio_read_8(&dev->regs->status) & i8042_INPUT_FULL) | 
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| 118 | ; | 
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| 119 | } | 
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| 120 |  | 
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| 121 | /** Interrupt handler routine. | 
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| 122 | * | 
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| 123 | * Write new data to the corresponding buffer. | 
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| 124 | * | 
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| 125 | * @param call pointerr to call data. | 
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| 126 | * @param dev  Device that caued the interrupt. | 
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| 127 | * | 
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| 128 | */ | 
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| 129 | static void i8042_irq_handler(ipc_call_t *call, ddf_dev_t *dev) | 
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| 130 | { | 
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| 131 | i8042_t *controller = ddf_dev_data_get(dev); | 
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| 132 | errno_t rc; | 
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| 133 |  | 
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| 134 | const uint8_t status = IPC_GET_ARG1(*call); | 
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| 135 | const uint8_t data = IPC_GET_ARG2(*call); | 
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| 136 |  | 
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| 137 | i8042_port_t *port = (status & i8042_AUX_DATA) ? | 
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| 138 | controller->aux : controller->kbd; | 
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| 139 |  | 
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| 140 | fibril_mutex_lock(&port->buf_lock); | 
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| 141 |  | 
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| 142 | rc = circ_buf_push(&port->cbuf, &data); | 
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| 143 | if (rc != EOK) | 
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| 144 | ddf_msg(LVL_ERROR, "Buffer overrun"); | 
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| 145 |  | 
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| 146 | fibril_mutex_unlock(&port->buf_lock); | 
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| 147 | fibril_condvar_broadcast(&port->buf_cv); | 
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| 148 | } | 
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| 149 |  | 
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| 150 | /** Initialize i8042 driver structure. | 
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| 151 | * | 
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| 152 | * @param dev       Driver structure to initialize. | 
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| 153 | * @param regs      I/O range  of registers. | 
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| 154 | * @param irq_kbd   IRQ for primary port. | 
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| 155 | * @param irq_mouse IRQ for aux port. | 
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| 156 | * @param ddf_dev   DDF device structure of the device. | 
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| 157 | * | 
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| 158 | * @return Error code. | 
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| 159 | * | 
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| 160 | */ | 
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| 161 | errno_t i8042_init(i8042_t *dev, addr_range_t *regs, int irq_kbd, | 
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| 162 | int irq_mouse, ddf_dev_t *ddf_dev) | 
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| 163 | { | 
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| 164 | const size_t range_count = sizeof(i8042_ranges) / | 
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| 165 | sizeof(irq_pio_range_t); | 
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| 166 | irq_pio_range_t ranges[range_count]; | 
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| 167 | const size_t cmd_count = sizeof(i8042_cmds) / sizeof(irq_cmd_t); | 
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| 168 | irq_cmd_t cmds[cmd_count]; | 
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| 169 | ddf_fun_t *kbd_fun; | 
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| 170 | ddf_fun_t *aux_fun; | 
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| 171 | i8042_regs_t *ar; | 
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| 172 |  | 
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| 173 | errno_t rc; | 
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| 174 | bool kbd_bound = false; | 
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| 175 | bool aux_bound = false; | 
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| 176 |  | 
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| 177 | if (regs->size < sizeof(i8042_regs_t)) { | 
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| 178 | rc = EINVAL; | 
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| 179 | goto error; | 
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| 180 | } | 
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| 181 |  | 
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| 182 | if (pio_enable_range(regs, (void **) &dev->regs) != 0) { | 
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| 183 | rc = EIO; | 
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| 184 | goto error; | 
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| 185 | } | 
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| 186 |  | 
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| 187 | kbd_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2a"); | 
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| 188 | if (kbd_fun == NULL) { | 
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| 189 | rc = ENOMEM; | 
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| 190 | goto error; | 
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| 191 | } | 
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| 192 |  | 
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| 193 | dev->kbd = ddf_fun_data_alloc(kbd_fun, sizeof(i8042_port_t)); | 
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| 194 | if (dev->kbd == NULL) { | 
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| 195 | rc = ENOMEM; | 
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| 196 | goto error; | 
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| 197 | } | 
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| 198 |  | 
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| 199 | dev->kbd->fun = kbd_fun; | 
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| 200 | dev->kbd->ctl = dev; | 
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| 201 | chardev_srvs_init(&dev->kbd->cds); | 
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| 202 | dev->kbd->cds.ops = &i8042_chardev_ops; | 
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| 203 | dev->kbd->cds.sarg = dev->kbd; | 
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| 204 | fibril_mutex_initialize(&dev->kbd->buf_lock); | 
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| 205 | fibril_condvar_initialize(&dev->kbd->buf_cv); | 
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| 206 |  | 
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| 207 | rc = ddf_fun_add_match_id(dev->kbd->fun, "char/xtkbd", 90); | 
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| 208 | if (rc != EOK) | 
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| 209 | goto error; | 
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| 210 |  | 
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| 211 | aux_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2b"); | 
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| 212 | if (aux_fun == NULL) { | 
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| 213 | rc = ENOMEM; | 
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| 214 | goto error; | 
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| 215 | } | 
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| 216 |  | 
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| 217 | dev->aux = ddf_fun_data_alloc(aux_fun, sizeof(i8042_port_t)); | 
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| 218 | if (dev->aux == NULL) { | 
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| 219 | rc = ENOMEM; | 
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| 220 | goto error; | 
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| 221 | } | 
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| 222 |  | 
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| 223 | dev->aux->fun = aux_fun; | 
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| 224 | dev->aux->ctl = dev; | 
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| 225 | chardev_srvs_init(&dev->aux->cds); | 
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| 226 | dev->aux->cds.ops = &i8042_chardev_ops; | 
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| 227 | dev->aux->cds.sarg = dev->aux; | 
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| 228 | fibril_mutex_initialize(&dev->aux->buf_lock); | 
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| 229 | fibril_condvar_initialize(&dev->aux->buf_cv); | 
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| 230 |  | 
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| 231 | rc = ddf_fun_add_match_id(dev->aux->fun, "char/ps2mouse", 90); | 
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| 232 | if (rc != EOK) | 
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| 233 | goto error; | 
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| 234 |  | 
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| 235 | ddf_fun_set_conn_handler(dev->kbd->fun, i8042_char_conn); | 
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| 236 | ddf_fun_set_conn_handler(dev->aux->fun, i8042_char_conn); | 
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| 237 |  | 
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| 238 | circ_buf_init(&dev->kbd->cbuf, dev->kbd->buf_data, BUFFER_SIZE, 1); | 
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| 239 | circ_buf_init(&dev->aux->cbuf, dev->aux->buf_data, BUFFER_SIZE, 1); | 
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| 240 | fibril_mutex_initialize(&dev->write_guard); | 
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| 241 |  | 
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| 242 | rc = ddf_fun_bind(dev->kbd->fun); | 
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| 243 | if (rc != EOK) { | 
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| 244 | ddf_msg(LVL_ERROR, "Failed to bind keyboard function: %s.", | 
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| 245 | ddf_fun_get_name(dev->kbd->fun)); | 
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| 246 | goto error; | 
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| 247 | } | 
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| 248 | kbd_bound = true; | 
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| 249 |  | 
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| 250 | rc = ddf_fun_bind(dev->aux->fun); | 
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| 251 | if (rc != EOK) { | 
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| 252 | ddf_msg(LVL_ERROR, "Failed to bind aux function: %s.", | 
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| 253 | ddf_fun_get_name(dev->aux->fun)); | 
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| 254 | goto error; | 
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| 255 | } | 
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| 256 | aux_bound = true; | 
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| 257 |  | 
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| 258 | /* Disable kbd and aux */ | 
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| 259 | wait_ready(dev); | 
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| 260 | pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB); | 
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| 261 | wait_ready(dev); | 
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| 262 | pio_write_8(&dev->regs->data, i8042_KBD_DISABLE | i8042_AUX_DISABLE); | 
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| 263 |  | 
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| 264 | /* Flush all current IO */ | 
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| 265 | while (pio_read_8(&dev->regs->status) & i8042_OUTPUT_FULL) | 
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| 266 | (void) pio_read_8(&dev->regs->data); | 
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| 267 |  | 
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| 268 | memcpy(ranges, i8042_ranges, sizeof(i8042_ranges)); | 
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| 269 | ranges[0].base = RNGABS(*regs); | 
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| 270 |  | 
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| 271 |  | 
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| 272 | ar = RNGABSPTR(*regs); | 
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| 273 | memcpy(cmds, i8042_cmds, sizeof(i8042_cmds)); | 
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| 274 | cmds[0].addr = (void *) &ar->status; | 
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| 275 | cmds[3].addr = (void *) &ar->data; | 
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| 276 |  | 
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| 277 | irq_code_t irq_code = { | 
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| 278 | .rangecount = range_count, | 
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| 279 | .ranges = ranges, | 
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| 280 | .cmdcount = cmd_count, | 
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| 281 | .cmds = cmds | 
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| 282 | }; | 
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| 283 |  | 
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| 284 | cap_irq_handle_t kbd_ihandle; | 
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| 285 | rc = register_interrupt_handler(ddf_dev, irq_kbd, | 
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| 286 | i8042_irq_handler, &irq_code, &kbd_ihandle); | 
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| 287 | if (rc != EOK) { | 
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| 288 | ddf_msg(LVL_ERROR, "Failed set handler for kbd: %s.", | 
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| 289 | ddf_dev_get_name(ddf_dev)); | 
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| 290 | goto error; | 
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| 291 | } | 
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| 292 |  | 
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| 293 | cap_irq_handle_t mouse_ihandle; | 
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| 294 | rc = register_interrupt_handler(ddf_dev, irq_mouse, | 
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| 295 | i8042_irq_handler, &irq_code, &mouse_ihandle); | 
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| 296 | if (rc != EOK) { | 
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| 297 | ddf_msg(LVL_ERROR, "Failed set handler for mouse: %s.", | 
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| 298 | ddf_dev_get_name(ddf_dev)); | 
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| 299 | goto error; | 
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| 300 | } | 
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| 301 |  | 
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| 302 | /* Enable interrupts */ | 
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| 303 | async_sess_t *parent_sess = ddf_dev_parent_sess_get(ddf_dev); | 
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| 304 | assert(parent_sess != NULL); | 
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| 305 |  | 
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| 306 | rc = hw_res_enable_interrupt(parent_sess, irq_kbd); | 
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| 307 | if (rc != EOK) { | 
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| 308 | log_msg(LOG_DEFAULT, LVL_ERROR, "Failed to enable keyboard interrupt: %s.", | 
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| 309 | ddf_dev_get_name(ddf_dev)); | 
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| 310 | rc = EIO; | 
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| 311 | goto error; | 
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| 312 | } | 
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| 313 |  | 
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| 314 | rc = hw_res_enable_interrupt(parent_sess, irq_mouse); | 
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| 315 | if (rc != EOK) { | 
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| 316 | log_msg(LOG_DEFAULT, LVL_ERROR, "Failed to enable mouse interrupt: %s.", | 
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| 317 | ddf_dev_get_name(ddf_dev)); | 
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| 318 | rc = EIO; | 
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| 319 | goto error; | 
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| 320 | } | 
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| 321 |  | 
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| 322 | /* Enable port interrupts. */ | 
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| 323 | wait_ready(dev); | 
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| 324 | pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB); | 
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| 325 | wait_ready(dev); | 
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| 326 | pio_write_8(&dev->regs->data, i8042_KBD_IE | i8042_KBD_TRANSLATE | | 
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| 327 | i8042_AUX_IE); | 
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| 328 |  | 
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| 329 | return EOK; | 
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| 330 | error: | 
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| 331 | if (kbd_bound) | 
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| 332 | ddf_fun_unbind(dev->kbd->fun); | 
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| 333 | if (aux_bound) | 
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| 334 | ddf_fun_unbind(dev->aux->fun); | 
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| 335 | if (dev->kbd->fun != NULL) | 
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| 336 | ddf_fun_destroy(dev->kbd->fun); | 
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| 337 | if (dev->aux->fun != NULL) | 
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| 338 | ddf_fun_destroy(dev->aux->fun); | 
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| 339 |  | 
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| 340 | return rc; | 
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| 341 | } | 
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| 342 |  | 
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| 343 | /** Write data to i8042 port. | 
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| 344 | * | 
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| 345 | * @param srv    Connection-specific data | 
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| 346 | * @param buffer Data source | 
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| 347 | * @param size   Data size | 
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| 348 | * @param nwr    Place to store number of bytes successfully written | 
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| 349 | * | 
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| 350 | * @return EOK on success or non-zero error code | 
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| 351 | * | 
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| 352 | */ | 
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| 353 | static errno_t i8042_write(chardev_srv_t *srv, const void *data, size_t size, | 
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| 354 | size_t *nwr) | 
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| 355 | { | 
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| 356 | i8042_port_t *port = (i8042_port_t *)srv->srvs->sarg; | 
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| 357 | i8042_t *i8042 = port->ctl; | 
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| 358 | const char *dp = (const char *)data; | 
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| 359 |  | 
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| 360 | fibril_mutex_lock(&i8042->write_guard); | 
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| 361 |  | 
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| 362 | for (size_t i = 0; i < size; ++i) { | 
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| 363 | if (port == i8042->aux) { | 
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| 364 | wait_ready(i8042); | 
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| 365 | pio_write_8(&i8042->regs->status, | 
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| 366 | i8042_CMD_WRITE_AUX); | 
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| 367 | } | 
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| 368 |  | 
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| 369 | wait_ready(i8042); | 
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| 370 | pio_write_8(&i8042->regs->data, dp[i]); | 
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| 371 | } | 
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| 372 |  | 
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| 373 | fibril_mutex_unlock(&i8042->write_guard); | 
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| 374 | *nwr = size; | 
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| 375 | return EOK; | 
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| 376 | } | 
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| 377 |  | 
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| 378 | /** Read data from i8042 port. | 
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| 379 | * | 
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| 380 | * @param srv    Connection-specific data | 
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| 381 | * @param buffer Data place | 
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| 382 | * @param size   Data place size | 
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| 383 | * @param nread  Place to store number of bytes successfully read | 
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| 384 | * | 
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| 385 | * @return EOK on success or non-zero error code | 
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| 386 | * | 
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| 387 | */ | 
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| 388 | static errno_t i8042_read(chardev_srv_t *srv, void *dest, size_t size, | 
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| 389 | size_t *nread) | 
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| 390 | { | 
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| 391 | i8042_port_t *port = (i8042_port_t *)srv->srvs->sarg; | 
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| 392 | size_t p; | 
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| 393 | uint8_t *destp = (uint8_t *)dest; | 
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| 394 | errno_t rc; | 
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| 395 |  | 
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| 396 | fibril_mutex_lock(&port->buf_lock); | 
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| 397 |  | 
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| 398 | while (circ_buf_nused(&port->cbuf) == 0) | 
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| 399 | fibril_condvar_wait(&port->buf_cv, &port->buf_lock); | 
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| 400 |  | 
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| 401 | p = 0; | 
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| 402 | while (p < size) { | 
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| 403 | rc = circ_buf_pop(&port->cbuf, &destp[p]); | 
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| 404 | if (rc != EOK) | 
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| 405 | break; | 
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| 406 | ++p; | 
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| 407 | } | 
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| 408 |  | 
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| 409 | fibril_mutex_unlock(&port->buf_lock); | 
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| 410 |  | 
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| 411 | *nread = p; | 
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| 412 | return EOK; | 
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| 413 | } | 
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| 414 |  | 
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| 415 | /** Handle data requests. | 
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| 416 | * | 
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| 417 | * @param call IPC request. | 
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| 418 | * @param arg  ddf_fun_t function. | 
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| 419 | * | 
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| 420 | */ | 
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| 421 | void i8042_char_conn(ipc_call_t *icall, void *arg) | 
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| 422 | { | 
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| 423 | i8042_port_t *port = ddf_fun_data_get((ddf_fun_t *)arg); | 
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| 424 |  | 
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| 425 | chardev_conn(icall, &port->cds); | 
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| 426 | } | 
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| 427 |  | 
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| 428 | /** | 
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| 429 | * @} | 
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| 430 | */ | 
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