source: mainline/uspace/drv/char/i8042/i8042.c@ 35c37fc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 35c37fc was cccd60c3, checked in by Jiri Svoboda <jiri@…>, 8 years ago

hw_res_enable_interrupt should allow enabling individual interrupts.
  • Property mode set to 100644
File size: 10.0 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * Copyright (c) 2006 Josef Cejka
4 * Copyright (c) 2014 Jiri Svoboda
5 * Copyright (c) 2011 Jan Vesely
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * - Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * - Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * - The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32/** @addtogroup kbd_port
33 * @ingroup kbd
34 * @{
35 */
36
37/** @file
38 * @brief i8042 PS/2 port driver.
39 */
40
41#include <ddf/log.h>
42#include <ddf/interrupt.h>
43#include <ddi.h>
44#include <device/hw_res.h>
45#include <errno.h>
46#include <str_error.h>
47#include <inttypes.h>
48#include <io/chardev_srv.h>
49
50#include "i8042.h"
51
52/* Interesting bits for status register */
53#define i8042_OUTPUT_FULL 0x01
54#define i8042_INPUT_FULL 0x02
55#define i8042_AUX_DATA 0x20
56
57/* Command constants */
58#define i8042_CMD_WRITE_CMDB 0x60 /**< Write command byte */
59#define i8042_CMD_WRITE_AUX 0xd4 /**< Write aux device */
60
61/* Command byte fields */
62#define i8042_KBD_IE 0x01
63#define i8042_AUX_IE 0x02
64#define i8042_KBD_DISABLE 0x10
65#define i8042_AUX_DISABLE 0x20
66#define i8042_KBD_TRANSLATE 0x40 /* Use this to switch to XT scancodes */
67
68static void i8042_char_conn(ipc_callid_t, ipc_call_t *, void *);
69static int i8042_read(chardev_srv_t *, void *, size_t);
70static int i8042_write(chardev_srv_t *, const void *, size_t);
71
72static chardev_ops_t i8042_chardev_ops = {
73 .read = i8042_read,
74 .write = i8042_write
75};
76
77static const irq_pio_range_t i8042_ranges[] = {
78 {
79 .base = 0,
80 .size = sizeof(i8042_regs_t)
81 }
82};
83
84/** i8042 Interrupt pseudo-code. */
85static const irq_cmd_t i8042_cmds[] = {
86 {
87 .cmd = CMD_PIO_READ_8,
88 .addr = NULL, /* will be patched in run-time */
89 .dstarg = 1
90 },
91 {
92 .cmd = CMD_AND,
93 .value = i8042_OUTPUT_FULL,
94 .srcarg = 1,
95 .dstarg = 3
96 },
97 {
98 .cmd = CMD_PREDICATE,
99 .value = 2,
100 .srcarg = 3
101 },
102 {
103 .cmd = CMD_PIO_READ_8,
104 .addr = NULL, /* will be patched in run-time */
105 .dstarg = 2
106 },
107 {
108 .cmd = CMD_ACCEPT
109 }
110};
111
112/** Wait until it is safe to write to the device. */
113static void wait_ready(i8042_t *dev)
114{
115 assert(dev);
116 while (pio_read_8(&dev->regs->status) & i8042_INPUT_FULL);
117}
118
119/** Interrupt handler routine.
120 *
121 * Write new data to the corresponding buffer.
122 *
123 * @param iid Call id.
124 * @param call pointerr to call data.
125 * @param dev Device that caued the interrupt.
126 *
127 */
128static void i8042_irq_handler(ipc_callid_t iid, ipc_call_t *call,
129 ddf_dev_t *dev)
130{
131 i8042_t *controller = ddf_dev_data_get(dev);
132
133 const uint8_t status = IPC_GET_ARG1(*call);
134 const uint8_t data = IPC_GET_ARG2(*call);
135
136 buffer_t *buffer = (status & i8042_AUX_DATA) ?
137 &controller->aux_buffer : &controller->kbd_buffer;
138
139 buffer_write(buffer, data);
140}
141
142/** Initialize i8042 driver structure.
143 *
144 * @param dev Driver structure to initialize.
145 * @param regs I/O range of registers.
146 * @param irq_kbd IRQ for primary port.
147 * @param irq_mouse IRQ for aux port.
148 * @param ddf_dev DDF device structure of the device.
149 *
150 * @return Error code.
151 *
152 */
153int i8042_init(i8042_t *dev, addr_range_t *regs, int irq_kbd,
154 int irq_mouse, ddf_dev_t *ddf_dev)
155{
156 const size_t range_count = sizeof(i8042_ranges) /
157 sizeof(irq_pio_range_t);
158 irq_pio_range_t ranges[range_count];
159 const size_t cmd_count = sizeof(i8042_cmds) / sizeof(irq_cmd_t);
160 irq_cmd_t cmds[cmd_count];
161 i8042_regs_t *ar;
162
163 int rc;
164 bool kbd_bound = false;
165 bool aux_bound = false;
166
167 dev->kbd_fun = NULL;
168 dev->aux_fun = NULL;
169
170 if (regs->size < sizeof(i8042_regs_t)) {
171 rc = EINVAL;
172 goto error;
173 }
174
175 if (pio_enable_range(regs, (void **) &dev->regs) != 0) {
176 rc = EIO;
177 goto error;
178 }
179
180 dev->kbd_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2a");
181 if (dev->kbd_fun == NULL) {
182 rc = ENOMEM;
183 goto error;
184 };
185
186 dev->kbd = ddf_fun_data_alloc(dev->kbd_fun, sizeof(i8042_port_t));
187 if (dev->kbd == NULL) {
188 rc = ENOMEM;
189 goto error;
190 }
191
192 dev->kbd->ctl = dev;
193 chardev_srvs_init(&dev->kbd->cds);
194 dev->kbd->cds.ops = &i8042_chardev_ops;
195 dev->kbd->cds.sarg = dev->kbd;
196
197 rc = ddf_fun_add_match_id(dev->kbd_fun, "char/xtkbd", 90);
198 if (rc != EOK)
199 goto error;
200
201 dev->aux_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2b");
202 if (dev->aux_fun == NULL) {
203 rc = ENOMEM;
204 goto error;
205 }
206
207 dev->aux = ddf_fun_data_alloc(dev->aux_fun, sizeof(i8042_port_t));
208 if (dev->aux == NULL) {
209 rc = ENOMEM;
210 goto error;
211 }
212
213 dev->aux->ctl = dev;
214 chardev_srvs_init(&dev->aux->cds);
215 dev->aux->cds.ops = &i8042_chardev_ops;
216 dev->aux->cds.sarg = dev->aux;
217
218 rc = ddf_fun_add_match_id(dev->aux_fun, "char/ps2mouse", 90);
219 if (rc != EOK)
220 goto error;
221
222 ddf_fun_set_conn_handler(dev->kbd_fun, i8042_char_conn);
223 ddf_fun_set_conn_handler(dev->aux_fun, i8042_char_conn);
224
225 buffer_init(&dev->kbd_buffer, dev->kbd_data, BUFFER_SIZE);
226 buffer_init(&dev->aux_buffer, dev->aux_data, BUFFER_SIZE);
227 fibril_mutex_initialize(&dev->write_guard);
228
229 rc = ddf_fun_bind(dev->kbd_fun);
230 if (rc != EOK) {
231 ddf_msg(LVL_ERROR, "Failed to bind keyboard function: %s.",
232 ddf_fun_get_name(dev->kbd_fun));
233 goto error;
234 }
235 kbd_bound = true;
236
237 rc = ddf_fun_bind(dev->aux_fun);
238 if (rc != EOK) {
239 ddf_msg(LVL_ERROR, "Failed to bind aux function: %s.",
240 ddf_fun_get_name(dev->aux_fun));
241 goto error;
242 }
243 aux_bound = true;
244
245 /* Disable kbd and aux */
246 wait_ready(dev);
247 pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB);
248 wait_ready(dev);
249 pio_write_8(&dev->regs->data, i8042_KBD_DISABLE | i8042_AUX_DISABLE);
250
251 /* Flush all current IO */
252 while (pio_read_8(&dev->regs->status) & i8042_OUTPUT_FULL)
253 (void) pio_read_8(&dev->regs->data);
254
255 memcpy(ranges, i8042_ranges, sizeof(i8042_ranges));
256 ranges[0].base = RNGABS(*regs);
257
258
259 ar = RNGABSPTR(*regs);
260 memcpy(cmds, i8042_cmds, sizeof(i8042_cmds));
261 cmds[0].addr = (void *) &ar->status;
262 cmds[3].addr = (void *) &ar->data;
263
264 irq_code_t irq_code = {
265 .rangecount = range_count,
266 .ranges = ranges,
267 .cmdcount = cmd_count,
268 .cmds = cmds
269 };
270
271 const int irq_kbd_cap = register_interrupt_handler(ddf_dev, irq_kbd,
272 i8042_irq_handler, &irq_code);
273 if (irq_kbd_cap < 0) {
274 rc = irq_kbd_cap;
275 ddf_msg(LVL_ERROR, "Failed set handler for kbd: %s.",
276 ddf_dev_get_name(ddf_dev));
277 goto error;
278 }
279
280 const int irq_mouse_cap = register_interrupt_handler(ddf_dev, irq_mouse,
281 i8042_irq_handler, &irq_code);
282 if (irq_mouse_cap < 0) {
283 rc = irq_mouse_cap;
284 ddf_msg(LVL_ERROR, "Failed set handler for mouse: %s.",
285 ddf_dev_get_name(ddf_dev));
286 goto error;
287 }
288
289 /* Enable interrupts */
290 async_sess_t *parent_sess = ddf_dev_parent_sess_get(ddf_dev);
291 assert(parent_sess != NULL);
292
293 rc = hw_res_enable_interrupt(parent_sess, irq_kbd);
294 if (rc != EOK) {
295 log_msg(LOG_DEFAULT, LVL_ERROR, "Failed to enable keyboard interrupt: %s.",
296 ddf_dev_get_name(ddf_dev));
297 rc = EIO;
298 goto error;
299 }
300
301 rc = hw_res_enable_interrupt(parent_sess, irq_mouse);
302 if (rc != EOK) {
303 log_msg(LOG_DEFAULT, LVL_ERROR, "Failed to enable mouse interrupt: %s.",
304 ddf_dev_get_name(ddf_dev));
305 rc = EIO;
306 goto error;
307 }
308
309 /* Enable port interrupts. */
310 wait_ready(dev);
311 pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB);
312 wait_ready(dev);
313 pio_write_8(&dev->regs->data, i8042_KBD_IE | i8042_KBD_TRANSLATE |
314 i8042_AUX_IE);
315
316 return EOK;
317error:
318 if (kbd_bound)
319 ddf_fun_unbind(dev->kbd_fun);
320 if (aux_bound)
321 ddf_fun_unbind(dev->aux_fun);
322 if (dev->kbd_fun != NULL)
323 ddf_fun_destroy(dev->kbd_fun);
324 if (dev->aux_fun != NULL)
325 ddf_fun_destroy(dev->aux_fun);
326
327 return rc;
328}
329
330/** Write data to i8042 port.
331 *
332 * @param srv Connection-specific data
333 * @param buffer Data source
334 * @param size Data size
335 *
336 * @return Bytes written.
337 *
338 */
339static int i8042_write(chardev_srv_t *srv, const void *data, size_t size)
340{
341 i8042_port_t *port = (i8042_port_t *)srv->srvs->sarg;
342 i8042_t *i8042 = port->ctl;
343 const char *dp = (const char *)data;
344
345 fibril_mutex_lock(&i8042->write_guard);
346
347 for (size_t i = 0; i < size; ++i) {
348 if (port == i8042->aux) {
349 wait_ready(i8042);
350 pio_write_8(&i8042->regs->status,
351 i8042_CMD_WRITE_AUX);
352 }
353
354 wait_ready(i8042);
355 pio_write_8(&i8042->regs->data, dp[i]);
356 }
357
358 fibril_mutex_unlock(&i8042->write_guard);
359 return size;
360}
361
362/** Read data from i8042 port.
363 *
364 * @param srv Connection-specific data
365 * @param buffer Data place
366 * @param size Data place size
367 *
368 * @return Bytes read.
369 *
370 */
371static int i8042_read(chardev_srv_t *srv, void *dest, size_t size)
372{
373 i8042_port_t *port = (i8042_port_t *)srv->srvs->sarg;
374 i8042_t *i8042 = port->ctl;
375 uint8_t *destp = (uint8_t *)dest;
376
377 buffer_t *buffer = (port == i8042->aux) ?
378 &i8042->aux_buffer : &i8042->kbd_buffer;
379
380 for (size_t i = 0; i < size; ++i)
381 *destp++ = buffer_read(buffer);
382
383 return size;
384}
385
386/** Handle data requests.
387 *
388 * @param id callid
389 * @param call IPC request.
390 * @param arg ddf_fun_t function.
391 */
392void i8042_char_conn(ipc_callid_t iid, ipc_call_t *icall, void *arg)
393{
394 i8042_port_t *port = ddf_fun_data_get((ddf_fun_t *)arg);
395
396 chardev_conn(iid, icall, &port->cds);
397}
398
399/**
400 * @}
401 */
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