1 | /*
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2 | * Copyright (c) 2001-2004 Jakub Jermar
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3 | * Copyright (c) 2006 Josef Cejka
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4 | * Copyright (c) 2009 Jiri Svoboda
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5 | * Copyright (c) 2011 Jan Vesely
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6 | * All rights reserved.
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7 | *
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8 | * Redistribution and use in source and binary forms, with or without
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9 | * modification, are permitted provided that the following conditions
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10 | * are met:
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11 | *
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12 | * - Redistributions of source code must retain the above copyright
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13 | * notice, this list of conditions and the following disclaimer.
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14 | * - Redistributions in binary form must reproduce the above copyright
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15 | * notice, this list of conditions and the following disclaimer in the
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16 | * documentation and/or other materials provided with the distribution.
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17 | * - The name of the author may not be used to endorse or promote products
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18 | * derived from this software without specific prior written permission.
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19 | *
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20 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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21 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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22 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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23 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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24 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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25 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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26 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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27 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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28 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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29 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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30 | */
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31 |
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32 | /** @addtogroup kbd_port
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33 | * @ingroup kbd
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34 | * @{
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35 | */
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36 |
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37 | /** @file
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38 | * @brief i8042 PS/2 port driver.
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39 | */
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40 |
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41 | #include <device/hw_res.h>
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42 | #include <ddi.h>
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43 | #include <errno.h>
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44 | #include <str_error.h>
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45 | #include <inttypes.h>
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46 | #include <ddf/log.h>
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47 | #include <ddf/interrupt.h>
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48 | #include "i8042.h"
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49 |
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50 | /* Interesting bits for status register */
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51 | #define i8042_OUTPUT_FULL 0x01
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52 | #define i8042_INPUT_FULL 0x02
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53 | #define i8042_AUX_DATA 0x20
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54 |
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55 | /* Command constants */
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56 | #define i8042_CMD_WRITE_CMDB 0x60 /**< Write command byte */
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57 | #define i8042_CMD_WRITE_AUX 0xd4 /**< Write aux device */
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58 |
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59 | /* Command byte fields */
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60 | #define i8042_KBD_IE 0x01
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61 | #define i8042_AUX_IE 0x02
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62 | #define i8042_KBD_DISABLE 0x10
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63 | #define i8042_AUX_DISABLE 0x20
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64 | #define i8042_KBD_TRANSLATE 0x40 /* Use this to switch to XT scancodes */
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65 |
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66 | #define CHECK_RET_DESTROY(ret, msg...) \
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67 | do { \
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68 | if (ret != EOK) { \
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69 | ddf_msg(LVL_ERROR, msg); \
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70 | if (dev->kbd_fun) { \
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71 | dev->kbd_fun->driver_data = NULL; \
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72 | ddf_fun_destroy(dev->kbd_fun); \
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73 | } \
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74 | if (dev->aux_fun) { \
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75 | dev->aux_fun->driver_data = NULL; \
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76 | ddf_fun_destroy(dev->aux_fun); \
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77 | } \
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78 | } \
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79 | } while (0)
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80 |
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81 | #define CHECK_RET_UNBIND_DESTROY(ret, msg...) \
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82 | do { \
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83 | if (ret != EOK) { \
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84 | ddf_msg(LVL_ERROR, msg); \
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85 | if (dev->kbd_fun) { \
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86 | ddf_fun_unbind(dev->kbd_fun); \
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87 | dev->kbd_fun->driver_data = NULL; \
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88 | ddf_fun_destroy(dev->kbd_fun); \
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89 | } \
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90 | if (dev->aux_fun) { \
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91 | ddf_fun_unbind(dev->aux_fun); \
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92 | dev->aux_fun->driver_data = NULL; \
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93 | ddf_fun_destroy(dev->aux_fun); \
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94 | } \
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95 | } \
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96 | } while (0)
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97 |
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98 | void default_handler(ddf_fun_t *, ipc_callid_t, ipc_call_t *);
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99 |
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100 | /** Port function operations. */
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101 | static ddf_dev_ops_t ops = {
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102 | .default_handler = default_handler,
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103 | };
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104 |
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105 | static const irq_pio_range_t i8042_ranges[] = {
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106 | {
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107 | .base = 0,
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108 | .size = sizeof(i8042_regs_t)
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109 | }
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110 | };
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111 |
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112 | /** i8042 Interrupt pseudo-code. */
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113 | static const irq_cmd_t i8042_cmds[] = {
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114 | {
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115 | .cmd = CMD_PIO_READ_8,
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116 | .addr = NULL, /* will be patched in run-time */
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117 | .dstarg = 1
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118 | },
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119 | {
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120 | .cmd = CMD_AND,
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121 | .value = i8042_OUTPUT_FULL,
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122 | .srcarg = 1,
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123 | .dstarg = 3
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124 | },
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125 | {
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126 | .cmd = CMD_PREDICATE,
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127 | .value = 2,
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128 | .srcarg = 3
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129 | },
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130 | {
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131 | .cmd = CMD_PIO_READ_8,
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132 | .addr = NULL, /* will be patched in run-time */
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133 | .dstarg = 2
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134 | },
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135 | {
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136 | .cmd = CMD_ACCEPT
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137 | }
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138 | };
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139 |
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140 | /** Get i8042 soft state from device node. */
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141 | static i8042_t *dev_i8042(ddf_dev_t *dev)
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142 | {
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143 | return ddf_dev_data_get(dev);
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144 | }
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145 |
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146 | /** Wait until it is safe to write to the device. */
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147 | static void wait_ready(i8042_t *dev)
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148 | {
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149 | assert(dev);
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150 | while (pio_read_8(&dev->regs->status) & i8042_INPUT_FULL);
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151 | }
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152 |
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153 | /** Interrupt handler routine.
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154 | *
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155 | * Write new data to the corresponding buffer.
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156 | *
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157 | * @param dev Device that caued the interrupt.
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158 | * @param iid Call id.
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159 | * @param call pointerr to call data.
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160 | *
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161 | */
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162 | static void i8042_irq_handler(ddf_dev_t *dev, ipc_callid_t iid,
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163 | ipc_call_t *call)
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164 | {
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165 | i8042_t *controller = dev_i8042(dev);
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166 |
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167 | const uint8_t status = IPC_GET_ARG1(*call);
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168 | const uint8_t data = IPC_GET_ARG2(*call);
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169 |
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170 | buffer_t *buffer = (status & i8042_AUX_DATA) ?
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171 | &controller->aux_buffer : &controller->kbd_buffer;
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172 |
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173 | buffer_write(buffer, data);
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174 | }
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175 |
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176 | /** Initialize i8042 driver structure.
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177 | *
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178 | * @param dev Driver structure to initialize.
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179 | * @param regs I/O address of registers.
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180 | * @param reg_size size of the reserved I/O address space.
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181 | * @param irq_kbd IRQ for primary port.
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182 | * @param irq_mouse IRQ for aux port.
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183 | * @param ddf_dev DDF device structure of the device.
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184 | *
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185 | * @return Error code.
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186 | *
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187 | */
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188 | int i8042_init(i8042_t *dev, void *regs, size_t reg_size, int irq_kbd,
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189 | int irq_mouse, ddf_dev_t *ddf_dev)
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190 | {
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191 | const size_t range_count = sizeof(i8042_ranges) /
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192 | sizeof(irq_pio_range_t);
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193 | irq_pio_range_t ranges[range_count];
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194 | const size_t cmd_count = sizeof(i8042_cmds) / sizeof(irq_cmd_t);
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195 | irq_cmd_t cmds[cmd_count];
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196 |
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197 | int rc;
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198 | bool kbd_bound = false;
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199 | bool aux_bound = false;
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200 |
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201 | dev->kbd_fun = NULL;
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202 | dev->aux_fun = NULL;
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203 |
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204 | if (reg_size < sizeof(i8042_regs_t)) {
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205 | rc = EINVAL;
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206 | goto error;
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207 | }
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208 |
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209 | if (pio_enable(regs, sizeof(i8042_regs_t), (void **) &dev->regs) != 0) {
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210 | rc = EIO;
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211 | goto error;
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212 | }
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213 |
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214 | dev->kbd_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2a");
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215 | if (dev->kbd_fun == NULL) {
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216 | rc = ENOMEM;
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217 | goto error;
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218 | };
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219 |
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220 | rc = ddf_fun_add_match_id(dev->kbd_fun, "char/xtkbd", 90);
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221 | if (rc != EOK)
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222 | goto error;
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223 |
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224 | dev->aux_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2b");
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225 | if (dev->aux_fun == NULL) {
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226 | rc = ENOMEM;
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227 | goto error;
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228 | }
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229 |
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230 | rc = ddf_fun_add_match_id(dev->aux_fun, "char/ps2mouse", 90);
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231 | if (rc != EOK)
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232 | goto error;
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233 |
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234 | ddf_fun_set_ops(dev->kbd_fun, &ops);
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235 | ddf_fun_set_ops(dev->aux_fun, &ops);
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236 |
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237 | buffer_init(&dev->kbd_buffer, dev->kbd_data, BUFFER_SIZE);
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238 | buffer_init(&dev->aux_buffer, dev->aux_data, BUFFER_SIZE);
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239 | fibril_mutex_initialize(&dev->write_guard);
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240 |
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241 | rc = ddf_fun_bind(dev->kbd_fun);
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242 | if (rc != EOK) {
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243 | ddf_msg(LVL_ERROR, "Failed to bind keyboard function: %s.",
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244 | ddf_fun_get_name(dev->kbd_fun));
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245 | goto error;
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246 | }
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247 | kbd_bound = true;
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248 |
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249 | rc = ddf_fun_bind(dev->aux_fun);
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250 | if (rc != EOK) {
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251 | ddf_msg(LVL_ERROR, "Failed to bind aux function: %s.",
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252 | ddf_fun_get_name(dev->aux_fun));
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253 | goto error;
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254 | }
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255 | aux_bound = true;
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256 |
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257 | /* Disable kbd and aux */
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258 | wait_ready(dev);
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259 | pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB);
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260 | wait_ready(dev);
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261 | pio_write_8(&dev->regs->data, i8042_KBD_DISABLE | i8042_AUX_DISABLE);
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262 |
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263 | /* Flush all current IO */
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264 | while (pio_read_8(&dev->regs->status) & i8042_OUTPUT_FULL)
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265 | (void) pio_read_8(&dev->regs->data);
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266 |
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267 | memcpy(ranges, i8042_ranges, sizeof(i8042_ranges));
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268 | ranges[0].base = (uintptr_t) regs;
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269 |
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270 | memcpy(cmds, i8042_cmds, sizeof(i8042_cmds));
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271 | cmds[0].addr = (void *) &(((i8042_regs_t *) regs)->status);
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272 | cmds[3].addr = (void *) &(((i8042_regs_t *) regs)->data);
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273 |
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274 | irq_code_t irq_code = {
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275 | .rangecount = range_count,
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276 | .ranges = ranges,
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277 | .cmdcount = cmd_count,
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278 | .cmds = cmds
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279 | };
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280 |
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281 | rc = register_interrupt_handler(ddf_dev, irq_kbd, i8042_irq_handler,
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282 | &irq_code);
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283 | if (rc != EOK) {
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284 | ddf_msg(LVL_ERROR, "Failed set handler for kbd: %s.",
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285 | ddf_dev_get_name(ddf_dev));
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286 | goto error;
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287 | }
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288 |
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289 | rc = register_interrupt_handler(ddf_dev, irq_mouse, i8042_irq_handler,
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290 | &irq_code);
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291 | if (rc != EOK) {
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292 | ddf_msg(LVL_ERROR, "Failed set handler for mouse: %s.",
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293 | ddf_dev_get_name(ddf_dev));
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294 | goto error;
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295 | }
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296 |
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297 | /* Enable interrupts */
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298 | async_sess_t *parent_sess = ddf_dev_parent_sess_get(ddf_dev);
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299 | assert(parent_sess != NULL);
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300 |
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301 | const bool enabled = hw_res_enable_interrupt(parent_sess);
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302 | if (!enabled) {
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303 | log_msg(LOG_DEFAULT, LVL_ERROR, "Failed to enable interrupts: %s.",
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304 | ddf_dev_get_name(ddf_dev));
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305 | rc = EIO;
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306 | goto error;
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307 | }
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308 |
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309 | /* Enable port interrupts. */
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310 | wait_ready(dev);
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311 | pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB);
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312 | wait_ready(dev);
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313 | pio_write_8(&dev->regs->data, i8042_KBD_IE | i8042_KBD_TRANSLATE |
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314 | i8042_AUX_IE);
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315 |
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316 | return EOK;
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317 | error:
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318 | if (kbd_bound)
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319 | ddf_fun_unbind(dev->kbd_fun);
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320 | if (aux_bound)
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321 | ddf_fun_unbind(dev->aux_fun);
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322 | if (dev->kbd_fun != NULL)
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323 | ddf_fun_destroy(dev->kbd_fun);
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324 | if (dev->aux_fun != NULL)
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325 | ddf_fun_destroy(dev->aux_fun);
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326 |
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327 | return rc;
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328 | }
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329 |
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330 | // FIXME TODO use shared instead this
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331 | enum {
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332 | IPC_CHAR_READ = DEV_FIRST_CUSTOM_METHOD,
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333 | IPC_CHAR_WRITE,
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334 | };
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335 |
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336 | /** Write data to i8042 port.
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337 | *
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338 | * @param fun DDF function.
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339 | * @param buffer Data source.
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340 | * @param size Data size.
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341 | *
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342 | * @return Bytes written.
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343 | *
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344 | */
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345 | static int i8042_write(ddf_fun_t *fun, char *buffer, size_t size)
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346 | {
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347 | i8042_t *controller = dev_i8042(ddf_fun_get_dev(fun));
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348 | fibril_mutex_lock(&controller->write_guard);
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349 |
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350 | for (size_t i = 0; i < size; ++i) {
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351 | if (controller->aux_fun == fun) {
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352 | wait_ready(controller);
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353 | pio_write_8(&controller->regs->status,
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354 | i8042_CMD_WRITE_AUX);
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355 | }
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356 |
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357 | wait_ready(controller);
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358 | pio_write_8(&controller->regs->data, buffer[i]);
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359 | }
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360 |
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361 | fibril_mutex_unlock(&controller->write_guard);
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362 | return size;
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363 | }
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364 |
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365 | /** Read data from i8042 port.
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366 | *
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367 | * @param fun DDF function.
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368 | * @param buffer Data place.
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369 | * @param size Data place size.
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370 | *
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371 | * @return Bytes read.
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372 | *
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373 | */
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374 | static int i8042_read(ddf_fun_t *fun, char *data, size_t size)
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375 | {
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376 | i8042_t *controller = dev_i8042(ddf_fun_get_dev(fun));
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377 | buffer_t *buffer = (fun == controller->aux_fun) ?
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378 | &controller->aux_buffer : &controller->kbd_buffer;
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379 |
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380 | for (size_t i = 0; i < size; ++i)
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381 | *data++ = buffer_read(buffer);
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382 |
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383 | return size;
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384 | }
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385 |
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386 | /** Handle data requests.
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387 | *
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388 | * @param fun ddf_fun_t function.
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389 | * @param id callid
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390 | * @param call IPC request.
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391 | *
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392 | */
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393 | void default_handler(ddf_fun_t *fun, ipc_callid_t id, ipc_call_t *call)
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394 | {
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395 | const sysarg_t method = IPC_GET_IMETHOD(*call);
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396 | const size_t size = IPC_GET_ARG1(*call);
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397 |
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398 | switch (method) {
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399 | case IPC_CHAR_READ:
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400 | if (size <= 4 * sizeof(sysarg_t)) {
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401 | sysarg_t message[4] = {};
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402 |
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403 | i8042_read(fun, (char *) message, size);
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404 | async_answer_4(id, size, message[0], message[1],
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405 | message[2], message[3]);
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406 | } else
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407 | async_answer_0(id, ELIMIT);
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408 | break;
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409 |
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410 | case IPC_CHAR_WRITE:
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411 | if (size <= 3 * sizeof(sysarg_t)) {
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412 | const sysarg_t message[3] = {
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413 | IPC_GET_ARG2(*call),
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414 | IPC_GET_ARG3(*call),
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415 | IPC_GET_ARG4(*call)
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416 | };
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417 |
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418 | i8042_write(fun, (char *) message, size);
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419 | async_answer_0(id, size);
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420 | } else
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421 | async_answer_0(id, ELIMIT);
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422 |
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423 | default:
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424 | async_answer_0(id, EINVAL);
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425 | }
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426 | }
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427 |
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428 | /**
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429 | * @}
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430 | */
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