source: mainline/uspace/drv/char/i8042/i8042.c@ cccdb8b7

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since cccdb8b7 was cccdb8b7, checked in by Jakub Jermar <jakub@…>, 14 years ago

In i8042 IRQ pseudocode, use the hardware address obtained from the parent.

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File size: 10.1 KB
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[a2bd204f]1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * Copyright (c) 2006 Josef Cejka
4 * Copyright (c) 2009 Jiri Svoboda
[7cb0cb4]5 * Copyright (c) 2011 Jan Vesely
[a2bd204f]6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * - Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * - Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * - The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31/** @addtogroup kbd_port
32 * @ingroup kbd
33 * @{
34 */
35/** @file
36 * @brief i8042 PS/2 port driver.
37 */
38
[b1f44b4]39#include <devman.h>
40#include <device/hw_res.h>
[9ff60d1]41#include <ddi.h>
[a2bd204f]42#include <libarch/ddi.h>
43#include <errno.h>
[ee163b3]44#include <str_error.h>
[a2bd204f]45#include <inttypes.h>
[9ff60d1]46
[ee163b3]47#include <ddf/log.h>
48#include <ddf/interrupt.h>
[a8f7029]49
[a2bd204f]50#include "i8042.h"
51
52#define NAME "i8042"
53
[a455321]54void default_handler(ddf_fun_t *, ipc_callid_t, ipc_call_t *);
[8bb9540]55
[bd87ae0]56/** Port function operations. */
[a455321]57static ddf_dev_ops_t ops = {
58 .default_handler = default_handler,
[a8f7029]59};
60
[a2bd204f]61/* Interesting bits for status register */
62#define i8042_OUTPUT_FULL 0x01
63#define i8042_INPUT_FULL 0x02
64#define i8042_AUX_DATA 0x20
65
66/* Command constants */
67#define i8042_CMD_WRITE_CMDB 0x60 /**< write command byte */
68#define i8042_CMD_WRITE_AUX 0xd4 /**< write aux device */
69
70/* Command byte fields */
71#define i8042_KBD_IE 0x01
72#define i8042_AUX_IE 0x02
73#define i8042_KBD_DISABLE 0x10
74#define i8042_AUX_DISABLE 0x20
[a8f7029]75#define i8042_KBD_TRANSLATE 0x40 /* Use this to switch to XT scancodes */
[a2bd204f]76
[2507d1fc]77static const irq_pio_range_t i8042_ranges[] = {
78 {
79 .base = 0,
80 .size = sizeof(i8042_regs_t)
81 }
82};
83
[336f03b]84/** i8042 Interrupt pseudo-code. */
[ee163b3]85static const irq_cmd_t i8042_cmds[] = {
[a2bd204f]86 {
87 .cmd = CMD_PIO_READ_8,
88 .addr = NULL, /* will be patched in run-time */
89 .dstarg = 1
90 },
91 {
92 .cmd = CMD_BTEST,
93 .value = i8042_OUTPUT_FULL,
94 .srcarg = 1,
95 .dstarg = 3
96 },
97 {
98 .cmd = CMD_PREDICATE,
99 .value = 2,
100 .srcarg = 3
101 },
102 {
103 .cmd = CMD_PIO_READ_8,
104 .addr = NULL, /* will be patched in run-time */
105 .dstarg = 2
106 },
107 {
108 .cmd = CMD_ACCEPT
109 }
110};
[8bb9540]111
[336f03b]112/** Wait until it is safe to write to the device. */
[ee163b3]113static void wait_ready(i8042_t *dev)
[a2bd204f]114{
[dd28c1a]115 assert(dev);
116 while (pio_read_8(&dev->regs->status) & i8042_INPUT_FULL);
[a2bd204f]117}
[8bb9540]118
[336f03b]119/** Interrupt handler routine.
120 * Writes new data to the corresponding buffer.
121 * @param dev Device that caued the interrupt.
122 * @param iid Call id.
123 * @param call pointerr to call data.
124 */
[b1f44b4]125static void i8042_irq_handler(
126 ddf_dev_t *dev, ipc_callid_t iid, ipc_call_t *call)
127{
128 if (!dev || !dev->driver_data)
129 return;
[a8f7029]130 i8042_t *controller = dev->driver_data;
131
132 const uint8_t status = IPC_GET_ARG1(*call);
133 const uint8_t data = IPC_GET_ARG2(*call);
[9f97ffe]134 buffer_t *buffer = (status & i8042_AUX_DATA) ?
135 &controller->aux_buffer : &controller->kbd_buffer;
136 buffer_write(buffer, data);
[b1f44b4]137}
[8bb9540]138
[336f03b]139/** Initialize i8042 driver structure.
140 * @param dev Driver structure to initialize.
141 * @param regs I/O address of registers.
142 * @param reg_size size of the reserved I/O address space.
143 * @param irq_kbd IRQ for primary port.
144 * @param irq_mouse IRQ for aux port.
145 * @param ddf_dev DDF device structure of the device.
146 * @return Error code.
147 */
[ee163b3]148int i8042_init(i8042_t *dev, void *regs, size_t reg_size, int irq_kbd,
149 int irq_mouse, ddf_dev_t *ddf_dev)
[a2bd204f]150{
[ee163b3]151 assert(ddf_dev);
152 assert(dev);
[a2bd204f]153
[ee163b3]154 if (reg_size < sizeof(i8042_regs_t))
155 return EINVAL;
[a2bd204f]156
[ee163b3]157 if (pio_enable(regs, sizeof(i8042_regs_t), (void**)&dev->regs) != 0)
[a2bd204f]158 return -1;
159
[e747303]160 dev->kbd_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2a");
[ee163b3]161 if (!dev->kbd_fun)
162 return ENOMEM;
[2552f05f]163 int ret = ddf_fun_add_match_id(dev->kbd_fun, "char/xtkbd", 90);
[e747303]164 if (ret != EOK) {
165 ddf_fun_destroy(dev->kbd_fun);
166 return ret;
167 }
[a2bd204f]168
[a455321]169 dev->aux_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2b");
170 if (!dev->aux_fun) {
[ee163b3]171 ddf_fun_destroy(dev->kbd_fun);
172 return ENOMEM;
[a2bd204f]173 }
174
[a455321]175 ret = ddf_fun_add_match_id(dev->aux_fun, "char/ps2mouse", 90);
[2a52bc6]176 if (ret != EOK) {
177 ddf_fun_destroy(dev->kbd_fun);
[a455321]178 ddf_fun_destroy(dev->aux_fun);
[2a52bc6]179 return ret;
180 }
181
[bd87ae0]182 dev->kbd_fun->ops = &ops;
[a455321]183 dev->aux_fun->ops = &ops;
[a8f7029]184 dev->kbd_fun->driver_data = dev;
[a455321]185 dev->aux_fun->driver_data = dev;
[a8f7029]186
[9f97ffe]187 buffer_init(&dev->kbd_buffer, dev->kbd_data, BUFFER_SIZE);
188 buffer_init(&dev->aux_buffer, dev->aux_data, BUFFER_SIZE);
189 fibril_mutex_initialize(&dev->write_guard);
[a8f7029]190
[ee163b3]191#define CHECK_RET_DESTROY(ret, msg...) \
192if (ret != EOK) { \
193 ddf_msg(LVL_ERROR, msg); \
194 if (dev->kbd_fun) { \
195 dev->kbd_fun->driver_data = NULL; \
196 ddf_fun_destroy(dev->kbd_fun); \
197 } \
[a455321]198 if (dev->aux_fun) { \
199 dev->aux_fun->driver_data = NULL; \
200 ddf_fun_destroy(dev->aux_fun); \
[ee163b3]201 } \
202} else (void)0
203
[e747303]204 ret = ddf_fun_bind(dev->kbd_fun);
[ee163b3]205 CHECK_RET_DESTROY(ret,
[9b56a8dd]206 "Failed to bind keyboard function: %s.", str_error(ret));
[ee163b3]207
[a455321]208 ret = ddf_fun_bind(dev->aux_fun);
[ee163b3]209 CHECK_RET_DESTROY(ret,
[9b56a8dd]210 "Failed to bind mouse function: %s.", str_error(ret));
[a2bd204f]211
212 /* Disable kbd and aux */
[dd28c1a]213 wait_ready(dev);
[78aa0ab]214 pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB);
[dd28c1a]215 wait_ready(dev);
[78aa0ab]216 pio_write_8(&dev->regs->data, i8042_KBD_DISABLE | i8042_AUX_DISABLE);
[a2bd204f]217
218 /* Flush all current IO */
[78aa0ab]219 while (pio_read_8(&dev->regs->status) & i8042_OUTPUT_FULL)
220 (void) pio_read_8(&dev->regs->data);
[a2bd204f]221
[ee163b3]222#define CHECK_RET_UNBIND_DESTROY(ret, msg...) \
223if (ret != EOK) { \
224 ddf_msg(LVL_ERROR, msg); \
225 if (dev->kbd_fun) { \
226 ddf_fun_unbind(dev->kbd_fun); \
227 dev->kbd_fun->driver_data = NULL; \
228 ddf_fun_destroy(dev->kbd_fun); \
229 } \
[a455321]230 if (dev->aux_fun) { \
231 ddf_fun_unbind(dev->aux_fun); \
232 dev->aux_fun->driver_data = NULL; \
233 ddf_fun_destroy(dev->aux_fun); \
[ee163b3]234 } \
235} else (void)0
[b1f44b4]236
[2507d1fc]237 const size_t range_count = sizeof(i8042_ranges) /
238 sizeof(irq_pio_range_t);
239 irq_pio_range_t ranges[range_count];
240 memcpy(ranges, i8042_ranges, sizeof(i8042_ranges));
241 ranges[0].base = (uintptr_t) regs;
[cccdb8b7]242
243 const size_t cmd_count = sizeof(i8042_cmds) / sizeof(irq_cmd_t);
244 irq_cmd_t cmds[cmd_count];
[ee163b3]245 memcpy(cmds, i8042_cmds, sizeof(i8042_cmds));
[cccdb8b7]246 cmds[0].addr = (void *) &(((i8042_regs_t *) regs)->status);
247 cmds[3].addr = (void *) &(((i8042_regs_t *) regs)->data);
[ee163b3]248
[2507d1fc]249 irq_code_t irq_code = {
250 .rangecount = range_count,
251 .ranges = ranges,
252 .cmdcount = cmd_count,
253 .cmds = cmds
254 };
[ee163b3]255 ret = register_interrupt_handler(ddf_dev, irq_kbd, i8042_irq_handler,
256 &irq_code);
257 CHECK_RET_UNBIND_DESTROY(ret,
[9b56a8dd]258 "Failed set handler for kbd: %s.", str_error(ret));
[ee163b3]259
260 ret = register_interrupt_handler(ddf_dev, irq_mouse, i8042_irq_handler,
261 &irq_code);
262 CHECK_RET_UNBIND_DESTROY(ret,
[9b56a8dd]263 "Failed set handler for mouse: %s.", str_error(ret));
[ee163b3]264
[b1f44b4]265 /* Enable interrupts */
266 async_sess_t *parent_sess =
267 devman_parent_device_connect(EXCHANGE_SERIALIZE, ddf_dev->handle,
268 IPC_FLAG_BLOCKING);
269 ret = parent_sess ? EOK : ENOMEM;
[9b56a8dd]270 CHECK_RET_UNBIND_DESTROY(ret, "Failed to create parent connection.");
[a8f7029]271
[b1f44b4]272 const bool enabled = hw_res_enable_interrupt(parent_sess);
273 async_hangup(parent_sess);
274 ret = enabled ? EOK : EIO;
[9b56a8dd]275 CHECK_RET_UNBIND_DESTROY(ret, "Failed to enable interrupts: %s.");
[ee163b3]276
[7cb0cb4]277 /* Enable port interrupts. */
[dd28c1a]278 wait_ready(dev);
[78aa0ab]279 pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB);
[dd28c1a]280 wait_ready(dev);
[78aa0ab]281 pio_write_8(&dev->regs->data, i8042_KBD_IE | i8042_KBD_TRANSLATE |
[a2bd204f]282 i8042_AUX_IE);
283
[b1f44b4]284 return EOK;
[a2bd204f]285}
[8bb9540]286
[bd87ae0]287// TODO use shared instead this
[a455321]288enum {
289 IPC_CHAR_READ = DEV_FIRST_CUSTOM_METHOD,
290 IPC_CHAR_WRITE,
291};
292
293/** Write data to i8042 port.
[336f03b]294 * @param fun DDF function.
295 * @param buffer Data source.
296 * @param size Data size.
297 * @return Bytes written.
298 */
[a455321]299static int i8042_write(ddf_fun_t *fun, char *buffer, size_t size)
[a8f7029]300{
301 assert(fun);
302 assert(fun->driver_data);
303 i8042_t *controller = fun->driver_data;
[9f97ffe]304 fibril_mutex_lock(&controller->write_guard);
[a8f7029]305 for (size_t i = 0; i < size; ++i) {
[336f03b]306 wait_ready(controller);
[a455321]307 if (controller->aux_fun == fun)
308 pio_write_8(
309 &controller->regs->status, i8042_CMD_WRITE_AUX);
[a8f7029]310 pio_write_8(&controller->regs->data, buffer[i]);
311 }
[9f97ffe]312 fibril_mutex_unlock(&controller->write_guard);
[e747303]313 return size;
[a8f7029]314}
[8bb9540]315
[a455321]316/** Read data from i8042 port.
[336f03b]317 * @param fun DDF function.
318 * @param buffer Data place.
319 * @param size Data place size.
320 * @return Bytes read.
321 */
[a455321]322static int i8042_read(ddf_fun_t *fun, char *data, size_t size)
[a8f7029]323{
324 assert(fun);
325 assert(fun->driver_data);
326
327 i8042_t *controller = fun->driver_data;
[a455321]328 buffer_t *buffer = (fun == controller->aux_fun) ?
329 &controller->aux_buffer : &controller->kbd_buffer;
[9f97ffe]330 for (size_t i = 0; i < size; ++i) {
[a455321]331 *data++ = buffer_read(buffer);
[a8f7029]332 }
[e747303]333 return size;
[a8f7029]334}
[a455321]335
[bd87ae0]336/** Handle data requests.
337 * @param fun ddf_fun_t function.
338 * @param id callid
339 * @param call IPC request.
340 */
[a455321]341void default_handler(ddf_fun_t *fun, ipc_callid_t id, ipc_call_t *call)
342{
343 const sysarg_t method = IPC_GET_IMETHOD(*call);
344 const size_t size = IPC_GET_ARG1(*call);
345 switch (method) {
346 case IPC_CHAR_READ:
347 if (size <= 4 * sizeof(sysarg_t)) {
[22e4e9b]348 sysarg_t message[4] = {};
[a455321]349 i8042_read(fun, (char*)message, size);
350 async_answer_4(id, size, message[0], message[1],
351 message[2], message[3]);
352 } else {
353 async_answer_0(id, ELIMIT);
354 }
355 break;
356
357 case IPC_CHAR_WRITE:
358 if (size <= 3 * sizeof(sysarg_t)) {
359 const sysarg_t message[3] = {
360 IPC_GET_ARG2(*call), IPC_GET_ARG3(*call),
361 IPC_GET_ARG4(*call) };
362 i8042_write(fun, (char*)message, size);
363 async_answer_0(id, size);
364 } else {
365 async_answer_0(id, ELIMIT);
366 }
367
368 default:
369 async_answer_0(id, EINVAL);
370 }
371}
[a2bd204f]372/**
373 * @}
374 */
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