source: mainline/uspace/drv/bus/usb/xhci/trb_ring.c@ e454d9c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e454d9c was 8033f89, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: cstyle

  • Property mode set to 100644
File size: 13.0 KB
Line 
1/*
2 * Copyright (c) 2017 Ondrej Hlavaty
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <errno.h>
30#include <assert.h>
31#include <ddi.h>
32#include <as.h>
33#include <align.h>
34#include <libarch/barrier.h>
35#include <usb/debug.h>
36#include "hw_struct/trb.h"
37#include "trb_ring.h"
38
39/**
40 * A structure representing a segment of a TRB ring.
41 */
42
43#define SEGMENT_FOOTER_SIZE (sizeof(link_t) + sizeof(uintptr_t))
44
45#define SEGMENT_TRB_COUNT ((PAGE_SIZE - SEGMENT_FOOTER_SIZE) / sizeof(xhci_trb_t))
46#define SEGMENT_TRB_USEFUL_COUNT (SEGMENT_TRB_COUNT - 1)
47
48struct trb_segment {
49 xhci_trb_t trb_storage [SEGMENT_TRB_COUNT];
50
51 link_t segments_link;
52 uintptr_t phys;
53} __attribute__((aligned(PAGE_SIZE)));
54
55static_assert(sizeof(trb_segment_t) == PAGE_SIZE);
56
57
58/**
59 * Get the first TRB of a segment.
60 */
61static inline xhci_trb_t *segment_begin(trb_segment_t *segment)
62{
63 return segment->trb_storage;
64}
65
66/**
67 * Get the one-past-end TRB of a segment.
68 */
69static inline xhci_trb_t *segment_end(trb_segment_t *segment)
70{
71 return segment_begin(segment) + SEGMENT_TRB_COUNT;
72}
73
74/**
75 * Return a first segment of a list of segments.
76 */
77static inline trb_segment_t *get_first_segment(list_t *segments)
78{
79 return list_get_instance(list_first(segments), trb_segment_t, segments_link);
80
81}
82
83/**
84 * Allocate and initialize new segment.
85 *
86 * TODO: When the HC supports 64-bit addressing, there's no need to restrict
87 * to DMAMEM_4GiB.
88 */
89static int trb_segment_alloc(trb_segment_t **segment)
90{
91 dma_buffer_t dbuf;
92
93 const int err = dma_buffer_alloc(&dbuf, PAGE_SIZE);
94 if (err)
95 return err;
96
97 *segment = dbuf.virt;
98 memset(*segment, 0, PAGE_SIZE);
99 (*segment)->phys = dbuf.phys;
100 usb_log_debug("Allocated new ring segment.");
101 return EOK;
102}
103
104static void trb_segment_free(trb_segment_t *segment)
105{
106 dma_buffer_t dbuf = { .virt = segment, .phys = segment->phys };
107 dma_buffer_free(&dbuf);
108}
109
110/**
111 * Initializes the ring with one segment.
112 *
113 * @param[in] initial_size A number of free slots on the ring, 0 leaves the
114 * choice on a reasonable default (one page-sized segment).
115 */
116int xhci_trb_ring_init(xhci_trb_ring_t *ring, size_t initial_size)
117{
118 int err;
119 if (initial_size == 0)
120 initial_size = SEGMENT_TRB_USEFUL_COUNT;
121
122 list_initialize(&ring->segments);
123 size_t segment_count = (initial_size + SEGMENT_TRB_USEFUL_COUNT - 1)
124 / SEGMENT_TRB_USEFUL_COUNT;
125
126 for (size_t i = 0; i < segment_count; ++i) {
127 struct trb_segment *segment;
128 if ((err = trb_segment_alloc(&segment)) != EOK)
129 return err;
130
131 list_append(&segment->segments_link, &ring->segments);
132 ring->segment_count = i + 1;
133 }
134
135 trb_segment_t * const segment = get_first_segment(&ring->segments);
136 xhci_trb_t *last = segment_end(segment) - 1;
137 xhci_trb_link_fill(last, segment->phys);
138 TRB_LINK_SET_TC(*last, true);
139
140 ring->enqueue_segment = segment;
141 ring->enqueue_trb = segment_begin(segment);
142 ring->dequeue = segment->phys;
143 ring->pcs = 1;
144
145 fibril_mutex_initialize(&ring->guard);
146
147 return EOK;
148}
149
150/**
151 * Free all segments inside the ring.
152 */
153void xhci_trb_ring_fini(xhci_trb_ring_t *ring)
154{
155 assert(ring);
156
157 list_foreach_safe(ring->segments, cur, next) {
158 trb_segment_t *segment =
159 list_get_instance(cur, trb_segment_t, segments_link);
160 trb_segment_free(segment);
161 }
162}
163
164/**
165 * When the enqueue pointer targets a Link TRB, resolve it.
166 *
167 * Relies on segments being in the segment list in linked order.
168 *
169 * According to section 4.9.2.2, figure 16, the link TRBs cannot be chained, so
170 * it shall not be called in cycle, nor have an inner cycle.
171 */
172static void trb_ring_resolve_link(xhci_trb_ring_t *ring)
173{
174 link_t *next_segment =
175 list_next(&ring->enqueue_segment->segments_link, &ring->segments);
176 if (!next_segment)
177 next_segment = list_first(&ring->segments);
178 assert(next_segment);
179
180 ring->enqueue_segment =
181 list_get_instance(next_segment, trb_segment_t, segments_link);
182 ring->enqueue_trb = segment_begin(ring->enqueue_segment);
183}
184
185/**
186 * Get the physical address of the enqueue pointer.
187 */
188static uintptr_t trb_ring_enqueue_phys(xhci_trb_ring_t *ring)
189{
190 uintptr_t trb_id = ring->enqueue_trb - segment_begin(ring->enqueue_segment);
191 return ring->enqueue_segment->phys + trb_id * sizeof(xhci_trb_t);
192}
193
194/**
195 * Decides whether the TRB will trigger an interrupt after being processed.
196 */
197static bool trb_generates_interrupt(xhci_trb_t *trb)
198{
199 return TRB_TYPE(*trb) >= XHCI_TRB_TYPE_ENABLE_SLOT_CMD
200 || TRB_IOC(*trb);
201}
202
203/**
204 * Enqueue TD composed of TRBs.
205 *
206 * This will copy specified number of TRBs chained together into the ring. The
207 * cycle flag in TRBs may be changed.
208 *
209 * The copied TRBs must be contiguous in memory, and must not contain Link TRBs.
210 *
211 * We cannot avoid the copying, because the TRB in ring should be updated
212 * atomically.
213 *
214 * @param first_trb the first TRB
215 * @param trbs number of TRBS to enqueue
216 * @param phys returns address of the last TRB enqueued
217 * @return EOK on success,
218 * EAGAIN when the ring is too full to fit all TRBs (temporary)
219 */
220int xhci_trb_ring_enqueue_multiple(xhci_trb_ring_t *ring, xhci_trb_t *first_trb,
221 size_t trbs, uintptr_t *phys)
222{
223 int err;
224 assert(trbs > 0);
225 fibril_mutex_lock(&ring->guard);
226
227 xhci_trb_t * const saved_enqueue_trb = ring->enqueue_trb;
228 trb_segment_t * const saved_enqueue_segment = ring->enqueue_segment;
229 if (phys)
230 *phys = (uintptr_t)NULL;
231
232 /*
233 * First, dry run and advance the enqueue pointer to see if the ring would
234 * be full anytime during the transaction.
235 */
236 xhci_trb_t *trb = first_trb;
237 for (size_t i = 0; i < trbs; ++i, ++trb) {
238 if (phys && trb_generates_interrupt(trb)) {
239 if (*phys) {
240 err = ENOTSUP;
241 goto err;
242 }
243 *phys = trb_ring_enqueue_phys(ring);
244 }
245
246 ring->enqueue_trb++;
247
248 if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK)
249 trb_ring_resolve_link(ring);
250
251 if (trb_ring_enqueue_phys(ring) == ring->dequeue) {
252 err = EAGAIN;
253 goto err;
254 }
255 }
256
257 ring->enqueue_segment = saved_enqueue_segment;
258 ring->enqueue_trb = saved_enqueue_trb;
259
260 /*
261 * Now, copy the TRBs without further checking.
262 */
263 trb = first_trb;
264 for (size_t i = 0; i < trbs; ++i, ++trb) {
265 TRB_SET_CYCLE(*trb, ring->pcs);
266 xhci_trb_copy_to_pio(ring->enqueue_trb, trb);
267
268 usb_log_debug2("TRB ring(%p): Enqueued TRB %p", ring, trb);
269 ring->enqueue_trb++;
270
271 if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK) {
272 TRB_SET_CYCLE(*ring->enqueue_trb, ring->pcs);
273
274 if (TRB_LINK_TC(*ring->enqueue_trb)) {
275 ring->pcs = !ring->pcs;
276 usb_log_debug("TRB ring(%p): PCS toggled", ring);
277 }
278
279 trb_ring_resolve_link(ring);
280 }
281 }
282
283 fibril_mutex_unlock(&ring->guard);
284 return EOK;
285
286err:
287 ring->enqueue_segment = saved_enqueue_segment;
288 ring->enqueue_trb = saved_enqueue_trb;
289 fibril_mutex_unlock(&ring->guard);
290 return err;
291}
292
293/**
294 * Enqueue TD composed of a single TRB. See: `xhci_trb_ring_enqueue_multiple`
295 */
296int xhci_trb_ring_enqueue(xhci_trb_ring_t *ring, xhci_trb_t *td, uintptr_t *phys)
297{
298 return xhci_trb_ring_enqueue_multiple(ring, td, 1, phys);
299}
300
301void xhci_trb_ring_reset_dequeue_state(xhci_trb_ring_t *ring, uintptr_t *addr)
302{
303 assert(ring);
304
305 ring->dequeue = trb_ring_enqueue_phys(ring);
306
307 if (addr)
308 *addr = ring->dequeue | ring->pcs;
309}
310
311/**
312 * Initializes an event ring.
313 *
314 * @param[in] initial_size A number of free slots on the ring, 0 leaves the
315 * choice on a reasonable default (one page-sized segment).
316 */
317int xhci_event_ring_init(xhci_event_ring_t *ring, size_t initial_size)
318{
319 int err;
320 if (initial_size == 0)
321 initial_size = SEGMENT_TRB_COUNT;
322
323 list_initialize(&ring->segments);
324
325 size_t segment_count = (initial_size + SEGMENT_TRB_COUNT - 1) / SEGMENT_TRB_COUNT;
326 size_t erst_size = segment_count * sizeof(xhci_erst_entry_t);
327
328 if (dma_buffer_alloc(&ring->erst, erst_size)) {
329 xhci_event_ring_fini(ring);
330 return ENOMEM;
331 }
332
333 xhci_erst_entry_t *erst = ring->erst.virt;
334 memset(erst, 0, erst_size);
335
336 for (size_t i = 0; i < segment_count; i++) {
337 trb_segment_t *segment;
338 if ((err = trb_segment_alloc(&segment)) != EOK) {
339 xhci_event_ring_fini(ring);
340 return err;
341 }
342
343 list_append(&segment->segments_link, &ring->segments);
344 ring->segment_count = i + 1;
345 xhci_fill_erst_entry(&erst[i], segment->phys, SEGMENT_TRB_COUNT);
346 }
347
348 trb_segment_t * const segment = get_first_segment(&ring->segments);
349 ring->dequeue_segment = segment;
350 ring->dequeue_trb = segment_begin(segment);
351 ring->dequeue_ptr = segment->phys;
352 ring->ccs = 1;
353
354 fibril_mutex_initialize(&ring->guard);
355
356 usb_log_debug("Initialized event ring.");
357 return EOK;
358}
359
360void xhci_event_ring_fini(xhci_event_ring_t *ring)
361{
362 list_foreach_safe(ring->segments, cur, next) {
363 trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
364 trb_segment_free(segment);
365 }
366
367 dma_buffer_free(&ring->erst);
368}
369
370/**
371 * Get the physical address of the dequeue pointer.
372 */
373static uintptr_t event_ring_dequeue_phys(xhci_event_ring_t *ring)
374{
375 uintptr_t trb_id = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
376 return ring->dequeue_segment->phys + trb_id * sizeof(xhci_trb_t);
377}
378
379/**
380 * Fill the event with next valid event from the ring.
381 *
382 * @param event pointer to event to be overwritten
383 * @return EOK on success,
384 * ENOENT when the ring is empty
385 */
386int xhci_event_ring_dequeue(xhci_event_ring_t *ring, xhci_trb_t *event)
387{
388 fibril_mutex_lock(&ring->guard);
389
390 /**
391 * The ERDP reported to the HC is a half-phase off the one we need to
392 * maintain. Therefore, we keep it extra.
393 */
394 ring->dequeue_ptr = event_ring_dequeue_phys(ring);
395
396 if (TRB_CYCLE(*ring->dequeue_trb) != ring->ccs) {
397 fibril_mutex_unlock(&ring->guard);
398 return ENOENT; /* The ring is empty. */
399 }
400
401 /* Do not reorder the Cycle bit reading with memcpy */
402 read_barrier();
403
404 memcpy(event, ring->dequeue_trb, sizeof(xhci_trb_t));
405
406 ring->dequeue_trb++;
407 const unsigned index = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
408
409 /* Wrapping around segment boundary */
410 if (index >= SEGMENT_TRB_COUNT) {
411 link_t *next_segment =
412 list_next(&ring->dequeue_segment->segments_link, &ring->segments);
413
414 /* Wrapping around table boundary */
415 if (!next_segment) {
416 next_segment = list_first(&ring->segments);
417 ring->ccs = !ring->ccs;
418 }
419
420 ring->dequeue_segment =
421 list_get_instance(next_segment, trb_segment_t, segments_link);
422 ring->dequeue_trb = segment_begin(ring->dequeue_segment);
423 }
424
425 fibril_mutex_unlock(&ring->guard);
426 return EOK;
427}
428
429void xhci_sw_ring_init(xhci_sw_ring_t *ring, size_t size)
430{
431 ring->begin = calloc(size, sizeof(xhci_trb_t));
432 ring->end = ring->begin + size;
433
434 ring->enqueue = ring->dequeue = ring->begin;
435
436 fibril_mutex_initialize(&ring->guard);
437 fibril_condvar_initialize(&ring->enqueued_cv);
438 fibril_condvar_initialize(&ring->dequeued_cv);
439
440 ring->running = true;
441}
442
443int xhci_sw_ring_enqueue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
444{
445 assert(ring);
446 assert(trb);
447
448 fibril_mutex_lock(&ring->guard);
449 while (ring->running && TRB_CYCLE(*ring->enqueue))
450 fibril_condvar_wait(&ring->dequeued_cv, &ring->guard);
451
452 *ring->enqueue = *trb;
453 TRB_SET_CYCLE(*ring->enqueue, 1);
454 if (++ring->enqueue == ring->end)
455 ring->enqueue = ring->begin;
456 fibril_condvar_signal(&ring->enqueued_cv);
457 fibril_mutex_unlock(&ring->guard);
458
459 return ring->running ? EOK : EINTR;
460}
461
462int xhci_sw_ring_dequeue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
463{
464 assert(ring);
465 assert(trb);
466
467 fibril_mutex_lock(&ring->guard);
468 while (ring->running && !TRB_CYCLE(*ring->dequeue))
469 fibril_condvar_wait(&ring->enqueued_cv, &ring->guard);
470
471 *trb = *ring->dequeue;
472 TRB_SET_CYCLE(*ring->dequeue, 0);
473 if (++ring->dequeue == ring->end)
474 ring->dequeue = ring->begin;
475 fibril_condvar_signal(&ring->dequeued_cv);
476 fibril_mutex_unlock(&ring->guard);
477
478 return ring->running ? EOK : EINTR;
479}
480
481void xhci_sw_ring_stop(xhci_sw_ring_t *ring)
482{
483 ring->running = false;
484 fibril_condvar_broadcast(&ring->enqueued_cv);
485 fibril_condvar_broadcast(&ring->dequeued_cv);
486}
487
488void xhci_sw_ring_fini(xhci_sw_ring_t *ring)
489{
490 free(ring->begin);
491}
492
493/**
494 * @}
495 */
Note: See TracBrowser for help on using the repository browser.