1 | /*
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2 | * Copyright (c) 2017 Ondrej Hlavaty
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | #include <errno.h>
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30 | #include <assert.h>
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31 | #include <ddi.h>
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32 | #include <as.h>
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33 | #include <align.h>
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34 | #include <libarch/barrier.h>
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35 | #include <usb/debug.h>
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36 | #include "hw_struct/trb.h"
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37 | #include "trb_ring.h"
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38 |
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39 | /**
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40 | * A structure representing a segment of a TRB ring.
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41 | */
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42 |
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43 | #define SEGMENT_FOOTER_SIZE (sizeof(link_t) + sizeof(uintptr_t))
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44 |
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45 | #define SEGMENT_TRB_COUNT ((PAGE_SIZE - SEGMENT_FOOTER_SIZE) / sizeof(xhci_trb_t))
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46 | #define SEGMENT_TRB_USEFUL_COUNT (SEGMENT_TRB_COUNT - 1)
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47 |
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48 | struct trb_segment {
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49 | xhci_trb_t trb_storage [SEGMENT_TRB_COUNT];
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50 |
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51 | link_t segments_link;
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52 | uintptr_t phys;
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53 | } __attribute__((aligned(PAGE_SIZE)));
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54 |
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55 | static_assert(sizeof(trb_segment_t) == PAGE_SIZE);
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56 |
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57 |
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58 | /**
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59 | * Get the first TRB of a segment.
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60 | */
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61 | static inline xhci_trb_t *segment_begin(trb_segment_t *segment)
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62 | {
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63 | return segment->trb_storage;
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64 | }
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65 |
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66 | /**
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67 | * Get the one-past-end TRB of a segment.
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68 | */
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69 | static inline xhci_trb_t *segment_end(trb_segment_t *segment)
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70 | {
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71 | return segment_begin(segment) + SEGMENT_TRB_COUNT;
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72 | }
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73 |
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74 | /**
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75 | * Return a first segment of a list of segments.
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76 | */
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77 | static inline trb_segment_t *get_first_segment(list_t *segments)
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78 | {
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79 | return list_get_instance(list_first(segments), trb_segment_t, segments_link);
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80 |
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81 | }
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82 |
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83 | /**
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84 | * Allocate and initialize new segment.
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85 | *
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86 | * TODO: When the HC supports 64-bit addressing, there's no need to restrict
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87 | * to DMAMEM_4GiB.
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88 | */
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89 | static int trb_segment_alloc(trb_segment_t **segment)
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90 | {
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91 | dma_buffer_t dbuf;
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92 |
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93 | const int err = dma_buffer_alloc(&dbuf, PAGE_SIZE);
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94 | if (err)
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95 | return err;
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96 |
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97 | *segment = dbuf.virt;
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98 | memset(*segment, 0, PAGE_SIZE);
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99 | (*segment)->phys = dbuf.phys;
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100 | usb_log_debug("Allocated new ring segment.");
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101 | return EOK;
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102 | }
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103 |
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104 | static void trb_segment_free(trb_segment_t *segment)
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105 | {
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106 | dma_buffer_t dbuf = { .virt = segment, .phys = segment->phys };
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107 | dma_buffer_free(&dbuf);
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108 | }
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109 |
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110 | /**
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111 | * Initializes the ring with one segment.
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112 | *
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113 | * @param[in] initial_size A number of free slots on the ring, 0 leaves the
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114 | * choice on a reasonable default (one page-sized segment).
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115 | */
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116 | int xhci_trb_ring_init(xhci_trb_ring_t *ring, size_t initial_size)
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117 | {
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118 | int err;
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119 | if (initial_size == 0)
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120 | initial_size = SEGMENT_TRB_USEFUL_COUNT;
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121 |
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122 | list_initialize(&ring->segments);
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123 | size_t segment_count = (initial_size + SEGMENT_TRB_USEFUL_COUNT - 1)
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124 | / SEGMENT_TRB_USEFUL_COUNT;
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125 |
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126 | for (size_t i = 0; i < segment_count; ++i) {
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127 | struct trb_segment *segment;
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128 | if ((err = trb_segment_alloc(&segment)) != EOK)
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129 | return err;
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130 |
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131 | list_append(&segment->segments_link, &ring->segments);
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132 | ring->segment_count = i + 1;
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133 | }
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134 |
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135 | trb_segment_t * const segment = get_first_segment(&ring->segments);
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136 | xhci_trb_t *last = segment_end(segment) - 1;
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137 | xhci_trb_link_fill(last, segment->phys);
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138 | TRB_LINK_SET_TC(*last, true);
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139 |
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140 | ring->enqueue_segment = segment;
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141 | ring->enqueue_trb = segment_begin(segment);
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142 | ring->dequeue = segment->phys;
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143 | ring->pcs = 1;
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144 |
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145 | fibril_mutex_initialize(&ring->guard);
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146 |
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147 | return EOK;
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148 | }
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149 |
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150 | /**
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151 | * Free all segments inside the ring.
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152 | */
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153 | void xhci_trb_ring_fini(xhci_trb_ring_t *ring)
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154 | {
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155 | assert(ring);
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156 |
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157 | list_foreach_safe(ring->segments, cur, next) {
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158 | trb_segment_t *segment =
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159 | list_get_instance(cur, trb_segment_t, segments_link);
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160 | trb_segment_free(segment);
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161 | }
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162 | }
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163 |
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164 | /**
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165 | * When the enqueue pointer targets a Link TRB, resolve it.
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166 | *
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167 | * Relies on segments being in the segment list in linked order.
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168 | *
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169 | * According to section 4.9.2.2, figure 16, the link TRBs cannot be chained, so
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170 | * it shall not be called in cycle, nor have an inner cycle.
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171 | */
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172 | static void trb_ring_resolve_link(xhci_trb_ring_t *ring)
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173 | {
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174 | link_t *next_segment =
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175 | list_next(&ring->enqueue_segment->segments_link, &ring->segments);
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176 | if (!next_segment)
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177 | next_segment = list_first(&ring->segments);
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178 | assert(next_segment);
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179 |
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180 | ring->enqueue_segment =
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181 | list_get_instance(next_segment, trb_segment_t, segments_link);
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182 | ring->enqueue_trb = segment_begin(ring->enqueue_segment);
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183 | }
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184 |
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185 | /**
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186 | * Get the physical address of the enqueue pointer.
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187 | */
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188 | static uintptr_t trb_ring_enqueue_phys(xhci_trb_ring_t *ring)
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189 | {
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190 | uintptr_t trb_id = ring->enqueue_trb - segment_begin(ring->enqueue_segment);
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191 | return ring->enqueue_segment->phys + trb_id * sizeof(xhci_trb_t);
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192 | }
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193 |
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194 | /**
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195 | * Decides whether the TRB will trigger an interrupt after being processed.
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196 | */
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197 | static bool trb_generates_interrupt(xhci_trb_t *trb)
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198 | {
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199 | return TRB_TYPE(*trb) >= XHCI_TRB_TYPE_ENABLE_SLOT_CMD
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200 | || TRB_IOC(*trb);
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201 | }
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202 |
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203 | /**
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204 | * Enqueue TD composed of TRBs.
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205 | *
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206 | * This will copy specified number of TRBs chained together into the ring. The
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207 | * cycle flag in TRBs may be changed.
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208 | *
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209 | * The copied TRBs must be contiguous in memory, and must not contain Link TRBs.
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210 | *
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211 | * We cannot avoid the copying, because the TRB in ring should be updated
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212 | * atomically.
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213 | *
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214 | * @param first_trb the first TRB
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215 | * @param trbs number of TRBS to enqueue
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216 | * @param phys returns address of the last TRB enqueued
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217 | * @return EOK on success,
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218 | * EAGAIN when the ring is too full to fit all TRBs (temporary)
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219 | */
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220 | int xhci_trb_ring_enqueue_multiple(xhci_trb_ring_t *ring, xhci_trb_t *first_trb,
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221 | size_t trbs, uintptr_t *phys)
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222 | {
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223 | int err;
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224 | assert(trbs > 0);
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225 | fibril_mutex_lock(&ring->guard);
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226 |
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227 | xhci_trb_t * const saved_enqueue_trb = ring->enqueue_trb;
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228 | trb_segment_t * const saved_enqueue_segment = ring->enqueue_segment;
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229 | if (phys)
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230 | *phys = (uintptr_t)NULL;
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231 |
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232 | /*
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233 | * First, dry run and advance the enqueue pointer to see if the ring would
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234 | * be full anytime during the transaction.
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235 | */
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236 | xhci_trb_t *trb = first_trb;
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237 | for (size_t i = 0; i < trbs; ++i, ++trb) {
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238 | if (phys && trb_generates_interrupt(trb)) {
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239 | if (*phys) {
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240 | err = ENOTSUP;
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241 | goto err;
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242 | }
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243 | *phys = trb_ring_enqueue_phys(ring);
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244 | }
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245 |
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246 | ring->enqueue_trb++;
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247 |
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248 | if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK)
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249 | trb_ring_resolve_link(ring);
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250 |
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251 | if (trb_ring_enqueue_phys(ring) == ring->dequeue) {
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252 | err = EAGAIN;
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253 | goto err;
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254 | }
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255 | }
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256 |
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257 | ring->enqueue_segment = saved_enqueue_segment;
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258 | ring->enqueue_trb = saved_enqueue_trb;
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259 |
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260 | /*
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261 | * Now, copy the TRBs without further checking.
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262 | */
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263 | trb = first_trb;
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264 | for (size_t i = 0; i < trbs; ++i, ++trb) {
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265 | TRB_SET_CYCLE(*trb, ring->pcs);
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266 | xhci_trb_copy_to_pio(ring->enqueue_trb, trb);
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267 |
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268 | usb_log_debug2("TRB ring(%p): Enqueued TRB %p", ring, trb);
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269 | ring->enqueue_trb++;
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270 |
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271 | if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK) {
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272 | TRB_SET_CYCLE(*ring->enqueue_trb, ring->pcs);
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273 |
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274 | if (TRB_LINK_TC(*ring->enqueue_trb)) {
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275 | ring->pcs = !ring->pcs;
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276 | usb_log_debug("TRB ring(%p): PCS toggled", ring);
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277 | }
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278 |
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279 | trb_ring_resolve_link(ring);
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280 | }
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281 | }
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282 |
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283 | fibril_mutex_unlock(&ring->guard);
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284 | return EOK;
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285 |
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286 | err:
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287 | ring->enqueue_segment = saved_enqueue_segment;
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288 | ring->enqueue_trb = saved_enqueue_trb;
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289 | fibril_mutex_unlock(&ring->guard);
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290 | return err;
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291 | }
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292 |
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293 | /**
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294 | * Enqueue TD composed of a single TRB. See: `xhci_trb_ring_enqueue_multiple`
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295 | */
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296 | int xhci_trb_ring_enqueue(xhci_trb_ring_t *ring, xhci_trb_t *td, uintptr_t *phys)
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297 | {
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298 | return xhci_trb_ring_enqueue_multiple(ring, td, 1, phys);
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299 | }
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300 |
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301 | void xhci_trb_ring_reset_dequeue_state(xhci_trb_ring_t *ring, uintptr_t *addr)
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302 | {
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303 | assert(ring);
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304 |
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305 | ring->dequeue = trb_ring_enqueue_phys(ring);
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306 |
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307 | if (addr)
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308 | *addr = ring->dequeue | ring->pcs;
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309 | }
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310 |
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311 | /**
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312 | * Initializes an event ring.
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313 | *
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314 | * @param[in] initial_size A number of free slots on the ring, 0 leaves the
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315 | * choice on a reasonable default (one page-sized segment).
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316 | */
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317 | int xhci_event_ring_init(xhci_event_ring_t *ring, size_t initial_size)
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318 | {
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319 | int err;
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320 | if (initial_size == 0)
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321 | initial_size = SEGMENT_TRB_COUNT;
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322 |
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323 | list_initialize(&ring->segments);
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324 |
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325 | size_t segment_count = (initial_size + SEGMENT_TRB_COUNT - 1) / SEGMENT_TRB_COUNT;
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326 | size_t erst_size = segment_count * sizeof(xhci_erst_entry_t);
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327 |
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328 | if (dma_buffer_alloc(&ring->erst, erst_size)) {
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329 | xhci_event_ring_fini(ring);
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330 | return ENOMEM;
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331 | }
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332 |
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333 | xhci_erst_entry_t *erst = ring->erst.virt;
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334 | memset(erst, 0, erst_size);
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335 |
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336 | for (size_t i = 0; i < segment_count; i++) {
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337 | trb_segment_t *segment;
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338 | if ((err = trb_segment_alloc(&segment)) != EOK) {
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339 | xhci_event_ring_fini(ring);
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340 | return err;
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341 | }
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342 |
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343 | list_append(&segment->segments_link, &ring->segments);
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344 | ring->segment_count = i + 1;
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345 | xhci_fill_erst_entry(&erst[i], segment->phys, SEGMENT_TRB_COUNT);
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346 | }
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347 |
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348 | trb_segment_t * const segment = get_first_segment(&ring->segments);
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349 | ring->dequeue_segment = segment;
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350 | ring->dequeue_trb = segment_begin(segment);
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351 | ring->dequeue_ptr = segment->phys;
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352 | ring->ccs = 1;
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353 |
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354 | fibril_mutex_initialize(&ring->guard);
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355 |
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356 | usb_log_debug("Initialized event ring.");
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357 | return EOK;
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358 | }
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359 |
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360 | void xhci_event_ring_fini(xhci_event_ring_t *ring)
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361 | {
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362 | list_foreach_safe(ring->segments, cur, next) {
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363 | trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
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364 | trb_segment_free(segment);
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365 | }
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366 |
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367 | dma_buffer_free(&ring->erst);
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368 | }
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369 |
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370 | /**
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371 | * Get the physical address of the dequeue pointer.
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372 | */
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373 | static uintptr_t event_ring_dequeue_phys(xhci_event_ring_t *ring)
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374 | {
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375 | uintptr_t trb_id = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
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376 | return ring->dequeue_segment->phys + trb_id * sizeof(xhci_trb_t);
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377 | }
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378 |
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379 | /**
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380 | * Fill the event with next valid event from the ring.
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381 | *
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382 | * @param event pointer to event to be overwritten
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383 | * @return EOK on success,
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384 | * ENOENT when the ring is empty
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385 | */
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386 | int xhci_event_ring_dequeue(xhci_event_ring_t *ring, xhci_trb_t *event)
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387 | {
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388 | fibril_mutex_lock(&ring->guard);
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389 |
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390 | /**
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391 | * The ERDP reported to the HC is a half-phase off the one we need to
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392 | * maintain. Therefore, we keep it extra.
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393 | */
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394 | ring->dequeue_ptr = event_ring_dequeue_phys(ring);
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395 |
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396 | if (TRB_CYCLE(*ring->dequeue_trb) != ring->ccs) {
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397 | fibril_mutex_unlock(&ring->guard);
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398 | return ENOENT; /* The ring is empty. */
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399 | }
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400 |
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401 | /* Do not reorder the Cycle bit reading with memcpy */
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402 | read_barrier();
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403 |
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404 | memcpy(event, ring->dequeue_trb, sizeof(xhci_trb_t));
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405 |
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406 | ring->dequeue_trb++;
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407 | const unsigned index = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
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408 |
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409 | /* Wrapping around segment boundary */
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410 | if (index >= SEGMENT_TRB_COUNT) {
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411 | link_t *next_segment =
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412 | list_next(&ring->dequeue_segment->segments_link, &ring->segments);
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413 |
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414 | /* Wrapping around table boundary */
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415 | if (!next_segment) {
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416 | next_segment = list_first(&ring->segments);
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417 | ring->ccs = !ring->ccs;
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418 | }
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419 |
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420 | ring->dequeue_segment =
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421 | list_get_instance(next_segment, trb_segment_t, segments_link);
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422 | ring->dequeue_trb = segment_begin(ring->dequeue_segment);
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423 | }
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424 |
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425 | fibril_mutex_unlock(&ring->guard);
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426 | return EOK;
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427 | }
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428 |
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429 | void xhci_sw_ring_init(xhci_sw_ring_t *ring, size_t size)
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430 | {
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431 | ring->begin = calloc(size, sizeof(xhci_trb_t));
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432 | ring->end = ring->begin + size;
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433 |
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434 | ring->enqueue = ring->dequeue = ring->begin;
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435 |
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436 | fibril_mutex_initialize(&ring->guard);
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437 | fibril_condvar_initialize(&ring->enqueued_cv);
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438 | fibril_condvar_initialize(&ring->dequeued_cv);
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439 |
|
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440 | ring->running = true;
|
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441 | }
|
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442 |
|
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443 | int xhci_sw_ring_enqueue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
|
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444 | {
|
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445 | assert(ring);
|
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446 | assert(trb);
|
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447 |
|
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448 | fibril_mutex_lock(&ring->guard);
|
---|
449 | while (ring->running && TRB_CYCLE(*ring->enqueue))
|
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450 | fibril_condvar_wait(&ring->dequeued_cv, &ring->guard);
|
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451 |
|
---|
452 | *ring->enqueue = *trb;
|
---|
453 | TRB_SET_CYCLE(*ring->enqueue, 1);
|
---|
454 | if (++ring->enqueue == ring->end)
|
---|
455 | ring->enqueue = ring->begin;
|
---|
456 | fibril_condvar_signal(&ring->enqueued_cv);
|
---|
457 | fibril_mutex_unlock(&ring->guard);
|
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458 |
|
---|
459 | return ring->running ? EOK : EINTR;
|
---|
460 | }
|
---|
461 |
|
---|
462 | int xhci_sw_ring_dequeue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
|
---|
463 | {
|
---|
464 | assert(ring);
|
---|
465 | assert(trb);
|
---|
466 |
|
---|
467 | fibril_mutex_lock(&ring->guard);
|
---|
468 | while (ring->running && !TRB_CYCLE(*ring->dequeue))
|
---|
469 | fibril_condvar_wait(&ring->enqueued_cv, &ring->guard);
|
---|
470 |
|
---|
471 | *trb = *ring->dequeue;
|
---|
472 | TRB_SET_CYCLE(*ring->dequeue, 0);
|
---|
473 | if (++ring->dequeue == ring->end)
|
---|
474 | ring->dequeue = ring->begin;
|
---|
475 | fibril_condvar_signal(&ring->dequeued_cv);
|
---|
476 | fibril_mutex_unlock(&ring->guard);
|
---|
477 |
|
---|
478 | return ring->running ? EOK : EINTR;
|
---|
479 | }
|
---|
480 |
|
---|
481 | void xhci_sw_ring_stop(xhci_sw_ring_t *ring)
|
---|
482 | {
|
---|
483 | ring->running = false;
|
---|
484 | fibril_condvar_broadcast(&ring->enqueued_cv);
|
---|
485 | fibril_condvar_broadcast(&ring->dequeued_cv);
|
---|
486 | }
|
---|
487 |
|
---|
488 | void xhci_sw_ring_fini(xhci_sw_ring_t *ring)
|
---|
489 | {
|
---|
490 | free(ring->begin);
|
---|
491 | }
|
---|
492 |
|
---|
493 | /**
|
---|
494 | * @}
|
---|
495 | */
|
---|