1 | /*
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2 | * Copyright (c) 2017 Ondrej Hlavaty
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | #include <errno.h>
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30 | #include <assert.h>
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31 | #include <ddi.h>
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32 | #include <as.h>
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33 | #include <align.h>
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34 | #include <libarch/barrier.h>
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35 | #include <usb/debug.h>
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36 | #include "hw_struct/trb.h"
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37 | #include "trb_ring.h"
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38 |
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39 | #define SEGMENT_HEADER_SIZE (sizeof(link_t) + sizeof(uintptr_t))
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40 |
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41 | /**
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42 | * Number of TRBs in a segment (with our header).
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43 | */
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44 | #define SEGMENT_TRB_COUNT ((PAGE_SIZE - SEGMENT_HEADER_SIZE) / sizeof(xhci_trb_t))
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45 |
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46 | struct trb_segment {
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47 | xhci_trb_t trb_storage [SEGMENT_TRB_COUNT];
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48 |
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49 | link_t segments_link;
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50 | uintptr_t phys;
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51 | } __attribute__((aligned(PAGE_SIZE)));
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52 |
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53 |
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54 | /**
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55 | * Get the first TRB of a segment.
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56 | */
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57 | static inline xhci_trb_t *segment_begin(trb_segment_t *segment)
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58 | {
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59 | return segment->trb_storage;
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60 | }
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61 |
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62 | /**
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63 | * Get the one-past-end TRB of a segment.
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64 | */
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65 | static inline xhci_trb_t *segment_end(trb_segment_t *segment)
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66 | {
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67 | return segment_begin(segment) + SEGMENT_TRB_COUNT;
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68 | }
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69 |
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70 | /**
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71 | * Allocate and initialize new segment.
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72 | *
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73 | * TODO: When the HC supports 64-bit addressing, there's no need to restrict
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74 | * to DMAMEM_4GiB.
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75 | */
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76 | static int trb_segment_alloc(trb_segment_t **segment)
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77 | {
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78 | dma_buffer_t dbuf;
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79 |
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80 | const int err = dma_buffer_alloc(&dbuf, PAGE_SIZE);
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81 | if (err)
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82 | return err;
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83 |
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84 | *segment = dbuf.virt;
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85 | memset(*segment, 0, PAGE_SIZE);
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86 | (*segment)->phys = dbuf.phys;
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87 | usb_log_debug("Allocated new ring segment.");
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88 | return EOK;
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89 | }
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90 |
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91 | static void trb_segment_free(trb_segment_t *segment)
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92 | {
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93 | dma_buffer_t dbuf = { .virt = segment, .phys = segment->phys };
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94 | dma_buffer_free(&dbuf);
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95 | }
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96 |
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97 | /**
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98 | * Initializes the ring with one segment.
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99 | */
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100 | int xhci_trb_ring_init(xhci_trb_ring_t *ring)
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101 | {
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102 | struct trb_segment *segment;
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103 | int err;
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104 |
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105 | list_initialize(&ring->segments);
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106 |
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107 | if ((err = trb_segment_alloc(&segment)) != EOK)
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108 | return err;
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109 |
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110 | list_append(&segment->segments_link, &ring->segments);
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111 | ring->segment_count = 1;
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112 |
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113 | xhci_trb_t *last = segment_end(segment) - 1;
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114 | xhci_trb_link_fill(last, segment->phys);
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115 | TRB_LINK_SET_TC(*last, true);
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116 |
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117 | ring->enqueue_segment = segment;
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118 | ring->enqueue_trb = segment_begin(segment);
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119 | ring->dequeue = segment->phys;
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120 | ring->pcs = 1;
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121 |
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122 | fibril_mutex_initialize(&ring->guard);
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123 |
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124 | return EOK;
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125 | }
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126 |
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127 | /**
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128 | * Free all segments inside the ring.
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129 | */
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130 | void xhci_trb_ring_fini(xhci_trb_ring_t *ring)
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131 | {
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132 | assert(ring);
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133 |
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134 | list_foreach_safe(ring->segments, cur, next) {
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135 | trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
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136 | trb_segment_free(segment);
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137 | }
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138 | }
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139 |
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140 | /**
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141 | * When the enqueue pointer targets a Link TRB, resolve it.
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142 | *
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143 | * Relies on segments being in the segment list in linked order.
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144 | *
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145 | * According to section 4.9.2.2, figure 16, the link TRBs cannot be chained, so
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146 | * it shall not be called in cycle, nor have an inner cycle.
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147 | */
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148 | static void trb_ring_resolve_link(xhci_trb_ring_t *ring)
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149 | {
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150 | link_t *next_segment = list_next(&ring->enqueue_segment->segments_link, &ring->segments);
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151 | if (!next_segment)
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152 | next_segment = list_first(&ring->segments);
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153 | assert(next_segment);
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154 |
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155 | ring->enqueue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
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156 | ring->enqueue_trb = segment_begin(ring->enqueue_segment);
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157 | }
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158 |
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159 | /**
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160 | * Get the physical address of the enqueue pointer.
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161 | */
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162 | static uintptr_t trb_ring_enqueue_phys(xhci_trb_ring_t *ring)
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163 | {
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164 | uintptr_t trb_id = ring->enqueue_trb - segment_begin(ring->enqueue_segment);
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165 | return ring->enqueue_segment->phys + trb_id * sizeof(xhci_trb_t);
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166 | }
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167 |
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168 | /**
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169 | * Decides whether the TRB will trigger an interrupt after being processed.
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170 | */
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171 | static bool trb_generates_interrupt(xhci_trb_t *trb)
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172 | {
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173 | return TRB_TYPE(*trb) >= XHCI_TRB_TYPE_ENABLE_SLOT_CMD
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174 | || TRB_IOC(*trb);
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175 | }
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176 |
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177 | /**
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178 | * Enqueue TD composed of TRBs.
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179 | *
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180 | * This will copy specified number of TRBs chained together into the ring. The
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181 | * cycle flag in TRBs may be changed.
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182 | *
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183 | * The copied TRBs must be contiguous in memory, and must not contain Link TRBs.
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184 | *
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185 | * We cannot avoid the copying, because the TRB in ring should be updated atomically.
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186 | *
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187 | * @param first_trb the first TRB
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188 | * @param trbs number of TRBS to enqueue
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189 | * @param phys returns address of the last TRB enqueued
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190 | * @return EOK on success,
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191 | * EAGAIN when the ring is too full to fit all TRBs (temporary)
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192 | */
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193 | int xhci_trb_ring_enqueue_multiple(xhci_trb_ring_t *ring, xhci_trb_t *first_trb,
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194 | size_t trbs, uintptr_t *phys)
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195 | {
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196 | int err;
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197 | assert(trbs > 0);
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198 | fibril_mutex_lock(&ring->guard);
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199 |
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200 | xhci_trb_t * const saved_enqueue_trb = ring->enqueue_trb;
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201 | trb_segment_t * const saved_enqueue_segment = ring->enqueue_segment;
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202 | if (phys)
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203 | *phys = (uintptr_t)NULL;
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204 |
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205 | /*
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206 | * First, dry run and advance the enqueue pointer to see if the ring would
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207 | * be full anytime during the transaction.
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208 | */
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209 | xhci_trb_t *trb = first_trb;
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210 | for (size_t i = 0; i < trbs; ++i, ++trb) {
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211 | if (phys && trb_generates_interrupt(trb)) {
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212 | if (*phys) {
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213 | err = ENOTSUP;
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214 | goto err;
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215 | }
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216 | *phys = trb_ring_enqueue_phys(ring);
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217 | }
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218 |
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219 | ring->enqueue_trb++;
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220 |
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221 | if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK)
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222 | trb_ring_resolve_link(ring);
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223 |
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224 | if (trb_ring_enqueue_phys(ring) == ring->dequeue) {
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225 | err = EAGAIN;
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226 | goto err;
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227 | }
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228 | }
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229 |
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230 | ring->enqueue_segment = saved_enqueue_segment;
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231 | ring->enqueue_trb = saved_enqueue_trb;
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232 |
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233 | /*
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234 | * Now, copy the TRBs without further checking.
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235 | */
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236 | trb = first_trb;
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237 | for (size_t i = 0; i < trbs; ++i, ++trb) {
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238 | TRB_SET_CYCLE(*trb, ring->pcs);
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239 | xhci_trb_copy_to_pio(ring->enqueue_trb, trb);
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240 |
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241 | usb_log_debug2("TRB ring(%p): Enqueued TRB %p", ring, trb);
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242 | ring->enqueue_trb++;
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243 |
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244 | if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK) {
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245 | TRB_SET_CYCLE(*ring->enqueue_trb, ring->pcs);
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246 |
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247 | if (TRB_LINK_TC(*ring->enqueue_trb)) {
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248 | ring->pcs = !ring->pcs;
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249 | usb_log_debug("TRB ring(%p): PCS toggled", ring);
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250 | }
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251 |
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252 | trb_ring_resolve_link(ring);
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253 | }
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254 | }
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255 |
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256 | fibril_mutex_unlock(&ring->guard);
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257 | return EOK;
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258 |
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259 | err:
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260 | ring->enqueue_segment = saved_enqueue_segment;
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261 | ring->enqueue_trb = saved_enqueue_trb;
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262 | fibril_mutex_unlock(&ring->guard);
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263 | return err;
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264 | }
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265 |
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266 | /**
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267 | * Enqueue TD composed of a single TRB. See: `xhci_trb_ring_enqueue_multiple`
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268 | */
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269 | int xhci_trb_ring_enqueue(xhci_trb_ring_t *ring, xhci_trb_t *td, uintptr_t *phys)
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270 | {
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271 | return xhci_trb_ring_enqueue_multiple(ring, td, 1, phys);
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272 | }
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273 |
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274 | void xhci_trb_ring_reset_dequeue_state(xhci_trb_ring_t *ring, uintptr_t *addr)
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275 | {
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276 | assert(ring);
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277 |
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278 | ring->dequeue = trb_ring_enqueue_phys(ring);
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279 |
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280 | if (addr)
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281 | *addr = ring->dequeue | ring->pcs;
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282 | }
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283 |
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284 | /**
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285 | * Initializes an event ring.
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286 | */
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287 | int xhci_event_ring_init(xhci_event_ring_t *ring)
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288 | {
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289 | struct trb_segment *segment;
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290 | int err;
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291 |
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292 | list_initialize(&ring->segments);
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293 |
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294 | if ((err = trb_segment_alloc(&segment)) != EOK)
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295 | return err;
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296 |
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297 | list_append(&segment->segments_link, &ring->segments);
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298 | ring->segment_count = 1;
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299 |
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300 | ring->dequeue_segment = segment;
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301 | ring->dequeue_trb = segment_begin(segment);
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302 | ring->dequeue_ptr = segment->phys;
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303 |
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304 | if (dma_buffer_alloc(&ring->erst, PAGE_SIZE)) {
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305 | xhci_event_ring_fini(ring);
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306 | return ENOMEM;
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307 | }
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308 | xhci_erst_entry_t *erst = ring->erst.virt;
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309 |
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310 | memset(erst, 0, PAGE_SIZE);
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311 | xhci_fill_erst_entry(&erst[0], segment->phys, SEGMENT_TRB_COUNT);
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312 |
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313 | ring->ccs = 1;
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314 |
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315 | fibril_mutex_initialize(&ring->guard);
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316 |
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317 | usb_log_debug("Initialized event ring.");
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318 |
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319 | return EOK;
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320 | }
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321 |
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322 | void xhci_event_ring_fini(xhci_event_ring_t *ring)
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323 | {
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324 | list_foreach_safe(ring->segments, cur, next) {
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325 | trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
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326 | dmamem_unmap_anonymous(segment);
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327 | }
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328 |
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329 | dma_buffer_free(&ring->erst);
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330 | }
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331 |
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332 | /**
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333 | * Get the physical address of the dequeue pointer.
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334 | */
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335 | static uintptr_t event_ring_dequeue_phys(xhci_event_ring_t *ring)
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336 | {
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337 | uintptr_t trb_id = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
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338 | return ring->dequeue_segment->phys + trb_id * sizeof(xhci_trb_t);
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339 | }
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340 |
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341 | /**
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342 | * Fill the event with next valid event from the ring.
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343 | *
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344 | * @param event pointer to event to be overwritten
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345 | * @return EOK on success,
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346 | * ENOENT when the ring is empty
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347 | */
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348 | int xhci_event_ring_dequeue(xhci_event_ring_t *ring, xhci_trb_t *event)
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349 | {
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350 | fibril_mutex_lock(&ring->guard);
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351 |
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352 | /**
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353 | * The ERDP reported to the HC is a half-phase off the one we need to
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354 | * maintain. Therefore, we keep it extra.
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355 | */
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356 | ring->dequeue_ptr = event_ring_dequeue_phys(ring);
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357 |
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358 | if (TRB_CYCLE(*ring->dequeue_trb) != ring->ccs) {
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359 | fibril_mutex_unlock(&ring->guard);
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360 | return ENOENT; /* The ring is empty. */
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361 | }
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362 |
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363 | /* Do not reorder the Cycle bit reading with memcpy */
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364 | read_barrier();
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365 |
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366 | memcpy(event, ring->dequeue_trb, sizeof(xhci_trb_t));
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367 |
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368 | ring->dequeue_trb++;
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369 | const unsigned index = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
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370 |
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371 | /* Wrapping around segment boundary */
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372 | if (index >= SEGMENT_TRB_COUNT) {
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373 | link_t *next_segment = list_next(&ring->dequeue_segment->segments_link, &ring->segments);
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374 |
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375 | /* Wrapping around table boundary */
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376 | if (!next_segment) {
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377 | next_segment = list_first(&ring->segments);
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378 | ring->ccs = !ring->ccs;
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379 | }
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380 |
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381 | ring->dequeue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
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382 | ring->dequeue_trb = segment_begin(ring->dequeue_segment);
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383 | }
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384 |
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385 | fibril_mutex_unlock(&ring->guard);
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386 | return EOK;
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387 | }
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388 |
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389 | void xhci_sw_ring_init(xhci_sw_ring_t *ring, size_t size)
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390 | {
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391 | ring->begin = calloc(size, sizeof(xhci_trb_t));
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392 | ring->end = ring->begin + size;
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393 |
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394 | ring->enqueue = ring->dequeue = ring->begin;
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395 |
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396 | fibril_mutex_initialize(&ring->guard);
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397 | fibril_condvar_initialize(&ring->enqueued_cv);
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398 | fibril_condvar_initialize(&ring->dequeued_cv);
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399 |
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400 | ring->running = true;
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401 | }
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402 |
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403 | int xhci_sw_ring_enqueue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
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404 | {
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405 | assert(ring);
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406 | assert(trb);
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407 |
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408 | fibril_mutex_lock(&ring->guard);
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409 | while (ring->running && TRB_CYCLE(*ring->enqueue))
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410 | fibril_condvar_wait(&ring->dequeued_cv, &ring->guard);
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411 |
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412 | *ring->enqueue = *trb;
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413 | TRB_SET_CYCLE(*ring->enqueue, 1);
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414 | if (++ring->enqueue == ring->end)
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415 | ring->enqueue = ring->begin;
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416 | fibril_condvar_signal(&ring->enqueued_cv);
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417 | fibril_mutex_unlock(&ring->guard);
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418 |
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419 | return ring->running ? EOK : EINTR;
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420 | }
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421 |
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422 | int xhci_sw_ring_dequeue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
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423 | {
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424 | assert(ring);
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425 | assert(trb);
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426 |
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427 | fibril_mutex_lock(&ring->guard);
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428 | while (ring->running && !TRB_CYCLE(*ring->dequeue))
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429 | fibril_condvar_wait(&ring->enqueued_cv, &ring->guard);
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430 |
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431 | *trb = *ring->dequeue;
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432 | TRB_SET_CYCLE(*ring->dequeue, 0);
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433 | if (++ring->dequeue == ring->end)
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434 | ring->dequeue = ring->begin;
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435 | fibril_condvar_signal(&ring->dequeued_cv);
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436 | fibril_mutex_unlock(&ring->guard);
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437 |
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438 | return ring->running ? EOK : EINTR;
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439 | }
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440 |
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441 | void xhci_sw_ring_stop(xhci_sw_ring_t *ring)
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442 | {
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443 | ring->running = false;
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444 | fibril_condvar_broadcast(&ring->enqueued_cv);
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445 | fibril_condvar_broadcast(&ring->dequeued_cv);
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446 | }
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447 |
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448 | void xhci_sw_ring_fini(xhci_sw_ring_t *ring)
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449 | {
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450 | free(ring->begin);
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451 | }
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452 |
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453 | /**
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454 | * @}
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455 | */
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