source: mainline/uspace/drv/bus/usb/xhci/trb_ring.c@ 5dfb70c9

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5dfb70c9 was 74c0de0, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: add memory barrier to event ring

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File size: 9.7 KB
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1/*
2 * Copyright (c) 2017 Ondrej Hlavaty
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <errno.h>
30#include <assert.h>
31#include <ddi.h>
32#include <as.h>
33#include <align.h>
34#include <libarch/barrier.h>
35#include <usb/debug.h>
36#include "hw_struct/trb.h"
37#include "trb_ring.h"
38
39#define SEGMENT_HEADER_SIZE (sizeof(link_t) + sizeof(uintptr_t))
40
41/**
42 * Number of TRBs in a segment (with our header).
43 */
44#define SEGMENT_TRB_COUNT ((PAGE_SIZE - SEGMENT_HEADER_SIZE) / sizeof(xhci_trb_t))
45
46struct trb_segment {
47 xhci_trb_t trb_storage [SEGMENT_TRB_COUNT];
48
49 link_t segments_link;
50 uintptr_t phys;
51} __attribute__((aligned(PAGE_SIZE)));
52
53
54static inline xhci_trb_t *segment_begin(trb_segment_t *segment)
55{
56 return segment->trb_storage;
57}
58
59static inline xhci_trb_t *segment_end(trb_segment_t *segment)
60{
61 return segment_begin(segment) + SEGMENT_TRB_COUNT;
62}
63
64/**
65 * Allocate and initialize new segment.
66 *
67 * TODO: When the HC supports 64-bit addressing, there's no need to restrict
68 * to DMAMEM_4GiB.
69 */
70static int trb_segment_alloc(trb_segment_t **segment)
71{
72 dma_buffer_t dbuf;
73
74 const int err = dma_buffer_alloc(&dbuf, PAGE_SIZE);
75 if (err)
76 return err;
77
78 *segment = dbuf.virt;
79 memset(*segment, 0, PAGE_SIZE);
80 (*segment)->phys = dbuf.phys;
81 usb_log_debug2("Allocated new ring segment.");
82 return EOK;
83}
84
85static void trb_segment_free(trb_segment_t *segment)
86{
87 dma_buffer_t dbuf = { .virt = segment, .phys = segment->phys };
88 dma_buffer_free(&dbuf);
89}
90
91/**
92 * Initializes the ring with one segment.
93 * Event when it fails, the structure needs to be finalized.
94 */
95int xhci_trb_ring_init(xhci_trb_ring_t *ring)
96{
97 struct trb_segment *segment;
98 int err;
99
100 list_initialize(&ring->segments);
101
102 if ((err = trb_segment_alloc(&segment)) != EOK)
103 return err;
104
105 list_append(&segment->segments_link, &ring->segments);
106 ring->segment_count = 1;
107
108 xhci_trb_t *last = segment_end(segment) - 1;
109 xhci_trb_link_fill(last, segment->phys);
110 TRB_LINK_SET_TC(*last, true);
111
112 ring->enqueue_segment = segment;
113 ring->enqueue_trb = segment_begin(segment);
114 ring->dequeue = segment->phys;
115 ring->pcs = 1;
116
117 fibril_mutex_initialize(&ring->guard);
118
119 usb_log_debug2("Initialized new TRB ring.");
120
121 return EOK;
122}
123
124void xhci_trb_ring_fini(xhci_trb_ring_t *ring)
125{
126 assert(ring);
127
128 list_foreach_safe(ring->segments, cur, next) {
129 trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
130 trb_segment_free(segment);
131 }
132}
133
134/**
135 * When the enqueue pointer targets a Link TRB, resolve it.
136 *
137 * Relies on segments being in the segment list in linked order.
138 *
139 * According to section 4.9.2.2, figure 16, the link TRBs cannot be chained, so
140 * it shall not be called in cycle, nor have an inner cycle.
141 */
142static void trb_ring_resolve_link(xhci_trb_ring_t *ring)
143{
144 link_t *next_segment = list_next(&ring->enqueue_segment->segments_link, &ring->segments);
145 if (!next_segment)
146 next_segment = list_first(&ring->segments);
147
148 ring->enqueue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
149 ring->enqueue_trb = segment_begin(ring->enqueue_segment);
150}
151
152static uintptr_t trb_ring_enqueue_phys(xhci_trb_ring_t *ring)
153{
154 uintptr_t trb_id = ring->enqueue_trb - segment_begin(ring->enqueue_segment);
155 return ring->enqueue_segment->phys + trb_id * sizeof(xhci_trb_t);
156}
157
158static bool trb_generates_interrupt(xhci_trb_t *trb)
159{
160 return TRB_TYPE(*trb) >= XHCI_TRB_TYPE_ENABLE_SLOT_CMD
161 || TRB_IOC(*trb);
162}
163
164/**
165 * Enqueue TDs composed of TRBs.
166 *
167 * This will copy specified number of TRBs chained together into the ring. The
168 * cycle flag in TRBs may be changed.
169 *
170 * The copied TRBs must be contiguous in memory, and must not contain Link TRBs.
171 *
172 * We cannot avoid the copying, because the TRB in ring should be updated atomically.
173 *
174 * @param first_trb the first TRB
175 * @param trbs number of TRBS to enqueue
176 * @param phys returns address of the last TRB enqueued
177 * @return EOK on success,
178 * EAGAIN when the ring is too full to fit all TRBs (temporary)
179 */
180int xhci_trb_ring_enqueue_multiple(xhci_trb_ring_t *ring, xhci_trb_t *first_trb,
181 size_t trbs, uintptr_t *phys)
182{
183 assert(trbs > 0);
184 fibril_mutex_lock(&ring->guard);
185
186 xhci_trb_t * const saved_enqueue_trb = ring->enqueue_trb;
187 trb_segment_t * const saved_enqueue_segment = ring->enqueue_segment;
188 if (phys)
189 *phys = (uintptr_t)NULL;
190
191 /*
192 * First, dry run and advance the enqueue pointer to see if the ring would
193 * be full anytime during the transaction.
194 */
195 xhci_trb_t *trb = first_trb;
196 for (size_t i = 0; i < trbs; ++i, ++trb) {
197 if (trb_generates_interrupt(trb)) {
198 if (*phys)
199 return ENOTSUP;
200 *phys = trb_ring_enqueue_phys(ring);
201 }
202
203 ring->enqueue_trb++;
204
205 if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK)
206 trb_ring_resolve_link(ring);
207
208 if (trb_ring_enqueue_phys(ring) == ring->dequeue)
209 goto err_again;
210 }
211
212 ring->enqueue_segment = saved_enqueue_segment;
213 ring->enqueue_trb = saved_enqueue_trb;
214
215 /*
216 * Now, copy the TRBs without further checking.
217 */
218 trb = first_trb;
219 for (size_t i = 0; i < trbs; ++i, ++trb) {
220 TRB_SET_CYCLE(*trb, ring->pcs);
221 xhci_trb_copy_to_pio(ring->enqueue_trb, trb);
222
223 usb_log_debug2("TRB ring(%p): Enqueued TRB %p", ring, trb);
224 ring->enqueue_trb++;
225
226 if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK) {
227 TRB_SET_CYCLE(*ring->enqueue_trb, ring->pcs);
228
229 if (TRB_LINK_TC(*ring->enqueue_trb)) {
230 ring->pcs = !ring->pcs;
231 usb_log_debug2("TRB ring(%p): PCS toggled", ring);
232 }
233
234 trb_ring_resolve_link(ring);
235 }
236 }
237
238 fibril_mutex_unlock(&ring->guard);
239 return EOK;
240
241err_again:
242 ring->enqueue_segment = saved_enqueue_segment;
243 ring->enqueue_trb = saved_enqueue_trb;
244 fibril_mutex_unlock(&ring->guard);
245 return EAGAIN;
246}
247
248/**
249 * Enqueue TD composed of a single TRB. See: `xhci_trb_ring_enqueue_multiple`
250 */
251int xhci_trb_ring_enqueue(xhci_trb_ring_t *ring, xhci_trb_t *td, uintptr_t *phys)
252{
253 return xhci_trb_ring_enqueue_multiple(ring, td, 1, phys);
254}
255
256/**
257 * Initializes an event ring.
258 * Even when it fails, the structure needs to be finalized.
259 */
260int xhci_event_ring_init(xhci_event_ring_t *ring)
261{
262 struct trb_segment *segment;
263 int err;
264
265 list_initialize(&ring->segments);
266
267 if ((err = trb_segment_alloc(&segment)) != EOK)
268 return err;
269
270 list_append(&segment->segments_link, &ring->segments);
271 ring->segment_count = 1;
272
273 ring->dequeue_segment = segment;
274 ring->dequeue_trb = segment_begin(segment);
275 ring->dequeue_ptr = segment->phys;
276
277 if (dma_buffer_alloc(&ring->erst, PAGE_SIZE))
278 return ENOMEM;
279 xhci_erst_entry_t *erst = ring->erst.virt;
280
281 memset(erst, 0, PAGE_SIZE);
282 xhci_fill_erst_entry(&erst[0], segment->phys, SEGMENT_TRB_COUNT);
283
284 ring->ccs = 1;
285
286 fibril_mutex_initialize(&ring->guard);
287
288 usb_log_debug("Initialized event ring.");
289
290 return EOK;
291}
292
293void xhci_event_ring_fini(xhci_event_ring_t *ring)
294{
295 list_foreach_safe(ring->segments, cur, next) {
296 trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
297 dmamem_unmap_anonymous(segment);
298 }
299
300 dma_buffer_free(&ring->erst);
301}
302
303static uintptr_t event_ring_dequeue_phys(xhci_event_ring_t *ring)
304{
305 uintptr_t trb_id = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
306 return ring->dequeue_segment->phys + trb_id * sizeof(xhci_trb_t);
307}
308
309/**
310 * Fill the event with next valid event from the ring.
311 *
312 * @param event pointer to event to be overwritten
313 * @return EOK on success,
314 * ENOENT when the ring is empty
315 */
316int xhci_event_ring_dequeue(xhci_event_ring_t *ring, xhci_trb_t *event)
317{
318 fibril_mutex_lock(&ring->guard);
319
320 /**
321 * The ERDP reported to the HC is a half-phase off the one we need to
322 * maintain. Therefore, we keep it extra.
323 */
324 ring->dequeue_ptr = event_ring_dequeue_phys(ring);
325
326 if (TRB_CYCLE(*ring->dequeue_trb) != ring->ccs) {
327 fibril_mutex_unlock(&ring->guard);
328 return ENOENT; /* The ring is empty. */
329 }
330
331 /* Do not reorder the Cycle bit reading with memcpy */
332 read_barrier();
333
334 memcpy(event, ring->dequeue_trb, sizeof(xhci_trb_t));
335
336 ring->dequeue_trb++;
337 const unsigned index = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
338
339 /* Wrapping around segment boundary */
340 if (index >= SEGMENT_TRB_COUNT) {
341 link_t *next_segment = list_next(&ring->dequeue_segment->segments_link, &ring->segments);
342
343 /* Wrapping around table boundary */
344 if (!next_segment) {
345 next_segment = list_first(&ring->segments);
346 ring->ccs = !ring->ccs;
347 }
348
349 ring->dequeue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
350 ring->dequeue_trb = segment_begin(ring->dequeue_segment);
351 }
352
353 fibril_mutex_unlock(&ring->guard);
354 return EOK;
355}
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