source: mainline/uspace/drv/bus/usb/xhci/trb_ring.c@ 34d750c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 34d750c was 998773d, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci trb_ring: make initial ring size variable

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File size: 13.0 KB
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1/*
2 * Copyright (c) 2017 Ondrej Hlavaty
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <errno.h>
30#include <assert.h>
31#include <ddi.h>
32#include <as.h>
33#include <align.h>
34#include <libarch/barrier.h>
35#include <usb/debug.h>
36#include "hw_struct/trb.h"
37#include "trb_ring.h"
38
39/**
40 * A structure representing a segment of a TRB ring.
41 */
42
43#define SEGMENT_FOOTER_SIZE (sizeof(link_t) + sizeof(uintptr_t))
44
45#define SEGMENT_TRB_COUNT ((PAGE_SIZE - SEGMENT_FOOTER_SIZE) / sizeof(xhci_trb_t))
46#define SEGMENT_TRB_USEFUL_COUNT (SEGMENT_TRB_COUNT - 1)
47
48struct trb_segment {
49 xhci_trb_t trb_storage [SEGMENT_TRB_COUNT];
50
51 link_t segments_link;
52 uintptr_t phys;
53} __attribute__((aligned(PAGE_SIZE)));
54
55static_assert(sizeof(trb_segment_t) == PAGE_SIZE);
56
57
58/**
59 * Get the first TRB of a segment.
60 */
61static inline xhci_trb_t *segment_begin(trb_segment_t *segment)
62{
63 return segment->trb_storage;
64}
65
66/**
67 * Get the one-past-end TRB of a segment.
68 */
69static inline xhci_trb_t *segment_end(trb_segment_t *segment)
70{
71 return segment_begin(segment) + SEGMENT_TRB_COUNT;
72}
73
74/**
75 * Return a first segment of a list of segments.
76 */
77static inline trb_segment_t *get_first_segment(list_t *segments)
78{
79 return list_get_instance(list_first(segments), trb_segment_t, segments_link);
80
81}
82
83/**
84 * Allocate and initialize new segment.
85 *
86 * TODO: When the HC supports 64-bit addressing, there's no need to restrict
87 * to DMAMEM_4GiB.
88 */
89static int trb_segment_alloc(trb_segment_t **segment)
90{
91 dma_buffer_t dbuf;
92
93 const int err = dma_buffer_alloc(&dbuf, PAGE_SIZE);
94 if (err)
95 return err;
96
97 *segment = dbuf.virt;
98 memset(*segment, 0, PAGE_SIZE);
99 (*segment)->phys = dbuf.phys;
100 usb_log_debug("Allocated new ring segment.");
101 return EOK;
102}
103
104static void trb_segment_free(trb_segment_t *segment)
105{
106 dma_buffer_t dbuf = { .virt = segment, .phys = segment->phys };
107 dma_buffer_free(&dbuf);
108}
109
110/**
111 * Initializes the ring with one segment.
112 *
113 * @param[in] initial_size A number of free slots on the ring, 0 leaves the
114 * choice on a reasonable default (one page-sized segment).
115 */
116int xhci_trb_ring_init(xhci_trb_ring_t *ring, size_t initial_size)
117{
118 int err;
119 if (initial_size == 0)
120 initial_size = SEGMENT_TRB_USEFUL_COUNT;
121
122 list_initialize(&ring->segments);
123 size_t segment_count = (initial_size + SEGMENT_TRB_USEFUL_COUNT - 1)
124 / SEGMENT_TRB_USEFUL_COUNT;
125
126 for (size_t i = 0; i < segment_count; ++i) {
127 struct trb_segment *segment;
128 if ((err = trb_segment_alloc(&segment)) != EOK)
129 return err;
130
131 list_append(&segment->segments_link, &ring->segments);
132 ring->segment_count = i + 1;
133 }
134
135 trb_segment_t * const segment = get_first_segment(&ring->segments);
136 xhci_trb_t *last = segment_end(segment) - 1;
137 xhci_trb_link_fill(last, segment->phys);
138 TRB_LINK_SET_TC(*last, true);
139
140 ring->enqueue_segment = segment;
141 ring->enqueue_trb = segment_begin(segment);
142 ring->dequeue = segment->phys;
143 ring->pcs = 1;
144
145 fibril_mutex_initialize(&ring->guard);
146
147 return EOK;
148}
149
150/**
151 * Free all segments inside the ring.
152 */
153void xhci_trb_ring_fini(xhci_trb_ring_t *ring)
154{
155 assert(ring);
156
157 list_foreach_safe(ring->segments, cur, next) {
158 trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
159 trb_segment_free(segment);
160 }
161}
162
163/**
164 * When the enqueue pointer targets a Link TRB, resolve it.
165 *
166 * Relies on segments being in the segment list in linked order.
167 *
168 * According to section 4.9.2.2, figure 16, the link TRBs cannot be chained, so
169 * it shall not be called in cycle, nor have an inner cycle.
170 */
171static void trb_ring_resolve_link(xhci_trb_ring_t *ring)
172{
173 link_t *next_segment = list_next(&ring->enqueue_segment->segments_link, &ring->segments);
174 if (!next_segment)
175 next_segment = list_first(&ring->segments);
176 assert(next_segment);
177
178 ring->enqueue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
179 ring->enqueue_trb = segment_begin(ring->enqueue_segment);
180}
181
182/**
183 * Get the physical address of the enqueue pointer.
184 */
185static uintptr_t trb_ring_enqueue_phys(xhci_trb_ring_t *ring)
186{
187 uintptr_t trb_id = ring->enqueue_trb - segment_begin(ring->enqueue_segment);
188 return ring->enqueue_segment->phys + trb_id * sizeof(xhci_trb_t);
189}
190
191/**
192 * Decides whether the TRB will trigger an interrupt after being processed.
193 */
194static bool trb_generates_interrupt(xhci_trb_t *trb)
195{
196 return TRB_TYPE(*trb) >= XHCI_TRB_TYPE_ENABLE_SLOT_CMD
197 || TRB_IOC(*trb);
198}
199
200/**
201 * Enqueue TD composed of TRBs.
202 *
203 * This will copy specified number of TRBs chained together into the ring. The
204 * cycle flag in TRBs may be changed.
205 *
206 * The copied TRBs must be contiguous in memory, and must not contain Link TRBs.
207 *
208 * We cannot avoid the copying, because the TRB in ring should be updated atomically.
209 *
210 * @param first_trb the first TRB
211 * @param trbs number of TRBS to enqueue
212 * @param phys returns address of the last TRB enqueued
213 * @return EOK on success,
214 * EAGAIN when the ring is too full to fit all TRBs (temporary)
215 */
216int xhci_trb_ring_enqueue_multiple(xhci_trb_ring_t *ring, xhci_trb_t *first_trb,
217 size_t trbs, uintptr_t *phys)
218{
219 int err;
220 assert(trbs > 0);
221 fibril_mutex_lock(&ring->guard);
222
223 xhci_trb_t * const saved_enqueue_trb = ring->enqueue_trb;
224 trb_segment_t * const saved_enqueue_segment = ring->enqueue_segment;
225 if (phys)
226 *phys = (uintptr_t)NULL;
227
228 /*
229 * First, dry run and advance the enqueue pointer to see if the ring would
230 * be full anytime during the transaction.
231 */
232 xhci_trb_t *trb = first_trb;
233 for (size_t i = 0; i < trbs; ++i, ++trb) {
234 if (phys && trb_generates_interrupt(trb)) {
235 if (*phys) {
236 err = ENOTSUP;
237 goto err;
238 }
239 *phys = trb_ring_enqueue_phys(ring);
240 }
241
242 ring->enqueue_trb++;
243
244 if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK)
245 trb_ring_resolve_link(ring);
246
247 if (trb_ring_enqueue_phys(ring) == ring->dequeue) {
248 err = EAGAIN;
249 goto err;
250 }
251 }
252
253 ring->enqueue_segment = saved_enqueue_segment;
254 ring->enqueue_trb = saved_enqueue_trb;
255
256 /*
257 * Now, copy the TRBs without further checking.
258 */
259 trb = first_trb;
260 for (size_t i = 0; i < trbs; ++i, ++trb) {
261 TRB_SET_CYCLE(*trb, ring->pcs);
262 xhci_trb_copy_to_pio(ring->enqueue_trb, trb);
263
264 usb_log_debug2("TRB ring(%p): Enqueued TRB %p", ring, trb);
265 ring->enqueue_trb++;
266
267 if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK) {
268 TRB_SET_CYCLE(*ring->enqueue_trb, ring->pcs);
269
270 if (TRB_LINK_TC(*ring->enqueue_trb)) {
271 ring->pcs = !ring->pcs;
272 usb_log_debug("TRB ring(%p): PCS toggled", ring);
273 }
274
275 trb_ring_resolve_link(ring);
276 }
277 }
278
279 fibril_mutex_unlock(&ring->guard);
280 return EOK;
281
282err:
283 ring->enqueue_segment = saved_enqueue_segment;
284 ring->enqueue_trb = saved_enqueue_trb;
285 fibril_mutex_unlock(&ring->guard);
286 return err;
287}
288
289/**
290 * Enqueue TD composed of a single TRB. See: `xhci_trb_ring_enqueue_multiple`
291 */
292int xhci_trb_ring_enqueue(xhci_trb_ring_t *ring, xhci_trb_t *td, uintptr_t *phys)
293{
294 return xhci_trb_ring_enqueue_multiple(ring, td, 1, phys);
295}
296
297void xhci_trb_ring_reset_dequeue_state(xhci_trb_ring_t *ring, uintptr_t *addr)
298{
299 assert(ring);
300
301 ring->dequeue = trb_ring_enqueue_phys(ring);
302
303 if (addr)
304 *addr = ring->dequeue | ring->pcs;
305}
306
307/**
308 * Initializes an event ring.
309 *
310 * @param[in] initial_size A number of free slots on the ring, 0 leaves the
311 * choice on a reasonable default (one page-sized segment).
312 */
313int xhci_event_ring_init(xhci_event_ring_t *ring, size_t initial_size)
314{
315 int err;
316 if (initial_size == 0)
317 initial_size = SEGMENT_TRB_COUNT;
318
319 list_initialize(&ring->segments);
320
321 size_t segment_count = (initial_size + SEGMENT_TRB_COUNT - 1) / SEGMENT_TRB_COUNT;
322 size_t erst_size = segment_count * sizeof(xhci_erst_entry_t);
323
324 if (dma_buffer_alloc(&ring->erst, erst_size)) {
325 xhci_event_ring_fini(ring);
326 return ENOMEM;
327 }
328
329 xhci_erst_entry_t *erst = ring->erst.virt;
330 memset(erst, 0, erst_size);
331
332 for (size_t i = 0; i < segment_count; i++) {
333 trb_segment_t *segment;
334 if ((err = trb_segment_alloc(&segment)) != EOK) {
335 xhci_event_ring_fini(ring);
336 return err;
337 }
338
339 list_append(&segment->segments_link, &ring->segments);
340 ring->segment_count = i + 1;
341 xhci_fill_erst_entry(&erst[i], segment->phys, SEGMENT_TRB_COUNT);
342 }
343
344 trb_segment_t * const segment = get_first_segment(&ring->segments);
345 ring->dequeue_segment = segment;
346 ring->dequeue_trb = segment_begin(segment);
347 ring->dequeue_ptr = segment->phys;
348 ring->ccs = 1;
349
350 fibril_mutex_initialize(&ring->guard);
351
352 usb_log_debug("Initialized event ring.");
353 return EOK;
354}
355
356void xhci_event_ring_fini(xhci_event_ring_t *ring)
357{
358 list_foreach_safe(ring->segments, cur, next) {
359 trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
360 trb_segment_free(segment);
361 }
362
363 dma_buffer_free(&ring->erst);
364}
365
366/**
367 * Get the physical address of the dequeue pointer.
368 */
369static uintptr_t event_ring_dequeue_phys(xhci_event_ring_t *ring)
370{
371 uintptr_t trb_id = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
372 return ring->dequeue_segment->phys + trb_id * sizeof(xhci_trb_t);
373}
374
375/**
376 * Fill the event with next valid event from the ring.
377 *
378 * @param event pointer to event to be overwritten
379 * @return EOK on success,
380 * ENOENT when the ring is empty
381 */
382int xhci_event_ring_dequeue(xhci_event_ring_t *ring, xhci_trb_t *event)
383{
384 fibril_mutex_lock(&ring->guard);
385
386 /**
387 * The ERDP reported to the HC is a half-phase off the one we need to
388 * maintain. Therefore, we keep it extra.
389 */
390 ring->dequeue_ptr = event_ring_dequeue_phys(ring);
391
392 if (TRB_CYCLE(*ring->dequeue_trb) != ring->ccs) {
393 fibril_mutex_unlock(&ring->guard);
394 return ENOENT; /* The ring is empty. */
395 }
396
397 /* Do not reorder the Cycle bit reading with memcpy */
398 read_barrier();
399
400 memcpy(event, ring->dequeue_trb, sizeof(xhci_trb_t));
401
402 ring->dequeue_trb++;
403 const unsigned index = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
404
405 /* Wrapping around segment boundary */
406 if (index >= SEGMENT_TRB_COUNT) {
407 link_t *next_segment = list_next(&ring->dequeue_segment->segments_link, &ring->segments);
408
409 /* Wrapping around table boundary */
410 if (!next_segment) {
411 next_segment = list_first(&ring->segments);
412 ring->ccs = !ring->ccs;
413 }
414
415 ring->dequeue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
416 ring->dequeue_trb = segment_begin(ring->dequeue_segment);
417 }
418
419 fibril_mutex_unlock(&ring->guard);
420 return EOK;
421}
422
423void xhci_sw_ring_init(xhci_sw_ring_t *ring, size_t size)
424{
425 ring->begin = calloc(size, sizeof(xhci_trb_t));
426 ring->end = ring->begin + size;
427
428 ring->enqueue = ring->dequeue = ring->begin;
429
430 fibril_mutex_initialize(&ring->guard);
431 fibril_condvar_initialize(&ring->enqueued_cv);
432 fibril_condvar_initialize(&ring->dequeued_cv);
433
434 ring->running = true;
435}
436
437int xhci_sw_ring_enqueue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
438{
439 assert(ring);
440 assert(trb);
441
442 fibril_mutex_lock(&ring->guard);
443 while (ring->running && TRB_CYCLE(*ring->enqueue))
444 fibril_condvar_wait(&ring->dequeued_cv, &ring->guard);
445
446 *ring->enqueue = *trb;
447 TRB_SET_CYCLE(*ring->enqueue, 1);
448 if (++ring->enqueue == ring->end)
449 ring->enqueue = ring->begin;
450 fibril_condvar_signal(&ring->enqueued_cv);
451 fibril_mutex_unlock(&ring->guard);
452
453 return ring->running ? EOK : EINTR;
454}
455
456int xhci_sw_ring_dequeue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
457{
458 assert(ring);
459 assert(trb);
460
461 fibril_mutex_lock(&ring->guard);
462 while (ring->running && !TRB_CYCLE(*ring->dequeue))
463 fibril_condvar_wait(&ring->enqueued_cv, &ring->guard);
464
465 *trb = *ring->dequeue;
466 TRB_SET_CYCLE(*ring->dequeue, 0);
467 if (++ring->dequeue == ring->end)
468 ring->dequeue = ring->begin;
469 fibril_condvar_signal(&ring->dequeued_cv);
470 fibril_mutex_unlock(&ring->guard);
471
472 return ring->running ? EOK : EINTR;
473}
474
475void xhci_sw_ring_stop(xhci_sw_ring_t *ring)
476{
477 ring->running = false;
478 fibril_condvar_broadcast(&ring->enqueued_cv);
479 fibril_condvar_broadcast(&ring->dequeued_cv);
480}
481
482void xhci_sw_ring_fini(xhci_sw_ring_t *ring)
483{
484 free(ring->begin);
485}
486
487/**
488 * @}
489 */
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