source: mainline/uspace/drv/bus/usb/xhci/trb_ring.c@ 2aaba7e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 2aaba7e was fb28cde, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: changed api to get dequeue state of trb ring

  • Property mode set to 100644
File size: 11.7 KB
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[f4eb6c93]1/*
2 * Copyright (c) 2017 Ondrej Hlavaty
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <errno.h>
30#include <assert.h>
31#include <ddi.h>
32#include <as.h>
33#include <align.h>
[74c0de0]34#include <libarch/barrier.h>
[cb89430]35#include <usb/debug.h>
36#include "hw_struct/trb.h"
[f4eb6c93]37#include "trb_ring.h"
38
39#define SEGMENT_HEADER_SIZE (sizeof(link_t) + sizeof(uintptr_t))
40
41/**
42 * Number of TRBs in a segment (with our header).
43 */
44#define SEGMENT_TRB_COUNT ((PAGE_SIZE - SEGMENT_HEADER_SIZE) / sizeof(xhci_trb_t))
45
46struct trb_segment {
[cb89430]47 xhci_trb_t trb_storage [SEGMENT_TRB_COUNT];
[f4eb6c93]48
49 link_t segments_link;
50 uintptr_t phys;
51} __attribute__((aligned(PAGE_SIZE)));
52
53
[eb928c4]54/**
55 * Get the first TRB of a segment.
56 */
[f4eb6c93]57static inline xhci_trb_t *segment_begin(trb_segment_t *segment)
58{
59 return segment->trb_storage;
60}
61
[eb928c4]62/**
63 * Get the one-past-end TRB of a segment.
64 */
[f4eb6c93]65static inline xhci_trb_t *segment_end(trb_segment_t *segment)
66{
67 return segment_begin(segment) + SEGMENT_TRB_COUNT;
68}
69
[cb89430]70/**
71 * Allocate and initialize new segment.
72 *
73 * TODO: When the HC supports 64-bit addressing, there's no need to restrict
74 * to DMAMEM_4GiB.
75 */
[b80c1ab]76static int trb_segment_alloc(trb_segment_t **segment)
[f4eb6c93]77{
[b80c1ab]78 dma_buffer_t dbuf;
[f4eb6c93]79
[b80c1ab]80 const int err = dma_buffer_alloc(&dbuf, PAGE_SIZE);
81 if (err)
82 return err;
[cb89430]83
[b80c1ab]84 *segment = dbuf.virt;
85 memset(*segment, 0, PAGE_SIZE);
86 (*segment)->phys = dbuf.phys;
87 usb_log_debug2("Allocated new ring segment.");
88 return EOK;
89}
[f4eb6c93]90
[b80c1ab]91static void trb_segment_free(trb_segment_t *segment)
92{
93 dma_buffer_t dbuf = { .virt = segment, .phys = segment->phys };
94 dma_buffer_free(&dbuf);
[f4eb6c93]95}
96
[cb89430]97/**
98 * Initializes the ring with one segment.
99 */
[9b2f69e]100int xhci_trb_ring_init(xhci_trb_ring_t *ring)
[f4eb6c93]101{
102 struct trb_segment *segment;
103 int err;
104
[cb89430]105 list_initialize(&ring->segments);
106
[b80c1ab]107 if ((err = trb_segment_alloc(&segment)) != EOK)
[f4eb6c93]108 return err;
109
110 list_append(&segment->segments_link, &ring->segments);
[cb89430]111 ring->segment_count = 1;
[f4eb6c93]112
113 xhci_trb_t *last = segment_end(segment) - 1;
114 xhci_trb_link_fill(last, segment->phys);
[a501aaba]115 TRB_LINK_SET_TC(*last, true);
[f4eb6c93]116
117 ring->enqueue_segment = segment;
118 ring->enqueue_trb = segment_begin(segment);
119 ring->dequeue = segment->phys;
120 ring->pcs = 1;
121
[a2b0ba3]122 fibril_mutex_initialize(&ring->guard);
123
[f4eb6c93]124 return EOK;
125}
126
[eb928c4]127/**
128 * Free all segments inside the ring.
129 */
[9620a54]130void xhci_trb_ring_fini(xhci_trb_ring_t *ring)
[f4eb6c93]131{
[47ab89e]132 assert(ring);
[3d8a3bd]133
[47ab89e]134 list_foreach_safe(ring->segments, cur, next) {
135 trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
[b80c1ab]136 trb_segment_free(segment);
[47ab89e]137 }
[f4eb6c93]138}
139
140/**
141 * When the enqueue pointer targets a Link TRB, resolve it.
142 *
143 * Relies on segments being in the segment list in linked order.
144 *
145 * According to section 4.9.2.2, figure 16, the link TRBs cannot be chained, so
146 * it shall not be called in cycle, nor have an inner cycle.
147 */
148static void trb_ring_resolve_link(xhci_trb_ring_t *ring)
149{
150 link_t *next_segment = list_next(&ring->enqueue_segment->segments_link, &ring->segments);
151 if (!next_segment)
152 next_segment = list_first(&ring->segments);
[4a00bc9]153 assert(next_segment);
[f4eb6c93]154
155 ring->enqueue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
156 ring->enqueue_trb = segment_begin(ring->enqueue_segment);
157}
158
[eb928c4]159/**
160 * Get the physical address of the enqueue pointer.
161 */
[cb89430]162static uintptr_t trb_ring_enqueue_phys(xhci_trb_ring_t *ring)
[f4eb6c93]163{
164 uintptr_t trb_id = ring->enqueue_trb - segment_begin(ring->enqueue_segment);
165 return ring->enqueue_segment->phys + trb_id * sizeof(xhci_trb_t);
166}
167
[eb928c4]168/**
169 * Decides whether the TRB will trigger an interrupt after being processed.
170 */
[2b61945]171static bool trb_generates_interrupt(xhci_trb_t *trb)
172{
173 return TRB_TYPE(*trb) >= XHCI_TRB_TYPE_ENABLE_SLOT_CMD
174 || TRB_IOC(*trb);
175}
176
[cb89430]177/**
[eb928c4]178 * Enqueue TD composed of TRBs.
[cb89430]179 *
[d1d7a92]180 * This will copy specified number of TRBs chained together into the ring. The
181 * cycle flag in TRBs may be changed.
[cb89430]182 *
[d1d7a92]183 * The copied TRBs must be contiguous in memory, and must not contain Link TRBs.
[cb89430]184 *
185 * We cannot avoid the copying, because the TRB in ring should be updated atomically.
186 *
[d1d7a92]187 * @param first_trb the first TRB
188 * @param trbs number of TRBS to enqueue
189 * @param phys returns address of the last TRB enqueued
[cb89430]190 * @return EOK on success,
191 * EAGAIN when the ring is too full to fit all TRBs (temporary)
192 */
[d1d7a92]193int xhci_trb_ring_enqueue_multiple(xhci_trb_ring_t *ring, xhci_trb_t *first_trb,
194 size_t trbs, uintptr_t *phys)
[f4eb6c93]195{
[9ff99e8]196 int err;
[d1d7a92]197 assert(trbs > 0);
[a2b0ba3]198 fibril_mutex_lock(&ring->guard);
199
[f4eb6c93]200 xhci_trb_t * const saved_enqueue_trb = ring->enqueue_trb;
201 trb_segment_t * const saved_enqueue_segment = ring->enqueue_segment;
[548c123]202 if (phys)
[cc9ac7c]203 *phys = (uintptr_t)NULL;
[f4eb6c93]204
205 /*
206 * First, dry run and advance the enqueue pointer to see if the ring would
207 * be full anytime during the transaction.
208 */
[d1d7a92]209 xhci_trb_t *trb = first_trb;
210 for (size_t i = 0; i < trbs; ++i, ++trb) {
[4a00bc9]211 if (phys && trb_generates_interrupt(trb)) {
[9ff99e8]212 if (*phys) {
213 err = ENOTSUP;
214 goto err;
215 }
[2b61945]216 *phys = trb_ring_enqueue_phys(ring);
217 }
218
[f4eb6c93]219 ring->enqueue_trb++;
220
221 if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK)
222 trb_ring_resolve_link(ring);
223
[9ff99e8]224 if (trb_ring_enqueue_phys(ring) == ring->dequeue) {
225 err = EAGAIN;
226 goto err;
227 }
[d1d7a92]228 }
[f4eb6c93]229
230 ring->enqueue_segment = saved_enqueue_segment;
231 ring->enqueue_trb = saved_enqueue_trb;
232
233 /*
234 * Now, copy the TRBs without further checking.
235 */
[d1d7a92]236 trb = first_trb;
237 for (size_t i = 0; i < trbs; ++i, ++trb) {
[a501aaba]238 TRB_SET_CYCLE(*trb, ring->pcs);
[887c9de]239 xhci_trb_copy_to_pio(ring->enqueue_trb, trb);
[f4eb6c93]240
[cb89430]241 usb_log_debug2("TRB ring(%p): Enqueued TRB %p", ring, trb);
[f4eb6c93]242 ring->enqueue_trb++;
243
244 if (TRB_TYPE(*ring->enqueue_trb) == XHCI_TRB_TYPE_LINK) {
[a501aaba]245 TRB_SET_CYCLE(*ring->enqueue_trb, ring->pcs);
[f4eb6c93]246
[cb89430]247 if (TRB_LINK_TC(*ring->enqueue_trb)) {
[f4eb6c93]248 ring->pcs = !ring->pcs;
[cb89430]249 usb_log_debug2("TRB ring(%p): PCS toggled", ring);
250 }
[f4eb6c93]251
252 trb_ring_resolve_link(ring);
253 }
[d1d7a92]254 }
[f4eb6c93]255
[a2b0ba3]256 fibril_mutex_unlock(&ring->guard);
[f4eb6c93]257 return EOK;
258
[9ff99e8]259err:
[f4eb6c93]260 ring->enqueue_segment = saved_enqueue_segment;
261 ring->enqueue_trb = saved_enqueue_trb;
[a2b0ba3]262 fibril_mutex_unlock(&ring->guard);
[9ff99e8]263 return err;
[f4eb6c93]264}
[cb89430]265
[d1d7a92]266/**
267 * Enqueue TD composed of a single TRB. See: `xhci_trb_ring_enqueue_multiple`
268 */
269int xhci_trb_ring_enqueue(xhci_trb_ring_t *ring, xhci_trb_t *td, uintptr_t *phys)
270{
271 return xhci_trb_ring_enqueue_multiple(ring, td, 1, phys);
272}
273
[fb28cde]274void xhci_trb_ring_reset_dequeue_state(xhci_trb_ring_t *ring, uintptr_t *addr)
275{
276 assert(ring);
277
278 ring->dequeue = trb_ring_enqueue_phys(ring);
279
280 if (addr)
281 *addr = ring->dequeue | ring->pcs;
282}
283
[cb89430]284/**
285 * Initializes an event ring.
286 */
[9b2f69e]287int xhci_event_ring_init(xhci_event_ring_t *ring)
[cb89430]288{
289 struct trb_segment *segment;
290 int err;
291
292 list_initialize(&ring->segments);
293
[b80c1ab]294 if ((err = trb_segment_alloc(&segment)) != EOK)
[cb89430]295 return err;
296
297 list_append(&segment->segments_link, &ring->segments);
298 ring->segment_count = 1;
299
300 ring->dequeue_segment = segment;
301 ring->dequeue_trb = segment_begin(segment);
302 ring->dequeue_ptr = segment->phys;
303
[eb928c4]304 if (dma_buffer_alloc(&ring->erst, PAGE_SIZE)) {
305 xhci_event_ring_fini(ring);
[cb89430]306 return ENOMEM;
[eb928c4]307 }
[b80c1ab]308 xhci_erst_entry_t *erst = ring->erst.virt;
[cb89430]309
[b80c1ab]310 memset(erst, 0, PAGE_SIZE);
311 xhci_fill_erst_entry(&erst[0], segment->phys, SEGMENT_TRB_COUNT);
[cb89430]312
313 ring->ccs = 1;
314
[a1eb7c67]315 fibril_mutex_initialize(&ring->guard);
316
[cb89430]317 usb_log_debug("Initialized event ring.");
318
319 return EOK;
320}
321
[9620a54]322void xhci_event_ring_fini(xhci_event_ring_t *ring)
[cb89430]323{
[47ab89e]324 list_foreach_safe(ring->segments, cur, next) {
325 trb_segment_t *segment = list_get_instance(cur, trb_segment_t, segments_link);
[cb89430]326 dmamem_unmap_anonymous(segment);
[47ab89e]327 }
[cb89430]328
[b80c1ab]329 dma_buffer_free(&ring->erst);
[cb89430]330}
331
[eb928c4]332/**
333 * Get the physical address of the dequeue pointer.
334 */
[cb89430]335static uintptr_t event_ring_dequeue_phys(xhci_event_ring_t *ring)
336{
337 uintptr_t trb_id = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
338 return ring->dequeue_segment->phys + trb_id * sizeof(xhci_trb_t);
339}
340
341/**
342 * Fill the event with next valid event from the ring.
343 *
344 * @param event pointer to event to be overwritten
345 * @return EOK on success,
346 * ENOENT when the ring is empty
347 */
348int xhci_event_ring_dequeue(xhci_event_ring_t *ring, xhci_trb_t *event)
349{
[a1eb7c67]350 fibril_mutex_lock(&ring->guard);
351
[cb89430]352 /**
353 * The ERDP reported to the HC is a half-phase off the one we need to
354 * maintain. Therefore, we keep it extra.
355 */
356 ring->dequeue_ptr = event_ring_dequeue_phys(ring);
357
[a1eb7c67]358 if (TRB_CYCLE(*ring->dequeue_trb) != ring->ccs) {
359 fibril_mutex_unlock(&ring->guard);
[cb89430]360 return ENOENT; /* The ring is empty. */
[a1eb7c67]361 }
[cb89430]362
[74c0de0]363 /* Do not reorder the Cycle bit reading with memcpy */
364 read_barrier();
365
[cb89430]366 memcpy(event, ring->dequeue_trb, sizeof(xhci_trb_t));
367
368 ring->dequeue_trb++;
369 const unsigned index = ring->dequeue_trb - segment_begin(ring->dequeue_segment);
370
371 /* Wrapping around segment boundary */
372 if (index >= SEGMENT_TRB_COUNT) {
373 link_t *next_segment = list_next(&ring->dequeue_segment->segments_link, &ring->segments);
374
375 /* Wrapping around table boundary */
376 if (!next_segment) {
377 next_segment = list_first(&ring->segments);
378 ring->ccs = !ring->ccs;
379 }
380
381 ring->dequeue_segment = list_get_instance(next_segment, trb_segment_t, segments_link);
382 ring->dequeue_trb = segment_begin(ring->dequeue_segment);
383 }
384
[a1eb7c67]385 fibril_mutex_unlock(&ring->guard);
[cb89430]386 return EOK;
387}
[2bff2cc2]388
389void xhci_sw_ring_init(xhci_sw_ring_t *ring, size_t size)
390{
391 ring->begin = calloc(size, sizeof(xhci_trb_t));
392 ring->end = ring->begin + size;
393
394 ring->enqueue = ring->dequeue = ring->begin;
395
396 fibril_mutex_initialize(&ring->guard);
397 fibril_condvar_initialize(&ring->enqueued_cv);
398 fibril_condvar_initialize(&ring->dequeued_cv);
399
400 ring->running = true;
401}
402
403int xhci_sw_ring_enqueue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
404{
405 assert(ring);
406 assert(trb);
407
408 fibril_mutex_lock(&ring->guard);
409 while (ring->running && TRB_CYCLE(*ring->enqueue))
410 fibril_condvar_wait(&ring->dequeued_cv, &ring->guard);
411
412 *ring->enqueue = *trb;
413 TRB_SET_CYCLE(*ring->enqueue, 1);
414 if (++ring->enqueue == ring->end)
415 ring->enqueue = ring->begin;
416 fibril_condvar_signal(&ring->enqueued_cv);
417 fibril_mutex_unlock(&ring->guard);
418
419 return ring->running ? EOK : EINTR;
420}
421
422int xhci_sw_ring_dequeue(xhci_sw_ring_t *ring, xhci_trb_t *trb)
423{
424 assert(ring);
425 assert(trb);
426
427 fibril_mutex_lock(&ring->guard);
428 while (ring->running && !TRB_CYCLE(*ring->dequeue))
429 fibril_condvar_wait(&ring->enqueued_cv, &ring->guard);
430
431 *trb = *ring->dequeue;
432 TRB_SET_CYCLE(*ring->dequeue, 0);
433 if (++ring->dequeue == ring->end)
434 ring->dequeue = ring->begin;
435 fibril_condvar_signal(&ring->dequeued_cv);
436 fibril_mutex_unlock(&ring->guard);
437
438 return ring->running ? EOK : EINTR;
439}
440
441void xhci_sw_ring_stop(xhci_sw_ring_t *ring)
442{
443 ring->running = false;
444 fibril_condvar_broadcast(&ring->enqueued_cv);
445 fibril_condvar_broadcast(&ring->dequeued_cv);
446}
447
448void xhci_sw_ring_fini(xhci_sw_ring_t *ring)
449{
450 free(ring->begin);
451}
452
453/**
454 * @}
455 */
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