source: mainline/uspace/drv/bus/usb/xhci/transfers.h@ 63adb18

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 63adb18 was 63adb18, checked in by Petr Manek <petr.manek@…>, 8 years ago

Added transfer block data structure and dequeue mechanism.

  • Property mode set to 100644
File size: 2.9 KB
Line 
1/*
2 * Copyright (c) 2017 Michal Staruch
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller transfer ring management
34 */
35
36#include "hc.h"
37#include "trb_ring.h"
38
39typedef struct {
40 link_t link;
41
42 uintptr_t interrupt_trb_phys;
43 uint8_t direction;
44
45 usb_transfer_batch_t* batch;
46
47 size_t completed_size; /* Number of successfully transferred bytes. */
48 size_t scheduled_size; /* Number of bytes scheduled for transfer. */
49 list_t active_blocks; /* List of data blocks transferred right now. */
50} xhci_transfer_t;
51
52typedef struct {
53 link_t link;
54
55 uintptr_t buffer; /* Physical address of the buffer start. */
56 size_t total_size; /* Total size available in the block. */
57 size_t filled_size; /* Size of the data in the block. */
58
59 xhci_transfer_t* transfer; /* Current transfer or NULL. */
60} xhci_transfer_block_t;
61
62int xhci_init_transfers(xhci_hc_t*);
63void xhci_fini_transfers(xhci_hc_t*);
64xhci_transfer_t* xhci_transfer_alloc(usb_transfer_batch_t*);
65void xhci_transfer_fini(xhci_transfer_t*);
66int xhci_schedule_control_transfer(xhci_hc_t*, usb_transfer_batch_t*);
67int xhci_schedule_bulk_transfer(xhci_hc_t*, usb_transfer_batch_t*);
68int xhci_handle_transfer_event(xhci_hc_t*, xhci_trb_t*);
69
70xhci_transfer_block_t* xhci_transfer_block_alloc(size_t);
71void xhci_transfer_block_fini(xhci_transfer_block_t*);
72int xhci_dequeue_transfer_block(xhci_hc_t*, size_t, xhci_transfer_block_t**);
73int xhci_free_transfer_block(xhci_hc_t*, xhci_transfer_block_t*);
74int xhci_schedule_transfer_block(xhci_hc_t*, xhci_transfer_block_t*);
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