source: mainline/uspace/drv/bus/usb/xhci/rh.c@ 9d3536e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9d3536e was 58f4c0f, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: reset also USB 3 ports

  • Property mode set to 100644
File size: 7.9 KB
Line 
1/*
2 * Copyright (c) 2017 Michal Staruch
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The roothub structures abstraction.
34 */
35
36#include <errno.h>
37#include <str_error.h>
38#include <usb/request.h>
39#include <usb/debug.h>
40#include <usb/host/bus.h>
41#include <usb/host/ddf_helpers.h>
42#include <usb/host/dma_buffer.h>
43#include <usb/host/hcd.h>
44#include <usb/port.h>
45
46#include "debug.h"
47#include "commands.h"
48#include "endpoint.h"
49#include "hc.h"
50#include "hw_struct/trb.h"
51#include "rh.h"
52#include "transfers.h"
53
54/* This mask only lists registers, which imply port change. */
55static const uint32_t port_events_mask =
56 XHCI_REG_MASK(XHCI_PORT_CSC) |
57 XHCI_REG_MASK(XHCI_PORT_PEC) |
58 XHCI_REG_MASK(XHCI_PORT_WRC) |
59 XHCI_REG_MASK(XHCI_PORT_OCC) |
60 XHCI_REG_MASK(XHCI_PORT_PRC) |
61 XHCI_REG_MASK(XHCI_PORT_PLC) |
62 XHCI_REG_MASK(XHCI_PORT_CEC);
63
64static const uint32_t port_reset_mask =
65 XHCI_REG_MASK(XHCI_PORT_WRC) |
66 XHCI_REG_MASK(XHCI_PORT_PRC);
67
68typedef struct rh_port {
69 usb_port_t base;
70 xhci_rh_t *rh;
71 uint8_t major;
72 xhci_port_regs_t *regs;
73 xhci_device_t *device;
74} rh_port_t;
75
76/**
77 * Initialize the roothub subsystem.
78 */
79int xhci_rh_init(xhci_rh_t *rh, xhci_hc_t *hc)
80{
81 assert(rh);
82 assert(hc);
83
84 rh->hc = hc;
85 rh->max_ports = XHCI_REG_RD(hc->cap_regs, XHCI_CAP_MAX_PORTS);
86 rh->ports = calloc(rh->max_ports, sizeof(rh_port_t));
87 if (!rh->ports)
88 return ENOMEM;
89
90 const int err = bus_device_init(&rh->device.base, &rh->hc->bus.base);
91 if (err) {
92 free(rh->ports);
93 return err;
94 }
95
96 for (unsigned i = 0; i < rh->max_ports; i++) {
97 usb_port_init(&rh->ports[i].base);
98 rh->ports[i].rh = rh;
99 rh->ports[i].regs = &rh->hc->op_regs->portrs[i];
100 }
101
102 /* Initialize route string */
103 rh->device.route_str = 0;
104
105 return EOK;
106}
107
108/**
109 * Finalize the RH subsystem.
110 */
111int xhci_rh_fini(xhci_rh_t *rh)
112{
113 assert(rh);
114 for (unsigned i = 0; i < rh->max_ports; i++)
115 usb_port_fini(&rh->ports[i].base);
116 return EOK;
117}
118
119static rh_port_t *get_rh_port(usb_port_t *port)
120{
121 assert(port);
122 return (rh_port_t *) port;
123}
124
125/**
126 * Create and setup a device directly connected to RH. As the xHCI is not using
127 * a virtual usbhub device for RH, this routine is called for devices directly.
128 */
129static int rh_enumerate_device(usb_port_t *usb_port)
130{
131 int err;
132 rh_port_t *port = get_rh_port(usb_port);
133
134 if (port->major <= 2) {
135 /* USB ports for lower speeds needs their port reset first. */
136 XHCI_REG_SET(port->regs, XHCI_PORT_PR, 1);
137 if ((err = usb_port_wait_for_enabled(&port->base)))
138 return err;
139 } else {
140 /* Do the Warm reset to ensure the state is clear. */
141 XHCI_REG_SET(port->regs, XHCI_PORT_WPR, 1);
142 if ((err = usb_port_wait_for_enabled(&port->base)))
143 return err;
144 }
145
146 /*
147 * We cannot know in advance, whether the speed in the status register
148 * is valid - it depends on the protocol. So we read it later, but then
149 * we have to check if the port is still enabled.
150 */
151 uint32_t status = XHCI_REG_RD_FIELD(&port->regs->portsc, 32);
152
153 bool enabled = !!(status & XHCI_REG_MASK(XHCI_PORT_PED));
154 if (!enabled)
155 return ENOENT;
156
157 unsigned psiv = (status & XHCI_REG_MASK(XHCI_PORT_PS)) >> XHCI_REG_SHIFT(XHCI_PORT_PS);
158 const usb_speed_t speed = port->rh->hc->speeds[psiv].usb_speed;
159
160 device_t *dev = hcd_ddf_fun_create(&port->rh->hc->base, speed);
161 if (!dev) {
162 usb_log_error("Failed to create USB device function.");
163 return ENOMEM;
164 }
165
166 dev->hub = &port->rh->device.base;
167 dev->tier = 1;
168 dev->port = port - port->rh->ports + 1;
169
170 port->device = xhci_device_get(dev);
171 port->device->rh_port = dev->port;
172
173 if ((err = bus_device_enumerate(dev))) {
174 usb_log_error("Failed to enumerate USB device: %s", str_error(err));
175 return err;
176 }
177
178 if (!ddf_fun_get_name(dev->fun)) {
179 bus_device_set_default_name(dev);
180 }
181
182 if ((err = ddf_fun_bind(dev->fun))) {
183 usb_log_error("Failed to register device " XHCI_DEV_FMT " DDF function: %s.",
184 XHCI_DEV_ARGS(*port->device), str_error(err));
185 goto err_usb_dev;
186 }
187
188 return EOK;
189
190err_usb_dev:
191 hcd_ddf_fun_destroy(dev);
192 port->device = NULL;
193 return err;
194}
195
196/**
197 * Deal with a detached device.
198 */
199static void rh_remove_device(usb_port_t *usb_port)
200{
201 rh_port_t *port = get_rh_port(usb_port);
202
203 assert(port->device);
204 usb_log_info("Device " XHCI_DEV_FMT " at port %zu has been disconnected.",
205 XHCI_DEV_ARGS(*port->device), port - port->rh->ports + 1);
206
207 /* Remove device from XHCI bus. */
208 bus_device_gone(&port->device->base);
209
210 /* Mark the device as detached. */
211 port->device = NULL;
212}
213
214/**
215 * Handle all changes on specified port.
216 */
217void xhci_rh_handle_port_change(xhci_rh_t *rh, uint8_t port_id)
218{
219 rh_port_t * const port = &rh->ports[port_id - 1];
220
221 uint32_t status = XHCI_REG_RD_FIELD(&port->regs->portsc, 32);
222
223 while (status & port_events_mask) {
224 /*
225 * The PED bit in xHCI has RW1C semantics, which means that
226 * writing 1 to it will disable the port. Which means all
227 * standard mechanisms of register handling fails here.
228 */
229 XHCI_REG_WR_FIELD(&port->regs->portsc, status & ~XHCI_REG_MASK(XHCI_PORT_PED), 32);
230
231 const bool connected = !!(status & XHCI_REG_MASK(XHCI_PORT_CCS));
232 const bool enabled = !!(status & XHCI_REG_MASK(XHCI_PORT_PED));
233
234 if (status & XHCI_REG_MASK(XHCI_PORT_CSC)) {
235 usb_log_info("Connected state changed on port %u.", port_id);
236 status &= ~XHCI_REG_MASK(XHCI_PORT_CSC);
237
238 if (connected) {
239 usb_port_connected(&port->base, &rh_enumerate_device);
240 } else {
241 usb_port_disabled(&port->base, &rh_remove_device);
242 }
243 }
244
245 if (status & port_reset_mask) {
246 status &= ~port_reset_mask;
247
248 if (enabled) {
249 usb_port_enabled(&port->base);
250 } else {
251 usb_port_disabled(&port->base, &rh_remove_device);
252 }
253 }
254
255 status &= port_events_mask;
256 if (status != 0)
257 usb_log_debug("RH port %u change not handled: 0x%x", port_id, status);
258
259 /* Make sure that PSCEG is 0 before exiting the loop. */
260 status = XHCI_REG_RD_FIELD(&port->regs->portsc, 32);
261 }
262}
263
264void xhci_rh_set_ports_protocol(xhci_rh_t *rh, unsigned offset, unsigned count, unsigned major)
265{
266 for (unsigned i = offset; i < offset + count; i++)
267 rh->ports[i - 1].major = major;
268}
269
270void xhci_rh_startup(xhci_rh_t *rh)
271{
272 /* The reset changed status of all ports, and SW originated reason does
273 * not cause an interrupt.
274 */
275 for (uint8_t i = 1; i < rh->max_ports; ++i) {
276 xhci_rh_handle_port_change(rh, i + 1);
277
278 rh_port_t * const port = &rh->ports[i];
279
280 /*
281 * When xHCI starts, for some reasons USB 3 ports do not have
282 * the CSC bit, even though they are connected. Try to find
283 * such ports.
284 */
285 if (XHCI_REG_RD(port->regs, XHCI_PORT_CCS) && port->base.state == PORT_DISABLED)
286 usb_port_connected(&port->base, &rh_enumerate_device);
287 }
288}
289
290/**
291 * @}
292 */
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