source: mainline/uspace/drv/bus/usb/xhci/rh.c@ 95c675b

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 95c675b was 9b2f69e, checked in by Petr Manek <petr.manek@…>, 8 years ago

Setting up endpoint contexts (almost) properly. Boilerplate for interrupt transfers. Simplified TRB ring initialization.

  • Property mode set to 100644
File size: 11.7 KB
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1/*
2 * Copyright (c) 2017 Michal Staruch
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The roothub structures abstraction.
34 */
35
36#include <errno.h>
37#include <str_error.h>
38#include <usb/request.h>
39#include <usb/debug.h>
40#include <usb/host/utils/malloc32.h>
41#include <usb/host/bus.h>
42#include <usb/host/ddf_helpers.h>
43#include <usb/host/hcd.h>
44
45#include "debug.h"
46#include "commands.h"
47#include "endpoint.h"
48#include "hc.h"
49#include "hw_struct/trb.h"
50#include "rh.h"
51#include "transfers.h"
52
53/* This mask only lists registers, which imply port change. */
54static const uint32_t port_change_mask =
55 XHCI_REG_MASK(XHCI_PORT_CSC) |
56 XHCI_REG_MASK(XHCI_PORT_PEC) |
57 XHCI_REG_MASK(XHCI_PORT_WRC) |
58 XHCI_REG_MASK(XHCI_PORT_OCC) |
59 XHCI_REG_MASK(XHCI_PORT_PRC) |
60 XHCI_REG_MASK(XHCI_PORT_PLC) |
61 XHCI_REG_MASK(XHCI_PORT_CEC);
62
63int xhci_rh_init(xhci_rh_t *rh, xhci_hc_t *hc)
64{
65 assert(rh);
66 assert(hc);
67
68 rh->hc = hc;
69 rh->max_ports = XHCI_REG_RD(hc->cap_regs, XHCI_CAP_MAX_PORTS);
70
71 return EOK;
72}
73
74// TODO: Check device deallocation, we free device_ctx in hc.c, not
75// sure about the other structs.
76// TODO: This currently assumes the device is attached to rh directly.
77// Also, we should consider moving a lot of functionailty to xhci bus
78int xhci_rh_address_device(xhci_rh_t *rh, device_t *dev, xhci_bus_t *bus)
79{
80 int err;
81 xhci_hc_t *hc = rh->hc;
82
83 xhci_cmd_t cmd;
84 xhci_cmd_init(&cmd);
85
86 /* XXX Certainly not generic solution. */
87 uint32_t route_str = 0;
88
89 const xhci_port_speed_t *speed = xhci_rh_get_port_speed(rh, dev->port);
90
91 xhci_send_enable_slot_command(hc, &cmd);
92 if ((err = xhci_cmd_wait(&cmd, 100000)) != EOK)
93 return err;
94
95 uint32_t slot_id = cmd.slot_id;
96
97 usb_log_debug2("Obtained slot ID: %u.\n", slot_id);
98 xhci_cmd_fini(&cmd);
99
100 xhci_input_ctx_t *ictx = malloc(sizeof(xhci_input_ctx_t));
101 if (!ictx) {
102 return ENOMEM;
103 }
104
105 memset(ictx, 0, sizeof(xhci_input_ctx_t));
106
107 XHCI_INPUT_CTRL_CTX_ADD_SET(ictx->ctrl_ctx, 0);
108 XHCI_INPUT_CTRL_CTX_ADD_SET(ictx->ctrl_ctx, 1);
109
110 /* Initialize slot_ctx according to section 4.3.3 point 3. */
111 /* Attaching to root hub port, root string equals to 0. */
112 XHCI_SLOT_ROOT_HUB_PORT_SET(ictx->slot_ctx, dev->port);
113 XHCI_SLOT_CTX_ENTRIES_SET(ictx->slot_ctx, 1);
114 XHCI_SLOT_ROUTE_STRING_SET(ictx->slot_ctx, route_str);
115
116 xhci_trb_ring_t *ep_ring = malloc(sizeof(xhci_trb_ring_t));
117 if (!ep_ring) {
118 err = ENOMEM;
119 goto err_ictx;
120 }
121
122 err = xhci_trb_ring_init(ep_ring);
123 if (err)
124 goto err_ring;
125
126 XHCI_EP_TYPE_SET(ictx->endpoint_ctx[0], EP_TYPE_CONTROL);
127 // TODO: must be changed with a command after USB descriptor is read
128 // See 4.6.5 in XHCI specification, first note
129 XHCI_EP_MAX_PACKET_SIZE_SET(ictx->endpoint_ctx[0],
130 speed->major == 3 ? 512 : 8);
131 XHCI_EP_MAX_BURST_SIZE_SET(ictx->endpoint_ctx[0], 0);
132 /* FIXME physical pointer? */
133 XHCI_EP_TR_DPTR_SET(ictx->endpoint_ctx[0], ep_ring->dequeue);
134 XHCI_EP_DCS_SET(ictx->endpoint_ctx[0], 1);
135 XHCI_EP_INTERVAL_SET(ictx->endpoint_ctx[0], 0);
136 XHCI_EP_MAX_P_STREAMS_SET(ictx->endpoint_ctx[0], 0);
137 XHCI_EP_MULT_SET(ictx->endpoint_ctx[0], 0);
138 XHCI_EP_ERROR_COUNT_SET(ictx->endpoint_ctx[0], 3);
139
140 xhci_device_ctx_t *dctx = malloc32(sizeof(xhci_device_ctx_t));
141 if (!dctx) {
142 err = ENOMEM;
143 goto err_ring;
144 }
145 memset(dctx, 0, sizeof(xhci_device_ctx_t));
146
147 hc->dcbaa[slot_id] = addr_to_phys(dctx);
148
149 memset(&hc->dcbaa_virt[slot_id], 0, sizeof(xhci_virt_device_ctx_t));
150 hc->dcbaa_virt[slot_id].dev_ctx = dctx;
151 hc->dcbaa_virt[slot_id].trs[0] = ep_ring;
152
153 xhci_cmd_init(&cmd);
154 cmd.slot_id = slot_id;
155 xhci_send_address_device_command(hc, &cmd, ictx);
156 if ((err = xhci_cmd_wait(&cmd, 100000)) != EOK)
157 goto err_dctx;
158
159 xhci_cmd_fini(&cmd);
160
161 dev->address = XHCI_SLOT_DEVICE_ADDRESS(dctx->slot_ctx);
162 usb_log_debug2("Obtained USB address: %d.\n", dev->address);
163
164 // Ask libusbhost to create a control endpoint for EP0.
165 bus_t *bus_base = &bus->base;
166 usb_target_t ep0_target = { .address = dev->address, .endpoint = 0 };
167 usb_direction_t ep0_direction = USB_DIRECTION_BOTH;
168
169 // TODO: Should this call be unified with other calls to `bus_add_ep()`?
170 err = bus_add_ep(bus_base, dev, ep0_target.endpoint, ep0_direction,
171 USB_TRANSFER_CONTROL, CTRL_PIPE_MIN_PACKET_SIZE, CTRL_PIPE_MIN_PACKET_SIZE, 1);
172
173 if (err != EOK)
174 goto err_add_ep;
175
176 // Save all data structures in the corresponding xhci_device_t.
177 endpoint_t *ep0_base = bus_find_endpoint(bus_base, ep0_target, ep0_direction);
178 xhci_endpoint_t *ep0 = xhci_endpoint_get(ep0_base);
179 xhci_device_t *xhci_dev = ep0->device;
180
181 xhci_dev->device = dev;
182 xhci_dev->slot_id = slot_id;
183 xhci_dev->usb3 = speed->major == 3;
184 xhci_dev->hc = hc;
185
186 // TODO: Save anything else?
187
188 return EOK;
189
190err_add_ep:
191err_dctx:
192 if (dctx) {
193 free(dctx);
194 hc->dcbaa[slot_id] = 0;
195 memset(&hc->dcbaa_virt[slot_id], 0, sizeof(xhci_virt_device_ctx_t));
196 }
197err_ring:
198 if (ep_ring) {
199 xhci_trb_ring_fini(ep_ring);
200 free(ep_ring);
201 }
202err_ictx:
203 free(ictx);
204 return err;
205}
206
207/** Create a device node for device directly connected to RH.
208 */
209static int rh_setup_device(xhci_rh_t *rh, uint8_t port_id)
210{
211 int err;
212 assert(rh);
213
214 xhci_bus_t *bus = &rh->hc->bus;
215
216 device_t *dev = hcd_ddf_device_create(rh->hc_device, bus->base.device_size);
217 if (!dev) {
218 usb_log_error("Failed to create USB device function.");
219 return ENOMEM;
220 }
221
222 dev->hub = &rh->device;
223 dev->port = port_id;
224
225 if ((err = xhci_bus_enumerate_device(bus, rh->hc, dev))) {
226 usb_log_error("Failed to enumerate USB device: %s", str_error(err));
227 return err;
228 }
229
230 if (!ddf_fun_get_name(dev->fun)) {
231 device_set_default_name(dev);
232 }
233
234 if ((err = ddf_fun_bind(dev->fun))) {
235 usb_log_error("Device(%d): Failed to register: %s.", dev->address, str_error(err));
236 goto err_usb_dev;
237 }
238
239 fibril_mutex_lock(&rh->device.guard);
240 list_append(&dev->link, &rh->device.devices);
241 fibril_mutex_unlock(&rh->device.guard);
242
243 return EOK;
244
245err_usb_dev:
246 hcd_ddf_device_destroy(dev);
247 return err;
248}
249
250static int handle_connected_device(xhci_rh_t *rh, uint8_t port_id)
251{
252 xhci_port_regs_t *regs = &rh->hc->op_regs->portrs[port_id - 1];
253
254 uint8_t link_state = XHCI_REG_RD(regs, XHCI_PORT_PLS);
255 const xhci_port_speed_t *speed = xhci_rh_get_port_speed(rh, port_id);
256
257 usb_log_info("Detected new %.4s%u.%u device on port %u.", speed->name, speed->major, speed->minor, port_id);
258
259 if (speed->major == 3) {
260 if (link_state == 0) {
261 /* USB3 is automatically advanced to enabled. */
262 return rh_setup_device(rh, port_id);
263 }
264 else if (link_state == 5) {
265 /* USB 3 failed to enable. */
266 usb_log_error("USB 3 port couldn't be enabled.");
267 return EAGAIN;
268 }
269 else {
270 usb_log_error("USB 3 port is in invalid state %u.", link_state);
271 return EINVAL;
272 }
273 }
274 else {
275 usb_log_debug("USB 2 device attached, issuing reset.");
276 xhci_rh_reset_port(rh, port_id);
277 /*
278 FIXME: we need to wait for the event triggered by the reset
279 and then alloc_dev()... can't it be done directly instead of
280 going around?
281 */
282 return EOK;
283 }
284}
285
286/** Handle an incoming Port Change Detected Event.
287 */
288int xhci_rh_handle_port_status_change_event(xhci_hc_t *hc, xhci_trb_t *trb)
289{
290 uint8_t port_id = XHCI_QWORD_EXTRACT(trb->parameter, 31, 24);
291 usb_log_debug("Port status change event detected for port %u.", port_id);
292
293 /**
294 * We can't be sure that the port change this event announces is the
295 * only port change that happened (see section 4.19.2 of the xHCI
296 * specification). Therefore, we just check all ports for changes.
297 */
298 xhci_rh_handle_port_change(&hc->rh);
299
300 return EOK;
301}
302
303void xhci_rh_handle_port_change(xhci_rh_t *rh)
304{
305 for (uint8_t i = 1; i <= rh->max_ports; ++i) {
306 xhci_port_regs_t *regs = &rh->hc->op_regs->portrs[i - 1];
307
308 uint32_t events = XHCI_REG_RD_FIELD(&regs->portsc, 32);
309 XHCI_REG_WR_FIELD(&regs->portsc, events, 32);
310
311 events &= port_change_mask;
312
313 if (events & XHCI_REG_MASK(XHCI_PORT_CSC)) {
314 usb_log_info("Connected state changed on port %u.", i);
315 events &= ~XHCI_REG_MASK(XHCI_PORT_CSC);
316
317 bool connected = XHCI_REG_RD(regs, XHCI_PORT_CCS);
318 if (connected)
319 handle_connected_device(rh, i);
320 }
321
322 if (events & XHCI_REG_MASK(XHCI_PORT_PEC)) {
323 usb_log_info("Port enabled changed on port %u.", i);
324 events &= ~XHCI_REG_MASK(XHCI_PORT_PEC);
325 }
326
327 if (events & XHCI_REG_MASK(XHCI_PORT_WRC)) {
328 usb_log_info("Warm port reset on port %u completed.", i);
329 events &= ~XHCI_REG_MASK(XHCI_PORT_WRC);
330 }
331
332 if (events & XHCI_REG_MASK(XHCI_PORT_OCC)) {
333 usb_log_info("Over-current change on port %u.", i);
334 events &= ~XHCI_REG_MASK(XHCI_PORT_OCC);
335 }
336
337 if (events & XHCI_REG_MASK(XHCI_PORT_PRC)) {
338 usb_log_info("Port reset on port %u completed.", i);
339 events &= ~XHCI_REG_MASK(XHCI_PORT_PRC);
340
341 const xhci_port_speed_t *speed = xhci_rh_get_port_speed(rh, i);
342 if (speed->major != 3) {
343 /* FIXME: We probably don't want to do this
344 * every time USB2 port is reset. This is a
345 * temporary workaround. */
346 rh_setup_device(rh, i);
347 }
348 }
349
350 if (events & XHCI_REG_MASK(XHCI_PORT_PLC)) {
351 usb_log_info("Port link state changed on port %u.", i);
352 events &= ~XHCI_REG_MASK(XHCI_PORT_PLC);
353 }
354
355 if (events & XHCI_REG_MASK(XHCI_PORT_CEC)) {
356 usb_log_info("Port %u failed to configure link.", i);
357 events &= ~XHCI_REG_MASK(XHCI_PORT_CEC);
358 }
359
360 if (events) {
361 usb_log_warning("Port change (0x%08x) ignored on port %u.", events, i);
362 }
363 }
364
365 /**
366 * Theory:
367 *
368 * Although more events could have happened while processing, the PCD
369 * bit in USBSTS will be set on every change. Because the PCD is
370 * cleared even before the interrupt is cleared, it is safe to assume
371 * that this handler will be called again.
372 *
373 * But because we could have handled the event in previous run of this
374 * handler, it is not an error when no event is detected.
375 *
376 * Reality:
377 *
378 * The PCD bit is never set. TODO Check why the interrupt never carries
379 * the PCD flag. Possibly repeat the checking until we're sure the
380 * PSCEG is 0 - check section 4.19.2 of the xHCI spec.
381 */
382}
383
384const xhci_port_speed_t *xhci_rh_get_port_speed(xhci_rh_t *rh, uint8_t port)
385{
386 xhci_port_regs_t *port_regs = &rh->hc->op_regs->portrs[port - 1];
387
388 unsigned psiv = XHCI_REG_RD(port_regs, XHCI_PORT_PS);
389 return &rh->speeds[psiv];
390}
391
392int xhci_rh_reset_port(xhci_rh_t* rh, uint8_t port)
393{
394 usb_log_debug2("Resetting port %u.", port);
395 xhci_port_regs_t *regs = &rh->hc->op_regs->portrs[port-1];
396 XHCI_REG_SET(regs, XHCI_PORT_PR, 1);
397
398 return EOK;
399}
400
401int xhci_rh_fini(xhci_rh_t *rh)
402{
403 /* TODO: Implement me! */
404 usb_log_debug2("Called xhci_rh_fini().");
405 return EOK;
406}
407
408/**
409 * @}
410 */
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