source: mainline/uspace/drv/bus/usb/xhci/rh.c@ ddbd088

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ddbd088 was 047fbc8, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci rh: have standalone buffer for events

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File size: 9.3 KB
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[7bd99bf]1/*
[dcf0597]2 * Copyright (c) 2017 Michal Staruch
[7bd99bf]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The roothub structures abstraction.
34 */
[d967aa1]35
[7bd99bf]36#include <errno.h>
37#include <str_error.h>
[2770b66]38#include <usb/request.h>
[7bd99bf]39#include <usb/debug.h>
[20eaa82]40#include <usb/host/bus.h>
[867b375]41#include <usb/host/ddf_helpers.h>
[b80c1ab]42#include <usb/host/dma_buffer.h>
[2770b66]43#include <usb/host/hcd.h>
[a9fcd73]44#include <usb/port.h>
[867b375]45
[7bd99bf]46#include "debug.h"
[174788f]47#include "commands.h"
[370a1c8]48#include "endpoint.h"
[7bd99bf]49#include "hc.h"
50#include "hw_struct/trb.h"
[c8bb7090]51#include "rh.h"
[e9e24f2]52#include "transfers.h"
[7bd99bf]53
[9876e34]54/* This mask only lists registers, which imply port change. */
[9b56e528]55static const uint32_t port_events_mask =
[9876e34]56 XHCI_REG_MASK(XHCI_PORT_CSC) |
57 XHCI_REG_MASK(XHCI_PORT_PEC) |
58 XHCI_REG_MASK(XHCI_PORT_WRC) |
59 XHCI_REG_MASK(XHCI_PORT_OCC) |
60 XHCI_REG_MASK(XHCI_PORT_PRC) |
61 XHCI_REG_MASK(XHCI_PORT_PLC) |
62 XHCI_REG_MASK(XHCI_PORT_CEC);
63
[58f4c0f]64static const uint32_t port_reset_mask =
65 XHCI_REG_MASK(XHCI_PORT_WRC) |
66 XHCI_REG_MASK(XHCI_PORT_PRC);
67
[a9fcd73]68typedef struct rh_port {
69 usb_port_t base;
70 xhci_rh_t *rh;
71 uint8_t major;
72 xhci_port_regs_t *regs;
73 xhci_device_t *device;
74} rh_port_t;
75
[047fbc8]76static int rh_worker(void *);
77
[eb928c4]78/**
79 * Initialize the roothub subsystem.
80 */
[63431db2]81int xhci_rh_init(xhci_rh_t *rh, xhci_hc_t *hc)
[d32d51d]82{
[5c5c9407]83 assert(rh);
[816335c]84 assert(hc);
85
86 rh->hc = hc;
[9876e34]87 rh->max_ports = XHCI_REG_RD(hc->cap_regs, XHCI_CAP_MAX_PORTS);
[a9fcd73]88 rh->ports = calloc(rh->max_ports, sizeof(rh_port_t));
89 if (!rh->ports)
90 return ENOMEM;
[5c5c9407]91
[6832245]92 const int err = bus_device_init(&rh->device.base, &rh->hc->bus.base);
[a9fcd73]93 if (err) {
94 free(rh->ports);
[2cf28b9]95 return err;
[a9fcd73]96 }
97
[047fbc8]98 fid_t fid = fibril_create(&rh_worker, rh);
99 if (!fid) {
100 free(rh->ports);
101 return err;
102 }
103
[a9fcd73]104 for (unsigned i = 0; i < rh->max_ports; i++) {
105 usb_port_init(&rh->ports[i].base);
106 rh->ports[i].rh = rh;
107 rh->ports[i].regs = &rh->hc->op_regs->portrs[i];
108 }
[2cf28b9]109
110 /* Initialize route string */
111 rh->device.route_str = 0;
112
[047fbc8]113 xhci_sw_ring_init(&rh->event_ring, rh->max_ports);
114
115 hc->event_fibril_completion.active = true;
116 fibril_mutex_initialize(&hc->event_fibril_completion.guard);
117 fibril_condvar_initialize(&hc->event_fibril_completion.cv);
118
119 fibril_add_ready(fid);
120
[2cf28b9]121 return EOK;
[d32d51d]122}
123
[eb928c4]124/**
125 * Finalize the RH subsystem.
126 */
127int xhci_rh_fini(xhci_rh_t *rh)
128{
129 assert(rh);
[a9fcd73]130 for (unsigned i = 0; i < rh->max_ports; i++)
131 usb_port_fini(&rh->ports[i].base);
[047fbc8]132
133 xhci_sw_ring_stop(&rh->event_ring);
134
135 // TODO: completion_wait
136 fibril_mutex_lock(&rh->event_fibril_completion.guard);
137 while (rh->event_fibril_completion.active)
138 fibril_condvar_wait(&rh->event_fibril_completion.cv,
139 &rh->event_fibril_completion.guard);
140 fibril_mutex_unlock(&rh->event_fibril_completion.guard);
141 xhci_sw_ring_fini(&rh->event_ring);
[eb928c4]142 return EOK;
143}
144
[a9fcd73]145static rh_port_t *get_rh_port(usb_port_t *port)
[49e62998]146{
[a9fcd73]147 assert(port);
148 return (rh_port_t *) port;
[49e62998]149}
150
[eb928c4]151/**
152 * Create and setup a device directly connected to RH. As the xHCI is not using
153 * a virtual usbhub device for RH, this routine is called for devices directly.
[20eaa82]154 */
[a9fcd73]155static int rh_enumerate_device(usb_port_t *usb_port)
[867b375]156{
[20eaa82]157 int err;
[a9fcd73]158 rh_port_t *port = get_rh_port(usb_port);
[2cf28b9]159
[a9fcd73]160 if (port->major <= 2) {
161 /* USB ports for lower speeds needs their port reset first. */
162 XHCI_REG_SET(port->regs, XHCI_PORT_PR, 1);
163 if ((err = usb_port_wait_for_enabled(&port->base)))
164 return err;
[58f4c0f]165 } else {
166 /* Do the Warm reset to ensure the state is clear. */
167 XHCI_REG_SET(port->regs, XHCI_PORT_WPR, 1);
168 if ((err = usb_port_wait_for_enabled(&port->base)))
169 return err;
[9b56e528]170 }
171
[0f79283b]172 /*
173 * We cannot know in advance, whether the speed in the status register
174 * is valid - it depends on the protocol. So we read it later, but then
175 * we have to check if the port is still enabled.
176 */
177 uint32_t status = XHCI_REG_RD_FIELD(&port->regs->portsc, 32);
178
179 bool enabled = !!(status & XHCI_REG_MASK(XHCI_PORT_PED));
180 if (!enabled)
181 return ENOENT;
182
[8033f89]183 unsigned psiv = (status & XHCI_REG_MASK(XHCI_PORT_PS))
184 >> XHCI_REG_SHIFT(XHCI_PORT_PS);
[0f79283b]185 const usb_speed_t speed = port->rh->hc->speeds[psiv].usb_speed;
186
187 device_t *dev = hcd_ddf_fun_create(&port->rh->hc->base, speed);
[20eaa82]188 if (!dev) {
189 usb_log_error("Failed to create USB device function.");
190 return ENOMEM;
191 }
192
[a9fcd73]193 dev->hub = &port->rh->device.base;
[2aaba7e]194 dev->tier = 1;
[a9fcd73]195 dev->port = port - port->rh->ports + 1;
[eeca8a6]196
[a9fcd73]197 port->device = xhci_device_get(dev);
198 port->device->rh_port = dev->port;
[0206d35]199
[8033f89]200 usb_log_debug("Enumerating new %s-speed device on port %u.",
201 usb_str_speed(dev->speed), dev->port);
[36e8a0c8]202
[eb928c4]203 if ((err = bus_device_enumerate(dev))) {
[20eaa82]204 usb_log_error("Failed to enumerate USB device: %s", str_error(err));
205 return err;
206 }
207
208 if (!ddf_fun_get_name(dev->fun)) {
[6832245]209 bus_device_set_default_name(dev);
[20eaa82]210 }
211
212 if ((err = ddf_fun_bind(dev->fun))) {
[9620a54]213 usb_log_error("Failed to register device " XHCI_DEV_FMT " DDF function: %s.",
[a9fcd73]214 XHCI_DEV_ARGS(*port->device), str_error(err));
[20eaa82]215 goto err_usb_dev;
216 }
217
218 return EOK;
219
220err_usb_dev:
[32fb6bce]221 hcd_ddf_fun_destroy(dev);
[a9fcd73]222 port->device = NULL;
[20eaa82]223 return err;
[867b375]224}
225
[eb928c4]226/**
227 * Deal with a detached device.
[f45c78f]228 */
[a9fcd73]229static void rh_remove_device(usb_port_t *usb_port)
[f45c78f]230{
[a9fcd73]231 rh_port_t *port = get_rh_port(usb_port);
[a4e26882]232
[a9fcd73]233 assert(port->device);
234 usb_log_info("Device " XHCI_DEV_FMT " at port %zu has been disconnected.",
235 XHCI_DEV_ARGS(*port->device), port - port->rh->ports + 1);
[2cf28b9]236
[31cca4f3]237 /* Remove device from XHCI bus. */
[a9fcd73]238 bus_device_gone(&port->device->base);
[49e62998]239
[a9fcd73]240 /* Mark the device as detached. */
241 port->device = NULL;
[49e62998]242}
243
[eb928c4]244/**
[fb154e13]245 * Handle all changes on specified port.
[eb928c4]246 */
[047fbc8]247static void handle_port_change(xhci_rh_t *rh, uint8_t port_id)
[d32d51d]248{
[a9fcd73]249 rh_port_t * const port = &rh->ports[port_id - 1];
[07c08ea]250
[a9fcd73]251 uint32_t status = XHCI_REG_RD_FIELD(&port->regs->portsc, 32);
[5c5c9407]252
[a9fcd73]253 while (status & port_events_mask) {
[9b56e528]254 /*
255 * The PED bit in xHCI has RW1C semantics, which means that
256 * writing 1 to it will disable the port. Which means all
257 * standard mechanisms of register handling fails here.
258 */
[8033f89]259 XHCI_REG_WR_FIELD(&port->regs->portsc,
260 status & ~XHCI_REG_MASK(XHCI_PORT_PED), 32);
[5c5c9407]261
[58f4c0f]262 const bool connected = !!(status & XHCI_REG_MASK(XHCI_PORT_CCS));
263 const bool enabled = !!(status & XHCI_REG_MASK(XHCI_PORT_PED));
264
[a9fcd73]265 if (status & XHCI_REG_MASK(XHCI_PORT_CSC)) {
[fb154e13]266 usb_log_info("Connected state changed on port %u.", port_id);
[a9fcd73]267 status &= ~XHCI_REG_MASK(XHCI_PORT_CSC);
[5c5c9407]268
[f45c78f]269 if (connected) {
[a9fcd73]270 usb_port_connected(&port->base, &rh_enumerate_device);
[f45c78f]271 } else {
[a9fcd73]272 usb_port_disabled(&port->base, &rh_remove_device);
[f45c78f]273 }
[dcf0597]274 }
[5c5c9407]275
[58f4c0f]276 if (status & port_reset_mask) {
277 status &= ~port_reset_mask;
[fb154e13]278
[a9fcd73]279 if (enabled) {
[0f79283b]280 usb_port_enabled(&port->base);
[a9fcd73]281 } else {
282 usb_port_disabled(&port->base, &rh_remove_device);
283 }
284 }
285
286 status &= port_events_mask;
287 if (status != 0)
288 usb_log_debug("RH port %u change not handled: 0x%x", port_id, status);
[fb154e13]289
290 /* Make sure that PSCEG is 0 before exiting the loop. */
[a9fcd73]291 status = XHCI_REG_RD_FIELD(&port->regs->portsc, 32);
[916991b]292 }
[07c08ea]293}
294
[8033f89]295void xhci_rh_set_ports_protocol(xhci_rh_t *rh,
296 unsigned offset, unsigned count, unsigned major)
[07c08ea]297{
[a9fcd73]298 for (unsigned i = offset; i < offset + count; i++)
299 rh->ports[i - 1].major = major;
[07c08ea]300}
301
[05770666]302void xhci_rh_startup(xhci_rh_t *rh)
303{
304 /* The reset changed status of all ports, and SW originated reason does
305 * not cause an interrupt.
306 */
[09187c6e]307 for (uint8_t i = 0; i < rh->max_ports; ++i) {
[047fbc8]308 handle_port_change(rh, i + 1);
[05770666]309
310 rh_port_t * const port = &rh->ports[i];
311
312 /*
313 * When xHCI starts, for some reasons USB 3 ports do not have
314 * the CSC bit, even though they are connected. Try to find
315 * such ports.
316 */
[8033f89]317 if (XHCI_REG_RD(port->regs, XHCI_PORT_CCS)
318 && port->base.state == PORT_DISABLED)
[05770666]319 usb_port_connected(&port->base, &rh_enumerate_device);
320 }
321}
322
[047fbc8]323static int rh_worker(void *arg)
324{
325 xhci_rh_t * const rh = arg;
326
327 xhci_trb_t trb;
328 while (xhci_sw_ring_dequeue(&rh->event_ring, &trb) == EOK) {
329 uint8_t port_id = XHCI_QWORD_EXTRACT(trb.parameter, 31, 24);
330 usb_log_debug("Port status change event detected for port %u.", port_id);
331 handle_port_change(rh, port_id);
332 }
333
334 // TODO: completion_complete
335 fibril_mutex_lock(&rh->event_fibril_completion.guard);
336 rh->event_fibril_completion.active = false;
337 fibril_condvar_broadcast(&rh->event_fibril_completion.cv);
338 fibril_mutex_unlock(&rh->event_fibril_completion.guard);
339
340 return EOK;
341}
342
[c8bb7090]343/**
344 * @}
345 */
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