| 1 | /*
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| 2 | * Copyright (c) 2017 HelUSB3 team
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief The host controller endpoint management.
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| 34 | */
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| 35 |
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| 36 | #include <str_error.h>
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| 37 | #include <macros.h>
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| 38 |
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| 39 | #include "endpoint.h"
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| 40 | #include "hw_struct/trb.h"
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| 41 | #include "hw_struct/regs.h"
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| 42 | #include "trb_ring.h"
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| 43 | #include "hc.h"
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| 44 | #include "bus.h"
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| 45 |
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| 46 | #include "isoch.h"
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| 47 |
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| 48 | void isoch_init(xhci_endpoint_t *ep, const usb_endpoint_descriptors_t *desc)
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| 49 | {
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| 50 | assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
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| 51 | xhci_isoch_t * const isoch = ep->isoch;
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| 52 |
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| 53 | fibril_mutex_initialize(&isoch->guard);
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| 54 | fibril_condvar_initialize(&isoch->avail);
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| 55 |
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| 56 | const xhci_hc_t *hc = bus_to_xhci_bus(ep->base.device->bus)->hc;
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| 57 |
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| 58 | /*
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| 59 | * We shall cover at least twice the IST period, otherwise we will get
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| 60 | * an over/underrun every time.
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| 61 | */
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| 62 | isoch->buffer_count = (2 * hc->ist) / ep->interval;
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| 63 |
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| 64 | /* 2 buffers are the very minimum. */
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| 65 | isoch->buffer_count = max(2, isoch->buffer_count);
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| 66 |
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| 67 | usb_log_error("[isoch] isoch setup with %zu buffers", isoch->buffer_count);
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| 68 | }
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| 69 |
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| 70 | static void isoch_reset(xhci_endpoint_t *ep)
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| 71 | {
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| 72 | xhci_isoch_t * const isoch = ep->isoch;
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| 73 | assert(fibril_mutex_is_locked(&isoch->guard));
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| 74 |
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| 75 | isoch->dequeue = isoch->enqueue = isoch->hw_enqueue = 0;
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| 76 |
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| 77 | for (size_t i = 0; i < isoch->buffer_count; ++i) {
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| 78 | isoch->transfers[i].state = ISOCH_EMPTY;
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| 79 | }
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| 80 |
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| 81 | fibril_timer_clear_locked(isoch->feeding_timer);
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| 82 | isoch->last_mfindex = -1U;
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| 83 | usb_log_info("[isoch] Endpoint" XHCI_EP_FMT ": Data flow reset.", XHCI_EP_ARGS(*ep));
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| 84 | }
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| 85 |
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| 86 | void isoch_fini(xhci_endpoint_t *ep)
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| 87 | {
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| 88 | assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
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| 89 | xhci_isoch_t * const isoch = ep->isoch;
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| 90 |
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| 91 | if (isoch->feeding_timer) {
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| 92 | fibril_timer_clear(isoch->feeding_timer);
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| 93 | fibril_timer_destroy(isoch->feeding_timer);
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| 94 | }
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| 95 |
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| 96 | if (isoch->transfers) {
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| 97 | for (size_t i = 0; i < isoch->buffer_count; ++i)
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| 98 | dma_buffer_free(&isoch->transfers[i].data);
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| 99 | free(isoch->transfers);
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| 100 | }
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| 101 | }
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| 102 |
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| 103 | /**
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| 104 | * Allocate isochronous buffers. Create the feeding timer.
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| 105 | */
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| 106 | int isoch_alloc_transfers(xhci_endpoint_t *ep) {
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| 107 | assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
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| 108 | xhci_isoch_t * const isoch = ep->isoch;
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| 109 |
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| 110 | isoch->feeding_timer = fibril_timer_create(&isoch->guard);
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| 111 | if (!isoch->feeding_timer)
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| 112 | return ENOMEM;
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| 113 |
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| 114 | isoch->transfers = calloc(isoch->buffer_count, sizeof(xhci_isoch_transfer_t));
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| 115 | if(!isoch->transfers)
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| 116 | goto err;
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| 117 |
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| 118 | for (size_t i = 0; i < isoch->buffer_count; ++i) {
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| 119 | xhci_isoch_transfer_t *transfer = &isoch->transfers[i];
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| 120 | if (dma_buffer_alloc(&transfer->data, ep->base.max_transfer_size)) {
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| 121 | goto err;
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| 122 | }
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| 123 | }
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| 124 |
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| 125 | fibril_mutex_lock(&isoch->guard);
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| 126 | isoch_reset(ep);
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| 127 | fibril_mutex_unlock(&isoch->guard);
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| 128 |
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| 129 | return EOK;
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| 130 | err:
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| 131 | isoch_fini(ep);
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| 132 | return ENOMEM;
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| 133 | }
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| 134 |
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| 135 | static int schedule_isochronous_trb(xhci_endpoint_t *ep, xhci_isoch_transfer_t *it)
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| 136 | {
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| 137 | xhci_trb_t trb;
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| 138 | xhci_trb_clean(&trb);
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| 139 |
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| 140 | trb.parameter = it->data.phys;
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| 141 | TRB_CTRL_SET_XFER_LEN(trb, it->size);
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| 142 | TRB_CTRL_SET_TD_SIZE(trb, 0);
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| 143 | TRB_CTRL_SET_IOC(trb, 1);
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| 144 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_ISOCH);
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| 145 |
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| 146 | // see 4.14.1 and 4.11.2.3 for the explanation, how to calculate those
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| 147 | size_t tdpc = it->size / 1024 + ((it->size % 1024) ? 1 : 0);
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| 148 | size_t tbc = tdpc / ep->max_burst;
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| 149 | if (!tdpc % ep->max_burst) --tbc;
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| 150 | size_t bsp = tdpc % ep->max_burst;
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| 151 | size_t tlbpc = (bsp ? bsp : ep->max_burst) - 1;
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| 152 |
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| 153 | TRB_ISOCH_SET_TBC(trb, tbc);
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| 154 | TRB_ISOCH_SET_TLBPC(trb, tlbpc);
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| 155 | TRB_ISOCH_SET_FRAMEID(trb, (it->mfindex / 8) % 2048);
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| 156 |
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| 157 | const int err = xhci_trb_ring_enqueue(&ep->ring, &trb, &it->interrupt_trb_phys);
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| 158 | return err;
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| 159 | }
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| 160 |
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| 161 | static inline void calc_next_mfindex(xhci_endpoint_t *ep, xhci_isoch_transfer_t *it)
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| 162 | {
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| 163 | xhci_isoch_t * const isoch = ep->isoch;
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| 164 | if (isoch->last_mfindex == -1U) {
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| 165 | const xhci_bus_t *bus = bus_to_xhci_bus(ep->base.device->bus);
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| 166 | const xhci_hc_t *hc = bus->hc;
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| 167 |
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| 168 | /* Choose some number, give us a little time to prepare the
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| 169 | * buffers */
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| 170 | it->mfindex = XHCI_REG_RD(hc->rt_regs, XHCI_RT_MFINDEX) + 1
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| 171 | + isoch->buffer_count * ep->interval
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| 172 | + hc->ist;
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| 173 |
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| 174 | // Align to ESIT start boundary
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| 175 | it->mfindex += ep->interval - 1;
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| 176 | it->mfindex &= ~(ep->interval - 1);
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| 177 | } else {
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| 178 | it->mfindex = (isoch->last_mfindex + ep->interval) % XHCI_MFINDEX_MAX;
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| 179 | }
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| 180 | }
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| 181 |
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| 182 | /** 825 ms in uframes */
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| 183 | #define END_FRAME_DELAY (895000 / 125)
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| 184 |
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| 185 | typedef enum {
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| 186 | WINDOW_TOO_SOON,
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| 187 | WINDOW_INSIDE,
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| 188 | WINDOW_TOO_LATE,
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| 189 | } window_position_t;
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| 190 |
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| 191 | typedef struct {
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| 192 | window_position_t position;
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| 193 | uint32_t offset;
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| 194 | } window_decision_t;
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| 195 |
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| 196 | /**
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| 197 | * Decide on the position of mfindex relatively to the window specified by
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| 198 | * Start Frame ID and End Frame ID. The resulting structure contains the
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| 199 | * decision, and in case of the mfindex being outside, also the number of
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| 200 | * uframes it's off.
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| 201 | */
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| 202 | static inline void window_decide(window_decision_t *res, xhci_hc_t *hc, uint32_t mfindex)
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| 203 | {
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| 204 | uint32_t current_mfindex = XHCI_REG_RD(hc->rt_regs, XHCI_RT_MFINDEX) + 1;
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| 205 |
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| 206 | /*
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| 207 | * In your mind, rotate the clock so the window is at its beginning.
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| 208 | * The length of the window is always the same, and by rotating the
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| 209 | * mfindex too, we can decide by the value of it easily.
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| 210 | */
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| 211 | mfindex = (mfindex - current_mfindex - hc->ist + XHCI_MFINDEX_MAX) % XHCI_MFINDEX_MAX;
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| 212 | const uint32_t end = END_FRAME_DELAY - hc->ist;
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| 213 | const uint32_t threshold = (XHCI_MFINDEX_MAX + end) / 2;
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| 214 |
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| 215 | if (mfindex <= end) {
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| 216 | res->position = WINDOW_INSIDE;
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| 217 | } else if (mfindex > threshold) {
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| 218 | res->position = WINDOW_TOO_LATE;
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| 219 | res->offset = XHCI_MFINDEX_MAX - mfindex;
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| 220 | } else {
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| 221 | res->position = WINDOW_TOO_SOON;
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| 222 | res->offset = mfindex - end;
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| 223 | }
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| 224 | /*
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| 225 | * TODO: The "size" of the clock is too low. We have to scale it a bit
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| 226 | * to ensure correct scheduling of transfers, that are
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| 227 | * buffer_count * interval away from now.
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| 228 | * Maximum interval is 8 seconds, which means we need a size of
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| 229 | * 16 seconds. The size of MFIINDEX is 2 seconds only.
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| 230 | *
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| 231 | * A plan is to create a thin abstraction at HC, which would return
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| 232 | * a time from 32-bit clock, having its high bits updated by the
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| 233 | * MFINDEX Wrap Event, and low bits from the MFINDEX register. Using
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| 234 | * this 32-bit clock, one can plan 6 days ahead.
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| 235 | */
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| 236 | }
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| 237 |
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| 238 | static void isoch_feed_out_timer(void *);
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| 239 | static void isoch_feed_in_timer(void *);
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| 240 |
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| 241 | /**
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| 242 | * Schedule TRBs with filled buffers to HW. Takes filled isoch transfers and
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| 243 | * pushes their TRBs to the ring.
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| 244 | *
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| 245 | * According to 4.11.2.5, we can't just push all TRBs we have. We must not do
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| 246 | * it too late, but also not too soon.
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| 247 | */
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| 248 | static void isoch_feed_out(xhci_endpoint_t *ep)
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| 249 | {
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| 250 | assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
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| 251 | xhci_isoch_t * const isoch = ep->isoch;
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| 252 | assert(fibril_mutex_is_locked(&isoch->guard));
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| 253 |
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| 254 | xhci_bus_t *bus = bus_to_xhci_bus(ep->base.device->bus);
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| 255 | xhci_hc_t *hc = bus->hc;
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| 256 |
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| 257 | bool fed = false;
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| 258 |
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| 259 | while (isoch->hw_enqueue != isoch->enqueue) {
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| 260 | xhci_isoch_transfer_t * const it = &isoch->transfers[isoch->hw_enqueue];
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| 261 |
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| 262 | assert(it->state == ISOCH_FILLED);
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| 263 |
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| 264 | window_decision_t wd;
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| 265 | window_decide(&wd, hc, it->mfindex);
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| 266 |
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| 267 | switch (wd.position) {
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| 268 | case WINDOW_TOO_SOON: {
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| 269 | const suseconds_t delay = wd.offset * 125;
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| 270 | usb_log_debug2("[isoch] delaying feeding buffer %lu for %ldus",
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| 271 | it - isoch->transfers, delay);
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| 272 | fibril_timer_set_locked(isoch->feeding_timer, delay,
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| 273 | isoch_feed_out_timer, ep);
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| 274 | goto out;
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| 275 | }
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| 276 |
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| 277 | case WINDOW_INSIDE:
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| 278 | usb_log_debug2("[isoch] feeding buffer %lu at 0x%x",
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| 279 | it - isoch->transfers, it->mfindex);
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| 280 | it->error = schedule_isochronous_trb(ep, it);
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| 281 | if (it->error) {
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| 282 | it->state = ISOCH_COMPLETE;
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| 283 | } else {
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| 284 | it->state = ISOCH_FED;
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| 285 | fed = true;
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| 286 | }
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| 287 |
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| 288 | isoch->hw_enqueue = (isoch->hw_enqueue + 1) % isoch->buffer_count;
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| 289 | break;
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| 290 |
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| 291 | case WINDOW_TOO_LATE:
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| 292 | /* Missed the opportunity to schedule. Just mark this transfer as skipped. */
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| 293 | usb_log_debug2("[isoch] missed feeding buffer %lu at 0x%x by %u uframes",
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| 294 | it - isoch->transfers, it->mfindex, wd.offset);
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| 295 | it->state = ISOCH_COMPLETE;
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| 296 | it->error = EOK;
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| 297 | it->size = 0;
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| 298 |
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| 299 | isoch->hw_enqueue = (isoch->hw_enqueue + 1) % isoch->buffer_count;
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| 300 | break;
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| 301 | }
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| 302 | }
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| 303 | out:
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| 304 |
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| 305 | if (fed) {
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| 306 | const uint8_t slot_id = xhci_device_get(ep->base.device)->slot_id;
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| 307 | const uint8_t target = xhci_endpoint_index(ep) + 1; /* EP Doorbells start at 1 */
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| 308 | hc_ring_doorbell(hc, slot_id, target);
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| 309 | }
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| 310 |
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| 311 | }
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| 312 |
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| 313 | static void isoch_feed_out_timer(void *ep)
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| 314 | {
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| 315 | xhci_isoch_t * const isoch = xhci_endpoint_get(ep)->isoch;
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| 316 | fibril_mutex_lock(&isoch->guard);
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| 317 | isoch_feed_out(ep);
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| 318 | fibril_mutex_unlock(&isoch->guard);
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| 319 | }
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| 320 |
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| 321 | /**
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| 322 | * Schedule TRBs with empty, withdrawn buffers to HW. Takes empty isoch
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| 323 | * transfers and pushes their TRBs to the ring.
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| 324 | *
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| 325 | * According to 4.11.2.5, we can't just push all TRBs we have. We must not do
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| 326 | * it too late, but also not too soon.
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| 327 | */
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| 328 | static void isoch_feed_in(xhci_endpoint_t *ep)
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| 329 | {
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| 330 | assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
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| 331 | xhci_isoch_t * const isoch = ep->isoch;
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| 332 | assert(fibril_mutex_is_locked(&isoch->guard));
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| 333 |
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| 334 | xhci_bus_t *bus = bus_to_xhci_bus(ep->base.device->bus);
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| 335 | xhci_hc_t *hc = bus->hc;
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| 336 |
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| 337 | bool fed = false;
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| 338 |
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| 339 | while (isoch->transfers[isoch->enqueue].state <= ISOCH_FILLED) {
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| 340 | xhci_isoch_transfer_t * const it = &isoch->transfers[isoch->enqueue];
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| 341 |
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| 342 | /* IN buffers are "filled" with free space */
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| 343 | if (it->state == ISOCH_EMPTY) {
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| 344 | it->size = ep->base.max_transfer_size;
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| 345 | it->state = ISOCH_FILLED;
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| 346 | calc_next_mfindex(ep, it);
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| 347 | }
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| 348 |
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| 349 | window_decision_t wd;
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| 350 | window_decide(&wd, hc, it->mfindex);
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| 351 |
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| 352 | switch (wd.position) {
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| 353 | case WINDOW_TOO_SOON: {
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| 354 | /* Not allowed to feed yet. Defer to later. */
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| 355 | const suseconds_t delay = wd.offset * 125;
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| 356 | usb_log_debug2("[isoch] delaying feeding buffer %lu for %ldus",
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| 357 | it - isoch->transfers, delay);
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| 358 | fibril_timer_set_locked(isoch->feeding_timer, delay,
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| 359 | isoch_feed_in_timer, ep);
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| 360 | goto out;
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| 361 | }
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| 362 |
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| 363 | case WINDOW_TOO_LATE:
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| 364 | usb_log_debug2("[isoch] missed feeding buffer %lu at 0x%x by %u uframes",
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| 365 | it - isoch->transfers, it->mfindex, wd.offset);
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| 366 | /* Missed the opportunity to schedule. Schedule ASAP. */
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| 367 | it->mfindex += wd.offset;
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| 368 | // Align to ESIT start boundary
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| 369 | it->mfindex += ep->interval - 1;
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| 370 | it->mfindex &= ~(ep->interval - 1);
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|---|
| 371 |
|
|---|
| 372 | /* fallthrough */
|
|---|
| 373 | case WINDOW_INSIDE:
|
|---|
| 374 | isoch->enqueue = (isoch->enqueue + 1) % isoch->buffer_count;
|
|---|
| 375 | isoch->last_mfindex = it->mfindex;
|
|---|
| 376 |
|
|---|
| 377 | usb_log_debug2("[isoch] feeding buffer %lu at 0x%x",
|
|---|
| 378 | it - isoch->transfers, it->mfindex);
|
|---|
| 379 |
|
|---|
| 380 | it->error = schedule_isochronous_trb(ep, it);
|
|---|
| 381 | if (it->error) {
|
|---|
| 382 | it->state = ISOCH_COMPLETE;
|
|---|
| 383 | } else {
|
|---|
| 384 | it->state = ISOCH_FED;
|
|---|
| 385 | fed = true;
|
|---|
| 386 | }
|
|---|
| 387 | break;
|
|---|
| 388 | }
|
|---|
| 389 | }
|
|---|
| 390 | out:
|
|---|
| 391 |
|
|---|
| 392 | if (fed) {
|
|---|
| 393 | const uint8_t slot_id = xhci_device_get(ep->base.device)->slot_id;
|
|---|
| 394 | const uint8_t target = xhci_endpoint_index(ep) + 1; /* EP Doorbells start at 1 */
|
|---|
| 395 | hc_ring_doorbell(hc, slot_id, target);
|
|---|
| 396 | }
|
|---|
| 397 | }
|
|---|
| 398 |
|
|---|
| 399 | static void isoch_feed_in_timer(void *ep)
|
|---|
| 400 | {
|
|---|
| 401 | xhci_isoch_t * const isoch = xhci_endpoint_get(ep)->isoch;
|
|---|
| 402 | fibril_mutex_lock(&isoch->guard);
|
|---|
| 403 | isoch_feed_in(ep);
|
|---|
| 404 | fibril_mutex_unlock(&isoch->guard);
|
|---|
| 405 | }
|
|---|
| 406 |
|
|---|
| 407 | /**
|
|---|
| 408 | * First, withdraw all (at least one) results left by previous transfers to
|
|---|
| 409 | * make room in the ring. Stop on first error.
|
|---|
| 410 | *
|
|---|
| 411 | * When there is at least one buffer free, fill it with data. Then try to feed
|
|---|
| 412 | * it to the xHC.
|
|---|
| 413 | */
|
|---|
| 414 | int isoch_schedule_out(xhci_transfer_t *transfer)
|
|---|
| 415 | {
|
|---|
| 416 | int err = EOK;
|
|---|
| 417 |
|
|---|
| 418 | xhci_endpoint_t *ep = xhci_endpoint_get(transfer->batch.ep);
|
|---|
| 419 | assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
|
|---|
| 420 | xhci_isoch_t * const isoch = ep->isoch;
|
|---|
| 421 |
|
|---|
| 422 | if (transfer->batch.buffer_size > ep->base.max_transfer_size) {
|
|---|
| 423 | usb_log_error("Cannot schedule an oversized isochronous transfer.");
|
|---|
| 424 | return ELIMIT;
|
|---|
| 425 | }
|
|---|
| 426 |
|
|---|
| 427 | fibril_mutex_lock(&isoch->guard);
|
|---|
| 428 |
|
|---|
| 429 | /* Get the buffer to write to */
|
|---|
| 430 | xhci_isoch_transfer_t *it = &isoch->transfers[isoch->enqueue];
|
|---|
| 431 |
|
|---|
| 432 | /* Wait for the buffer to be completed */
|
|---|
| 433 | while (it->state == ISOCH_FED || it->state == ISOCH_FILLED) {
|
|---|
| 434 | fibril_condvar_wait(&isoch->avail, &isoch->guard);
|
|---|
| 435 | /* The enqueue ptr may have changed while sleeping */
|
|---|
| 436 | it = &isoch->transfers[isoch->enqueue];
|
|---|
| 437 | }
|
|---|
| 438 |
|
|---|
| 439 | isoch->enqueue = (isoch->enqueue + 1) % isoch->buffer_count;
|
|---|
| 440 |
|
|---|
| 441 | /* Withdraw results from previous transfers. */
|
|---|
| 442 | transfer->batch.transfered_size = 0;
|
|---|
| 443 | xhci_isoch_transfer_t *res = &isoch->transfers[isoch->dequeue];
|
|---|
| 444 | while (res->state == ISOCH_COMPLETE) {
|
|---|
| 445 | isoch->dequeue = (isoch->dequeue + 1) % isoch->buffer_count;
|
|---|
| 446 |
|
|---|
| 447 | res->state = ISOCH_EMPTY;
|
|---|
| 448 | transfer->batch.transfered_size += res->size;
|
|---|
| 449 | transfer->batch.error = res->error;
|
|---|
| 450 | if (res->error)
|
|---|
| 451 | break; // Announce one error at a time
|
|---|
| 452 |
|
|---|
| 453 | res = &isoch->transfers[isoch->dequeue];
|
|---|
| 454 | }
|
|---|
| 455 |
|
|---|
| 456 | assert(it->state == ISOCH_EMPTY);
|
|---|
| 457 |
|
|---|
| 458 | /* Calculate when to schedule next transfer */
|
|---|
| 459 | calc_next_mfindex(ep, it);
|
|---|
| 460 | isoch->last_mfindex = it->mfindex;
|
|---|
| 461 | usb_log_debug2("[isoch] buffer %zu will be on schedule at 0x%x", it - isoch->transfers, it->mfindex);
|
|---|
| 462 |
|
|---|
| 463 | /* Prepare the transfer. */
|
|---|
| 464 | it->size = transfer->batch.buffer_size;
|
|---|
| 465 | memcpy(it->data.virt, transfer->batch.buffer, it->size);
|
|---|
| 466 | it->state = ISOCH_FILLED;
|
|---|
| 467 |
|
|---|
| 468 | fibril_timer_clear_locked(isoch->feeding_timer);
|
|---|
| 469 | isoch_feed_out(ep);
|
|---|
| 470 |
|
|---|
| 471 | fibril_mutex_unlock(&isoch->guard);
|
|---|
| 472 |
|
|---|
| 473 | usb_transfer_batch_finish(&transfer->batch);
|
|---|
| 474 | return err;
|
|---|
| 475 | }
|
|---|
| 476 |
|
|---|
| 477 | /**
|
|---|
| 478 | * IN is in fact easier than OUT. Our responsibility is just to feed all empty
|
|---|
| 479 | * buffers, and fetch one filled buffer from the ring.
|
|---|
| 480 | */
|
|---|
| 481 | int isoch_schedule_in(xhci_transfer_t *transfer)
|
|---|
| 482 | {
|
|---|
| 483 | xhci_endpoint_t *ep = xhci_endpoint_get(transfer->batch.ep);
|
|---|
| 484 | assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
|
|---|
| 485 | xhci_isoch_t * const isoch = ep->isoch;
|
|---|
| 486 |
|
|---|
| 487 | if (transfer->batch.buffer_size < ep->base.max_transfer_size) {
|
|---|
| 488 | usb_log_error("Cannot schedule an undersized isochronous transfer.");
|
|---|
| 489 | return ELIMIT;
|
|---|
| 490 | }
|
|---|
| 491 |
|
|---|
| 492 | fibril_mutex_lock(&isoch->guard);
|
|---|
| 493 |
|
|---|
| 494 | xhci_isoch_transfer_t *it = &isoch->transfers[isoch->dequeue];
|
|---|
| 495 |
|
|---|
| 496 | /* Wait for at least one transfer to complete. */
|
|---|
| 497 | while (it->state != ISOCH_COMPLETE) {
|
|---|
| 498 | /* First, make sure we will have something to read. */
|
|---|
| 499 | fibril_timer_clear_locked(isoch->feeding_timer);
|
|---|
| 500 | isoch_feed_in(ep);
|
|---|
| 501 |
|
|---|
| 502 | usb_log_debug2("[isoch] waiting for buffer %zu to be completed", it - isoch->transfers);
|
|---|
| 503 | fibril_condvar_wait(&isoch->avail, &isoch->guard);
|
|---|
| 504 |
|
|---|
| 505 | /* The enqueue ptr may have changed while sleeping */
|
|---|
| 506 | it = &isoch->transfers[isoch->dequeue];
|
|---|
| 507 | }
|
|---|
| 508 |
|
|---|
| 509 | isoch->dequeue = (isoch->dequeue + 1) % isoch->buffer_count;
|
|---|
| 510 |
|
|---|
| 511 | /* Withdraw results from previous transfer. */
|
|---|
| 512 | if (!it->error) {
|
|---|
| 513 | memcpy(transfer->batch.buffer, it->data.virt, it->size);
|
|---|
| 514 | transfer->batch.transfered_size = it->size;
|
|---|
| 515 | transfer->batch.error = it->error;
|
|---|
| 516 | }
|
|---|
| 517 |
|
|---|
| 518 | /* Prepare the empty buffer */
|
|---|
| 519 | it->state = ISOCH_EMPTY;
|
|---|
| 520 |
|
|---|
| 521 | fibril_mutex_unlock(&isoch->guard);
|
|---|
| 522 | usb_transfer_batch_finish(&transfer->batch);
|
|---|
| 523 |
|
|---|
| 524 | return EOK;
|
|---|
| 525 | }
|
|---|
| 526 |
|
|---|
| 527 | int isoch_handle_transfer_event(xhci_hc_t *hc, xhci_endpoint_t *ep, xhci_trb_t *trb)
|
|---|
| 528 | {
|
|---|
| 529 | assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS);
|
|---|
| 530 | xhci_isoch_t * const isoch = ep->isoch;
|
|---|
| 531 |
|
|---|
| 532 | fibril_mutex_lock(&ep->isoch->guard);
|
|---|
| 533 |
|
|---|
| 534 | int err;
|
|---|
| 535 | const xhci_trb_completion_code_t completion_code = TRB_COMPLETION_CODE(*trb);
|
|---|
| 536 |
|
|---|
| 537 | switch (completion_code) {
|
|---|
| 538 | case XHCI_TRBC_RING_OVERRUN:
|
|---|
| 539 | case XHCI_TRBC_RING_UNDERRUN:
|
|---|
| 540 | /* For OUT, there was nothing to process */
|
|---|
| 541 | /* For IN, the buffer has overfilled, we empty the buffers and readd TRBs */
|
|---|
| 542 | usb_log_warning("Ring over/underrun.");
|
|---|
| 543 | isoch_reset(ep);
|
|---|
| 544 | fibril_condvar_broadcast(&ep->isoch->avail);
|
|---|
| 545 | fibril_mutex_unlock(&ep->isoch->guard);
|
|---|
| 546 | return EOK;
|
|---|
| 547 | case XHCI_TRBC_SHORT_PACKET:
|
|---|
| 548 | case XHCI_TRBC_SUCCESS:
|
|---|
| 549 | err = EOK;
|
|---|
| 550 | break;
|
|---|
| 551 | default:
|
|---|
| 552 | usb_log_warning("Transfer not successfull: %u", completion_code);
|
|---|
| 553 | err = EIO;
|
|---|
| 554 | break;
|
|---|
| 555 | }
|
|---|
| 556 |
|
|---|
| 557 | bool found_mine = false;
|
|---|
| 558 | bool found_incomplete = false;
|
|---|
| 559 |
|
|---|
| 560 | /*
|
|---|
| 561 | * The order of delivering events is not necessarily the one we would
|
|---|
| 562 | * expect. It is safer to walk the list of our 4 transfers and check
|
|---|
| 563 | * which one it is.
|
|---|
| 564 | */
|
|---|
| 565 | for (size_t i = 0; i < isoch->buffer_count; ++i) {
|
|---|
| 566 | xhci_isoch_transfer_t * const it = &isoch->transfers[i];
|
|---|
| 567 |
|
|---|
| 568 | switch (it->state) {
|
|---|
| 569 | case ISOCH_FILLED:
|
|---|
| 570 | found_incomplete = true;
|
|---|
| 571 | break;
|
|---|
| 572 |
|
|---|
| 573 | case ISOCH_FED:
|
|---|
| 574 | if (it->interrupt_trb_phys != trb->parameter) {
|
|---|
| 575 | found_incomplete = true;
|
|---|
| 576 | break;
|
|---|
| 577 | }
|
|---|
| 578 |
|
|---|
| 579 | usb_log_debug2("[isoch] buffer %zu completed", it - isoch->transfers);
|
|---|
| 580 | it->state = ISOCH_COMPLETE;
|
|---|
| 581 | it->size -= TRB_TRANSFER_LENGTH(*trb);
|
|---|
| 582 | it->error = err;
|
|---|
| 583 | found_mine = true;
|
|---|
| 584 | break;
|
|---|
| 585 | default:
|
|---|
| 586 | break;
|
|---|
| 587 | }
|
|---|
| 588 | }
|
|---|
| 589 |
|
|---|
| 590 | if (!found_mine) {
|
|---|
| 591 | usb_log_warning("[isoch] A transfer event occured for unknown transfer.");
|
|---|
| 592 | }
|
|---|
| 593 |
|
|---|
| 594 | /*
|
|---|
| 595 | * It may happen that the driver already stopped reading (writing),
|
|---|
| 596 | * and our buffers are filled (empty). As QEMU (and possibly others)
|
|---|
| 597 | * does not send RING_UNDERRUN (OVERRUN) event, detect it here.
|
|---|
| 598 | */
|
|---|
| 599 | if (!found_incomplete) {
|
|---|
| 600 | usb_log_warning("[isoch] Endpoint" XHCI_EP_FMT ": Detected "
|
|---|
| 601 | "isochronous ring %s.", XHCI_EP_ARGS(*ep),
|
|---|
| 602 | (ep->base.direction == USB_DIRECTION_IN) ? "underrun" : "overrun");
|
|---|
| 603 | isoch_reset(ep);
|
|---|
| 604 | }
|
|---|
| 605 |
|
|---|
| 606 | fibril_condvar_broadcast(&ep->isoch->avail);
|
|---|
| 607 | fibril_mutex_unlock(&ep->isoch->guard);
|
|---|
| 608 | return EOK;
|
|---|
| 609 | }
|
|---|
| 610 |
|
|---|
| 611 | /**
|
|---|
| 612 | * @}
|
|---|
| 613 | */
|
|---|