source:
mainline/uspace/drv/bus/usb/xhci/hw_struct@
a1732929
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| common.h | 3.5 KB | 0e7380f | 8 years | xhci: wait for conditions to hold in a systematic way | |
| context.h | 8.8 KB | 6b433a8 | 8 years | Isochronous transfers - endpoint initialization | |
| README | 193 bytes | f4eb6c93 | 8 years | xhci: hardware data structures and trb ring management | |
| regs.h | 19.1 KB | 9b56e528 | 8 years | xhci rh: better not disable port on any event The result of a long … | |
| trb.h | 8.2 KB | 4a00bc9 | 8 years | xhci: fix errors reported by clang Asserts were unnecessary, because … | |
|
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