source: mainline/uspace/drv/bus/usb/xhci/endpoint.h@ 61e27e80

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 61e27e80 was 47e9494, checked in by Salmelu <salmelu@…>, 8 years ago

xhci: stub for streams support

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File size: 4.9 KB
Line 
1/*
2 * Copyright (c) 2017 Petr Manek
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller endpoint management.
34 */
35
36#ifndef XHCI_ENDPOINT_H
37#define XHCI_ENDPOINT_H
38
39#include <assert.h>
40
41#include <usb/debug.h>
42#include <usb/host/dma_buffer.h>
43#include <usb/host/endpoint.h>
44#include <usb/host/hcd.h>
45#include <ddf/driver.h>
46
47#include "isoch.h"
48#include "transfers.h"
49#include "trb_ring.h"
50
51typedef struct xhci_device xhci_device_t;
52typedef struct xhci_endpoint xhci_endpoint_t;
53typedef struct xhci_stream_data xhci_stream_data_t;
54typedef struct xhci_bus xhci_bus_t;
55
56enum {
57 EP_TYPE_INVALID = 0,
58 EP_TYPE_ISOCH_OUT = 1,
59 EP_TYPE_BULK_OUT = 2,
60 EP_TYPE_INTERRUPT_OUT = 3,
61 EP_TYPE_CONTROL = 4,
62 EP_TYPE_ISOCH_IN = 5,
63 EP_TYPE_BULK_IN = 6,
64 EP_TYPE_INTERRUPT_IN = 7
65};
66
67/** Connector structure linking endpoint context to the endpoint. */
68typedef struct xhci_endpoint {
69 endpoint_t base; /**< Inheritance. Keep this first. */
70
71 /** Main transfer ring (unused if streams are enabled) */
72 xhci_trb_ring_t ring;
73
74 /** Primary stream context data array (or NULL if endpoint doesn't use streams). */
75 xhci_stream_data_t *primary_stream_data_array;
76
77 /** Primary stream context array - allocated for xHC hardware. */
78 xhci_stream_ctx_t *primary_stream_ctx_array;
79 dma_buffer_t primary_stream_ctx_dma;
80
81 /** Size of the allocated primary stream data array (and context array). */
82 uint16_t primary_stream_data_size;
83
84 /* Maximum number of primary streams (0 - 2^16). */
85 uint32_t max_streams;
86
87 /** Maximum number of consecutive USB transactions (0-15) that should be executed per scheduling opportunity */
88 uint8_t max_burst;
89
90 /** Maximum number of bursts within an interval that this endpoint supports */
91 uint8_t mult;
92
93 /** Scheduling interval for periodic endpoints, as a number of 125us units. (0 - 2^16) */
94 uint32_t interval;
95
96 /** This field is a valid pointer for (and only for) isochronous transfers. */
97 xhci_isoch_t isoch [0];
98} xhci_endpoint_t;
99
100#define XHCI_EP_FMT "(%d:%d %s)"
101/* FIXME: "Device -1" messes up log messages, figure out a better way. */
102#define XHCI_EP_ARGS(ep) \
103 ((ep).base.device ? (ep).base.device->address : -1), \
104 ((ep).base.endpoint), \
105 (usb_str_transfer_type((ep).base.transfer_type))
106
107typedef struct xhci_device {
108 device_t base; /**< Inheritance. Keep this first. */
109
110 /** Slot ID assigned to the device by xHC. */
111 uint32_t slot_id;
112
113 /** Corresponding port on RH */
114 uint8_t rh_port;
115
116 /** USB Tier of the device */
117 uint8_t tier;
118
119 /** Route string */
120 uint32_t route_str;
121
122 /** Place to store the allocated context */
123 dma_buffer_t dev_ctx;
124
125 /** Flag indicating whether the device is USB3 (it's USB2 otherwise). */
126 bool usb3;
127} xhci_device_t;
128
129#define XHCI_DEV_FMT "(%s, slot %d)"
130#define XHCI_DEV_ARGS(dev) ddf_fun_get_name((dev).base.fun), (dev).slot_id
131
132int xhci_endpoint_type(xhci_endpoint_t *ep);
133
134int xhci_endpoint_init(xhci_endpoint_t *, device_t *, const usb_endpoint_descriptors_t *);
135void xhci_endpoint_fini(xhci_endpoint_t *);
136
137uint8_t xhci_endpoint_dci(xhci_endpoint_t *);
138uint8_t xhci_endpoint_index(xhci_endpoint_t *);
139
140void xhci_setup_endpoint_context(xhci_endpoint_t *, xhci_ep_ctx_t *);
141
142static inline xhci_device_t * xhci_device_get(device_t *dev)
143{
144 assert(dev);
145 return (xhci_device_t *) dev;
146}
147
148static inline xhci_endpoint_t * xhci_endpoint_get(endpoint_t *ep)
149{
150 assert(ep);
151 return (xhci_endpoint_t *) ep;
152}
153
154static inline xhci_device_t * xhci_ep_to_dev(xhci_endpoint_t *ep)
155{
156 assert(ep);
157 return xhci_device_get(ep->base.device);
158}
159
160#endif
161
162/**
163 * @}
164 */
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