1 | /*
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2 | * Copyright (c) 2017 Petr Manek
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup drvusbxhci
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30 | * @{
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31 | */
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32 | /** @file
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33 | * @brief The host controller endpoint management.
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34 | */
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35 |
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36 | #ifndef XHCI_ENDPOINT_H
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37 | #define XHCI_ENDPOINT_H
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38 |
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39 | #include <assert.h>
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40 |
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41 | #include <usb/debug.h>
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42 | #include <usb/host/dma_buffer.h>
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43 | #include <usb/host/endpoint.h>
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44 | #include <usb/host/hcd.h>
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45 | #include <ddf/driver.h>
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46 |
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47 | #include "isoch.h"
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48 | #include "transfers.h"
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49 | #include "trb_ring.h"
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50 |
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51 | typedef struct xhci_device xhci_device_t;
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52 | typedef struct xhci_endpoint xhci_endpoint_t;
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53 | typedef struct xhci_stream_data xhci_stream_data_t;
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54 | typedef struct xhci_bus xhci_bus_t;
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55 |
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56 | enum {
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57 | EP_TYPE_INVALID = 0,
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58 | EP_TYPE_ISOCH_OUT = 1,
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59 | EP_TYPE_BULK_OUT = 2,
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60 | EP_TYPE_INTERRUPT_OUT = 3,
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61 | EP_TYPE_CONTROL = 4,
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62 | EP_TYPE_ISOCH_IN = 5,
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63 | EP_TYPE_BULK_IN = 6,
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64 | EP_TYPE_INTERRUPT_IN = 7
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65 | };
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66 |
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67 | /** Connector structure linking endpoint context to the endpoint. */
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68 | typedef struct xhci_endpoint {
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69 | endpoint_t base; /**< Inheritance. Keep this first. */
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70 |
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71 | /** Main transfer ring (unused if streams are enabled) */
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72 | xhci_trb_ring_t ring;
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73 |
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74 | /** Primary stream context data array (or NULL if endpoint doesn't use streams). */
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75 | xhci_stream_data_t *primary_stream_data_array;
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76 |
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77 | /** Primary stream context array - allocated for xHC hardware. */
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78 | xhci_stream_ctx_t *primary_stream_ctx_array;
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79 | dma_buffer_t primary_stream_ctx_dma;
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80 |
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81 | /** Size of the allocated primary stream data array (and context array). */
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82 | uint16_t primary_stream_data_size;
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83 |
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84 | /* Maximum number of primary streams (0 - 2^16). */
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85 | uint32_t max_streams;
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86 |
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87 | /** Maximum number of consecutive USB transactions (0-15) that should be executed per scheduling opportunity */
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88 | uint8_t max_burst;
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89 |
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90 | /** Maximum number of bursts within an interval that this endpoint supports */
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91 | uint8_t mult;
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92 |
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93 | /** Scheduling interval for periodic endpoints, as a number of 125us units. (0 - 2^16) */
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94 | uint32_t interval;
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95 |
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96 | /** This field is a valid pointer for (and only for) isochronous transfers. */
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97 | xhci_isoch_t isoch [0];
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98 | } xhci_endpoint_t;
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99 |
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100 | #define XHCI_EP_FMT "(%d:%d %s)"
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101 | /* FIXME: "Device -1" messes up log messages, figure out a better way. */
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102 | #define XHCI_EP_ARGS(ep) \
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103 | ((ep).base.device ? (ep).base.device->address : -1), \
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104 | ((ep).base.endpoint), \
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105 | (usb_str_transfer_type((ep).base.transfer_type))
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106 |
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107 | typedef struct xhci_device {
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108 | device_t base; /**< Inheritance. Keep this first. */
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109 |
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110 | /** Slot ID assigned to the device by xHC. */
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111 | uint32_t slot_id;
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112 |
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113 | /** Corresponding port on RH */
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114 | uint8_t rh_port;
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115 |
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116 | /** USB Tier of the device */
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117 | uint8_t tier;
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118 |
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119 | /** Route string */
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120 | uint32_t route_str;
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121 |
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122 | /** Place to store the allocated context */
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123 | dma_buffer_t dev_ctx;
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124 |
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125 | /** Flag indicating whether the device is USB3 (it's USB2 otherwise). */
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126 | bool usb3;
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127 | } xhci_device_t;
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128 |
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129 | #define XHCI_DEV_FMT "(%s, slot %d)"
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130 | #define XHCI_DEV_ARGS(dev) ddf_fun_get_name((dev).base.fun), (dev).slot_id
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131 |
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132 | int xhci_endpoint_type(xhci_endpoint_t *ep);
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133 |
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134 | int xhci_endpoint_init(xhci_endpoint_t *, device_t *, const usb_endpoint_descriptors_t *);
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135 | void xhci_endpoint_fini(xhci_endpoint_t *);
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136 |
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137 | uint8_t xhci_endpoint_dci(xhci_endpoint_t *);
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138 | uint8_t xhci_endpoint_index(xhci_endpoint_t *);
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139 |
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140 | void xhci_setup_endpoint_context(xhci_endpoint_t *, xhci_ep_ctx_t *);
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141 |
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142 | static inline xhci_device_t * xhci_device_get(device_t *dev)
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143 | {
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144 | assert(dev);
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145 | return (xhci_device_t *) dev;
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146 | }
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147 |
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148 | static inline xhci_endpoint_t * xhci_endpoint_get(endpoint_t *ep)
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149 | {
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150 | assert(ep);
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151 | return (xhci_endpoint_t *) ep;
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152 | }
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153 |
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154 | static inline xhci_device_t * xhci_ep_to_dev(xhci_endpoint_t *ep)
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155 | {
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156 | assert(ep);
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157 | return xhci_device_get(ep->base.device);
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158 | }
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159 |
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160 | #endif
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161 |
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162 | /**
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163 | * @}
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164 | */
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