source: mainline/uspace/drv/bus/usb/xhci/endpoint.h@ 56db65d

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 56db65d was b724494, checked in by Petr Manek <petr.manek@…>, 8 years ago

Moved some code from RH to HC. Simplified device address process. Issuing deconfigure device command.

  • Property mode set to 100644
File size: 4.5 KB
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1/*
2 * Copyright (c) 2017 Petr Manek
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller endpoint management.
34 */
35
36#ifndef XHCI_ENDPOINT_H
37#define XHCI_ENDPOINT_H
38
39#include <assert.h>
40
41#include <usb/debug.h>
42#include <usb/host/endpoint.h>
43#include <usb/host/hcd.h>
44
45#include "hc.h"
46#include "transfers.h"
47
48typedef struct xhci_device xhci_device_t;
49typedef struct xhci_endpoint xhci_endpoint_t;
50typedef struct xhci_bus xhci_bus_t;
51
52enum {
53 EP_TYPE_INVALID = 0,
54 EP_TYPE_ISOCH_OUT = 1,
55 EP_TYPE_BULK_OUT = 2,
56 EP_TYPE_INTERRUPT_OUT = 3,
57 EP_TYPE_CONTROL = 4,
58 EP_TYPE_ISOCH_IN = 5,
59 EP_TYPE_BULK_IN = 6,
60 EP_TYPE_INTERRUPT_IN = 7
61};
62
63/** Connector structure linking endpoint context to the endpoint. */
64typedef struct xhci_endpoint {
65 endpoint_t base; /**< Inheritance. Keep this first. */
66
67 /** Main transfer ring (unused if streams are enabled) */
68 xhci_trb_ring_t ring;
69
70 /** There shall be only one transfer active on an endpoint. The
71 * synchronization is performed using the active flag in base
72 * endpoint_t */
73 xhci_transfer_t active_transfer;
74
75 /** Primary stream context array (or NULL if endpoint doesn't use streams) */
76 xhci_stream_ctx_t *primary_stream_ctx_array;
77
78 /** 2-log of maximum number of primary streams (0-16). Not to be used directly. */
79 uint8_t max_streams;
80
81 /** Maximum number of consecutive USB transactions (0-15) that should be executed per scheduling opportunity */
82 uint8_t max_burst;
83
84 /** Maximum number of bursts within an interval that this endpoint supports */
85 uint8_t mult;
86} xhci_endpoint_t;
87
88typedef struct xhci_device {
89 device_t base; /**< Inheritance. Keep this first. */
90
91 /** Slot ID assigned to the device by xHC. */
92 uint32_t slot_id;
93
94 /** Place to store virtual address for allocated context */
95 xhci_device_ctx_t *dev_ctx;
96
97 /** All endpoints of the device. Inactive ones are NULL */
98 xhci_endpoint_t *endpoints[XHCI_EP_COUNT];
99
100 /** Number of non-NULL endpoints. Reference count of sorts. */
101 uint8_t active_endpoint_count;
102
103 /** Need HC to schedule commands from bus callbacks. TODO: Move this elsewhere. */
104 xhci_hc_t *hc;
105
106 /** Flag indicating whether the device is USB3 (it's USB2 otherwise). */
107 bool usb3;
108
109 /** True if the device can add new endpoints and schedule transfers. */
110 volatile bool online;
111} xhci_device_t;
112
113int xhci_endpoint_init(xhci_endpoint_t *, xhci_bus_t *);
114void xhci_endpoint_fini(xhci_endpoint_t *);
115int xhci_endpoint_alloc_transfer_ds(xhci_endpoint_t *);
116int xhci_endpoint_free_transfer_ds(xhci_endpoint_t *);
117
118uint8_t xhci_endpoint_dci(xhci_endpoint_t *);
119uint8_t xhci_endpoint_index(xhci_endpoint_t *);
120
121int xhci_device_add_endpoint(xhci_device_t *, xhci_endpoint_t *);
122int xhci_device_remove_endpoint(xhci_device_t *, xhci_endpoint_t *);
123xhci_endpoint_t * xhci_device_get_endpoint(xhci_device_t *, usb_endpoint_t);
124
125static inline xhci_device_t * xhci_device_get(device_t *dev)
126{
127 assert(dev);
128 return (xhci_device_t *) dev;
129}
130
131static inline xhci_endpoint_t * xhci_endpoint_get(endpoint_t *ep)
132{
133 assert(ep);
134 return (xhci_endpoint_t *) ep;
135}
136
137static inline xhci_device_t * xhci_ep_to_dev(xhci_endpoint_t *ep)
138{
139 assert(ep);
140 return xhci_device_get(ep->base.device);
141}
142
143#endif
144
145/**
146 * @}
147 */
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