source: mainline/uspace/drv/bus/usb/xhci/endpoint.h@ 25251bb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 25251bb was 25251bb, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: move pointer to hc from device to bus

Also, fixes the bug of hc ptr not set on tier 2+ device.

  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*
2 * Copyright (c) 2017 Petr Manek
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller endpoint management.
34 */
35
36#ifndef XHCI_ENDPOINT_H
37#define XHCI_ENDPOINT_H
38
39#include <assert.h>
40
41#include <usb/debug.h>
42#include <usb/host/endpoint.h>
43#include <usb/host/hcd.h>
44
45#include "trb_ring.h"
46
47#include "transfers.h"
48
49typedef struct xhci_device xhci_device_t;
50typedef struct xhci_endpoint xhci_endpoint_t;
51typedef struct xhci_bus xhci_bus_t;
52
53enum {
54 EP_TYPE_INVALID = 0,
55 EP_TYPE_ISOCH_OUT = 1,
56 EP_TYPE_BULK_OUT = 2,
57 EP_TYPE_INTERRUPT_OUT = 3,
58 EP_TYPE_CONTROL = 4,
59 EP_TYPE_ISOCH_IN = 5,
60 EP_TYPE_BULK_IN = 6,
61 EP_TYPE_INTERRUPT_IN = 7
62};
63
64/** Connector structure linking endpoint context to the endpoint. */
65typedef struct xhci_endpoint {
66 endpoint_t base; /**< Inheritance. Keep this first. */
67
68 /** Main transfer ring (unused if streams are enabled) */
69 xhci_trb_ring_t ring;
70
71 /** There shall be only one transfer active on an endpoint. The
72 * synchronization is performed using the active flag in base
73 * endpoint_t */
74 xhci_transfer_t active_transfer;
75
76 /** Primary stream context array (or NULL if endpoint doesn't use streams) */
77 xhci_stream_ctx_t *primary_stream_ctx_array;
78
79 /** 2-log of maximum number of primary streams (0-16). Not to be used directly. */
80 uint8_t max_streams;
81
82 /** Maximum number of consecutive USB transactions (0-15) that should be executed per scheduling opportunity */
83 uint8_t max_burst;
84
85 /** Maximum number of bursts within an interval that this endpoint supports */
86 uint8_t mult;
87} xhci_endpoint_t;
88
89#define XHCI_EP_FMT "(%d:%d %s)"
90#define XHCI_EP_ARGS(ep) \
91 ((ep).base.device->address), \
92 ((ep).base.endpoint), \
93 (usb_str_transfer_type((ep).base.transfer_type))
94
95typedef struct xhci_device {
96 device_t base; /**< Inheritance. Keep this first. */
97
98 /** Slot ID assigned to the device by xHC. */
99 uint32_t slot_id;
100
101 /** Corresponding port on RH */
102 uint8_t rh_port;
103
104 /** USB Tier of the device */
105 uint8_t tier;
106
107 /** Route string */
108 uint32_t route_str;
109
110 /** Place to store virtual address for allocated context */
111 xhci_device_ctx_t *dev_ctx;
112
113 /** All endpoints of the device. Inactive ones are NULL */
114 xhci_endpoint_t *endpoints[XHCI_EP_COUNT];
115
116 /** Number of non-NULL endpoints. Reference count of sorts. */
117 uint8_t active_endpoint_count;
118
119 /** Flag indicating whether the device is USB3 (it's USB2 otherwise). */
120 bool usb3;
121
122 /** True if the device can add new endpoints and schedule transfers. */
123 volatile bool online;
124} xhci_device_t;
125
126int xhci_endpoint_init(xhci_endpoint_t *, xhci_bus_t *);
127void xhci_endpoint_fini(xhci_endpoint_t *);
128int xhci_endpoint_alloc_transfer_ds(xhci_endpoint_t *);
129int xhci_endpoint_free_transfer_ds(xhci_endpoint_t *);
130
131uint8_t xhci_endpoint_dci(xhci_endpoint_t *);
132uint8_t xhci_endpoint_index(xhci_endpoint_t *);
133
134void xhci_setup_endpoint_context(xhci_endpoint_t *, xhci_ep_ctx_t *);
135
136int xhci_device_add_endpoint(xhci_hc_t *, xhci_device_t *, xhci_endpoint_t *);
137int xhci_device_remove_endpoint(xhci_hc_t *, xhci_device_t *, xhci_endpoint_t *);
138xhci_endpoint_t * xhci_device_get_endpoint(xhci_device_t *, usb_endpoint_t);
139
140static inline xhci_device_t * xhci_device_get(device_t *dev)
141{
142 assert(dev);
143 return (xhci_device_t *) dev;
144}
145
146static inline xhci_endpoint_t * xhci_endpoint_get(endpoint_t *ep)
147{
148 assert(ep);
149 return (xhci_endpoint_t *) ep;
150}
151
152static inline xhci_device_t * xhci_ep_to_dev(xhci_endpoint_t *ep)
153{
154 assert(ep);
155 return xhci_device_get(ep->base.device);
156}
157
158#endif
159
160/**
161 * @}
162 */
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