| 1 | /*
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| 2 | * Copyright (c) 2017 Ondrej Hlavaty
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * Various functions to examine current state of the xHC.
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| 34 | */
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| 35 |
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| 36 | #include <inttypes.h>
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| 37 | #include <byteorder.h>
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| 38 | #include <usb/debug.h>
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| 39 |
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| 40 | #include "hw_struct/trb.h"
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| 41 | #include "debug.h"
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| 42 | #include "hc.h"
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| 43 |
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| 44 | #define PX "\t%-21s = "
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| 45 |
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| 46 | #define DUMP_REG_FIELD(ptr, title, size, ...) \
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| 47 | usb_log_debug2(PX "%" PRIu##size, title, XHCI_REG_RD_FIELD(ptr, size, ##__VA_ARGS__))
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| 48 |
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| 49 | #define DUMP_REG_RANGE(ptr, title, size, ...) \
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| 50 | usb_log_debug2(PX "%" PRIu##size, title, XHCI_REG_RD_RANGE(ptr, size, ##__VA_ARGS__))
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| 51 |
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| 52 | #define DUMP_REG_FLAG(ptr, title, size, ...) \
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| 53 | usb_log_debug2(PX "%s", title, XHCI_REG_RD_FLAG(ptr, size, ##__VA_ARGS__) ? "true" : "false")
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| 54 |
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| 55 | #define DUMP_REG_INNER(set, title, field, size, type, ...) \
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| 56 | DUMP_REG_##type(&(set)->field, title, size, ##__VA_ARGS__)
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| 57 |
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| 58 | #define DUMP_REG(set, c) DUMP_REG_INNER(set, #c, c)
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| 59 |
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| 60 | /**
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| 61 | * Dumps all capability registers.
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| 62 | */
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| 63 | void xhci_dump_cap_regs(const xhci_cap_regs_t *cap)
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| 64 | {
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| 65 | usb_log_debug2("Capabilities:");
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| 66 |
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| 67 | DUMP_REG(cap, XHCI_CAP_LENGTH);
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| 68 | DUMP_REG(cap, XHCI_CAP_VERSION);
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| 69 | DUMP_REG(cap, XHCI_CAP_MAX_SLOTS);
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| 70 | DUMP_REG(cap, XHCI_CAP_MAX_INTRS);
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| 71 | DUMP_REG(cap, XHCI_CAP_MAX_PORTS);
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| 72 | DUMP_REG(cap, XHCI_CAP_IST);
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| 73 | DUMP_REG(cap, XHCI_CAP_ERST_MAX);
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| 74 | usb_log_debug2(PX "%u", "Max Scratchpad bufs", xhci_get_max_spbuf(cap));
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| 75 | DUMP_REG(cap, XHCI_CAP_SPR);
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| 76 | DUMP_REG(cap, XHCI_CAP_U1EL);
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| 77 | DUMP_REG(cap, XHCI_CAP_U2EL);
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| 78 | DUMP_REG(cap, XHCI_CAP_AC64);
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| 79 | DUMP_REG(cap, XHCI_CAP_BNC);
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| 80 | DUMP_REG(cap, XHCI_CAP_CSZ);
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| 81 | DUMP_REG(cap, XHCI_CAP_PPC);
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| 82 | DUMP_REG(cap, XHCI_CAP_PIND);
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| 83 | DUMP_REG(cap, XHCI_CAP_C);
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| 84 | DUMP_REG(cap, XHCI_CAP_LTC);
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| 85 | DUMP_REG(cap, XHCI_CAP_NSS);
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| 86 | DUMP_REG(cap, XHCI_CAP_PAE);
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| 87 | DUMP_REG(cap, XHCI_CAP_SPC);
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| 88 | DUMP_REG(cap, XHCI_CAP_SEC);
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| 89 | DUMP_REG(cap, XHCI_CAP_CFC);
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| 90 | DUMP_REG(cap, XHCI_CAP_MAX_PSA_SIZE);
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| 91 | DUMP_REG(cap, XHCI_CAP_XECP);
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| 92 | DUMP_REG(cap, XHCI_CAP_DBOFF);
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| 93 | DUMP_REG(cap, XHCI_CAP_RTSOFF);
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| 94 | DUMP_REG(cap, XHCI_CAP_U3C);
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| 95 | DUMP_REG(cap, XHCI_CAP_CMC);
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| 96 | DUMP_REG(cap, XHCI_CAP_FSC);
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| 97 | DUMP_REG(cap, XHCI_CAP_CTC);
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| 98 | DUMP_REG(cap, XHCI_CAP_LEC);
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| 99 | DUMP_REG(cap, XHCI_CAP_CIC);
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| 100 | }
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| 101 |
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| 102 | /**
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| 103 | * Dumps registers of one port.
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| 104 | */
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| 105 | void xhci_dump_port(const xhci_port_regs_t *port)
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| 106 | {
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| 107 | DUMP_REG(port, XHCI_PORT_CCS);
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| 108 | DUMP_REG(port, XHCI_PORT_PED);
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| 109 | DUMP_REG(port, XHCI_PORT_OCA);
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| 110 | DUMP_REG(port, XHCI_PORT_PR);
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| 111 | DUMP_REG(port, XHCI_PORT_PLS);
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| 112 | DUMP_REG(port, XHCI_PORT_PP);
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| 113 | DUMP_REG(port, XHCI_PORT_PS);
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| 114 | DUMP_REG(port, XHCI_PORT_PIC);
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| 115 | DUMP_REG(port, XHCI_PORT_LWS);
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| 116 | DUMP_REG(port, XHCI_PORT_CSC);
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| 117 | DUMP_REG(port, XHCI_PORT_PEC);
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| 118 | DUMP_REG(port, XHCI_PORT_WRC);
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| 119 | DUMP_REG(port, XHCI_PORT_OCC);
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| 120 | DUMP_REG(port, XHCI_PORT_PRC);
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| 121 | DUMP_REG(port, XHCI_PORT_PLC);
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| 122 | DUMP_REG(port, XHCI_PORT_CEC);
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| 123 | DUMP_REG(port, XHCI_PORT_CAS);
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| 124 | DUMP_REG(port, XHCI_PORT_WCE);
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| 125 | DUMP_REG(port, XHCI_PORT_WDE);
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| 126 | DUMP_REG(port, XHCI_PORT_WOE);
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| 127 | DUMP_REG(port, XHCI_PORT_DR);
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| 128 | DUMP_REG(port, XHCI_PORT_WPR);
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| 129 | DUMP_REG(port, XHCI_PORT_USB3_U1TO);
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| 130 | DUMP_REG(port, XHCI_PORT_USB3_U2TO);
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| 131 | DUMP_REG(port, XHCI_PORT_USB3_FLPMA);
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| 132 | DUMP_REG(port, XHCI_PORT_USB3_LEC);
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| 133 | DUMP_REG(port, XHCI_PORT_USB3_RLC);
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| 134 | DUMP_REG(port, XHCI_PORT_USB3_TLC);
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| 135 | DUMP_REG(port, XHCI_PORT_USB2_L1S);
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| 136 | DUMP_REG(port, XHCI_PORT_USB2_RWE);
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| 137 | DUMP_REG(port, XHCI_PORT_USB2_BESL);
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| 138 | DUMP_REG(port, XHCI_PORT_USB2_L1DS);
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| 139 | DUMP_REG(port, XHCI_PORT_USB2_HLE);
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| 140 | DUMP_REG(port, XHCI_PORT_USB2_TM);
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| 141 | DUMP_REG(port, XHCI_PORT_USB2_HIRDM);
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| 142 | DUMP_REG(port, XHCI_PORT_USB2_L1TO);
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| 143 | DUMP_REG(port, XHCI_PORT_USB2_BESLD);
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| 144 | }
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| 145 |
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| 146 | /**
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| 147 | * Dumps all registers that define state of the HC.
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| 148 | */
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| 149 | void xhci_dump_state(const xhci_hc_t *hc)
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| 150 | {
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| 151 | usb_log_debug2("Operational registers:");
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| 152 |
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| 153 | DUMP_REG(hc->op_regs, XHCI_OP_RS);
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| 154 | DUMP_REG(hc->op_regs, XHCI_OP_HCRST);
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| 155 | DUMP_REG(hc->op_regs, XHCI_OP_INTE);
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| 156 | DUMP_REG(hc->op_regs, XHCI_OP_HSEE);
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| 157 | DUMP_REG(hc->op_regs, XHCI_OP_LHCRST);
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| 158 | DUMP_REG(hc->op_regs, XHCI_OP_CSS);
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| 159 | DUMP_REG(hc->op_regs, XHCI_OP_CRS);
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| 160 | DUMP_REG(hc->op_regs, XHCI_OP_EWE);
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| 161 | DUMP_REG(hc->op_regs, XHCI_OP_EU3S);
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| 162 | DUMP_REG(hc->op_regs, XHCI_OP_CME);
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| 163 | DUMP_REG(hc->op_regs, XHCI_OP_HCH);
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| 164 | DUMP_REG(hc->op_regs, XHCI_OP_HSE);
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| 165 | DUMP_REG(hc->op_regs, XHCI_OP_EINT);
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| 166 | DUMP_REG(hc->op_regs, XHCI_OP_PCD);
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| 167 | DUMP_REG(hc->op_regs, XHCI_OP_SSS);
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| 168 | DUMP_REG(hc->op_regs, XHCI_OP_RSS);
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| 169 | DUMP_REG(hc->op_regs, XHCI_OP_SRE);
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| 170 | DUMP_REG(hc->op_regs, XHCI_OP_CNR);
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| 171 | DUMP_REG(hc->op_regs, XHCI_OP_HCE);
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| 172 | DUMP_REG(hc->op_regs, XHCI_OP_PAGESIZE);
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| 173 | DUMP_REG(hc->op_regs, XHCI_OP_NOTIFICATION);
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| 174 | DUMP_REG(hc->op_regs, XHCI_OP_RCS);
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| 175 | DUMP_REG(hc->op_regs, XHCI_OP_CS);
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| 176 | DUMP_REG(hc->op_regs, XHCI_OP_CA);
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| 177 | DUMP_REG(hc->op_regs, XHCI_OP_CRR);
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| 178 | DUMP_REG(hc->op_regs, XHCI_OP_CRCR_LO);
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| 179 | DUMP_REG(hc->op_regs, XHCI_OP_CRCR_HI);
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| 180 | DUMP_REG(hc->op_regs, XHCI_OP_DCBAAP_LO);
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| 181 | DUMP_REG(hc->op_regs, XHCI_OP_DCBAAP_HI);
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| 182 | DUMP_REG(hc->rt_regs, XHCI_RT_MFINDEX);
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| 183 |
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| 184 | usb_log_debug2("Interrupter 0 state:");
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| 185 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IP);
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| 186 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IE);
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| 187 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IMI);
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| 188 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IMC);
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| 189 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTSZ);
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| 190 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTBA_LO);
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| 191 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTBA_HI);
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| 192 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERDP_LO);
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| 193 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERDP_HI);
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| 194 | }
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| 195 |
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| 196 | /**
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| 197 | * Dump registers of all ports.
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| 198 | */
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| 199 | void xhci_dump_ports(const xhci_hc_t *hc)
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| 200 | {
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| 201 | const size_t num_ports = XHCI_REG_RD(hc->cap_regs, XHCI_CAP_MAX_PORTS);
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| 202 | for (size_t i = 0; i < num_ports; i++) {
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| 203 | usb_log_debug2("Port %zu state:", i);
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| 204 |
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| 205 | xhci_dump_port(&hc->op_regs->portrs[i]);
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| 206 | }
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| 207 | }
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| 208 |
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| 209 | static const char *trb_types [] = {
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| 210 | [0] = "<empty>",
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| 211 | #define TRB(t) [XHCI_TRB_TYPE_##t] = #t
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| 212 | TRB(NORMAL),
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| 213 | TRB(SETUP_STAGE),
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| 214 | TRB(DATA_STAGE),
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| 215 | TRB(STATUS_STAGE),
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| 216 | TRB(ISOCH),
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| 217 | TRB(LINK),
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| 218 | TRB(EVENT_DATA),
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| 219 | TRB(NO_OP),
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| 220 | TRB(ENABLE_SLOT_CMD),
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| 221 | TRB(DISABLE_SLOT_CMD),
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| 222 | TRB(ADDRESS_DEVICE_CMD),
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| 223 | TRB(CONFIGURE_ENDPOINT_CMD),
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| 224 | TRB(EVALUATE_CONTEXT_CMD),
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| 225 | TRB(RESET_ENDPOINT_CMD),
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| 226 | TRB(STOP_ENDPOINT_CMD),
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| 227 | TRB(SET_TR_DEQUEUE_POINTER_CMD),
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| 228 | TRB(RESET_DEVICE_CMD),
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| 229 | TRB(FORCE_EVENT_CMD),
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| 230 | TRB(NEGOTIATE_BANDWIDTH_CMD),
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| 231 | TRB(SET_LATENCY_TOLERANCE_VALUE_CMD),
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| 232 | TRB(GET_PORT_BANDWIDTH_CMD),
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| 233 | TRB(FORCE_HEADER_CMD),
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| 234 | TRB(NO_OP_CMD),
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| 235 | TRB(TRANSFER_EVENT),
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| 236 | TRB(COMMAND_COMPLETION_EVENT),
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| 237 | TRB(PORT_STATUS_CHANGE_EVENT),
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| 238 | TRB(BANDWIDTH_REQUEST_EVENT),
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| 239 | TRB(DOORBELL_EVENT),
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| 240 | TRB(HOST_CONTROLLER_EVENT),
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| 241 | TRB(DEVICE_NOTIFICATION_EVENT),
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| 242 | TRB(MFINDEX_WRAP_EVENT),
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| 243 | #undef TRB
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| 244 | [XHCI_TRB_TYPE_MAX] = NULL,
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| 245 | };
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| 246 |
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| 247 | /**
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| 248 | * Stringify XHCI_TRB_TYPE_*.
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| 249 | */
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| 250 | const char *xhci_trb_str_type(unsigned type)
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| 251 | {
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| 252 | static char type_buf [20];
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| 253 |
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| 254 | if (type < XHCI_TRB_TYPE_MAX && trb_types[type] != NULL)
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| 255 | return trb_types[type];
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| 256 |
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| 257 | snprintf(type_buf, sizeof(type_buf), "<unknown (%u)>", type);
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| 258 | return type_buf;
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| 259 | }
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| 260 |
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| 261 | /**
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| 262 | * Dump a TRB.
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| 263 | */
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| 264 | void xhci_dump_trb(const xhci_trb_t *trb)
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| 265 | {
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| 266 | usb_log_debug2("TRB(%p): type %s, cycle %u", trb, xhci_trb_str_type(TRB_TYPE(*trb)), TRB_CYCLE(*trb));
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| 267 | }
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| 268 |
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| 269 | static const char *ec_ids [] = {
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| 270 | [0] = "<empty>",
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| 271 | #define EC(t) [XHCI_EC_##t] = #t
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| 272 | EC(USB_LEGACY),
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| 273 | EC(SUPPORTED_PROTOCOL),
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| 274 | EC(EXTENDED_POWER_MANAGEMENT),
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| 275 | EC(IOV),
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| 276 | EC(MSI),
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| 277 | EC(LOCALMEM),
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| 278 | EC(DEBUG),
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| 279 | EC(MSIX),
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| 280 | #undef EC
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| 281 | [XHCI_EC_MAX] = NULL
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| 282 | };
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| 283 |
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| 284 | /**
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| 285 | * Dump Extended Capability ID.
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| 286 | */
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| 287 | const char *xhci_ec_str_id(unsigned id)
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| 288 | {
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| 289 | static char buf [20];
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| 290 |
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| 291 | if (id < XHCI_EC_MAX && ec_ids[id] != NULL)
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| 292 | return ec_ids[id];
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| 293 |
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| 294 | snprintf(buf, sizeof(buf), "<unknown (%u)>", id);
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| 295 | return buf;
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| 296 | }
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| 297 |
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| 298 | /**
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| 299 | * Dump Protocol Speed ID.
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| 300 | */
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| 301 | static void xhci_dump_psi(const xhci_psi_t *psi)
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| 302 | {
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| 303 | static const char speed_exp [] = " KMG";
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| 304 | static const char *psi_types [] = { "", " rsvd", " RX", " TX" };
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| 305 |
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| 306 | usb_log_debug("Speed %u%s: %5u %cb/s, %s",
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| 307 | XHCI_REG_RD(psi, XHCI_PSI_PSIV),
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| 308 | psi_types[XHCI_REG_RD(psi, XHCI_PSI_PLT)],
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| 309 | XHCI_REG_RD(psi, XHCI_PSI_PSIM),
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| 310 | speed_exp[XHCI_REG_RD(psi, XHCI_PSI_PSIE)],
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| 311 | XHCI_REG_RD(psi, XHCI_PSI_PFD) ? "full-duplex" : "");
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| 312 | }
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| 313 |
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| 314 | /**
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| 315 | * Dump given Extended Capability.
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| 316 | */
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| 317 | void xhci_dump_extcap(const xhci_extcap_t *ec)
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| 318 | {
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| 319 | xhci_sp_name_t name;
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| 320 | unsigned ports_from, ports_to;
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| 321 |
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| 322 | unsigned id = XHCI_REG_RD(ec, XHCI_EC_CAP_ID);
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| 323 | usb_log_debug("Extended capability %s", xhci_ec_str_id(id));
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| 324 |
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| 325 | switch (id) {
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| 326 | case XHCI_EC_SUPPORTED_PROTOCOL:
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| 327 | name.packed = host2uint32_t_le(XHCI_REG_RD(ec, XHCI_EC_SP_NAME));
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| 328 | ports_from = XHCI_REG_RD(ec, XHCI_EC_SP_CP_OFF);
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| 329 | ports_to = ports_from + XHCI_REG_RD(ec, XHCI_EC_SP_CP_COUNT) - 1;
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| 330 | unsigned psic = XHCI_REG_RD(ec, XHCI_EC_SP_PSIC);
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| 331 |
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| 332 | usb_log_debug("\tProtocol %.4s%u.%u, ports %u-%u, %u protocol speeds", name.str,
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| 333 | XHCI_REG_RD(ec, XHCI_EC_SP_MAJOR),
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| 334 | XHCI_REG_RD(ec, XHCI_EC_SP_MINOR),
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| 335 | ports_from, ports_to, psic);
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| 336 |
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| 337 | for (unsigned i = 0; i < psic; i++)
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| 338 | xhci_dump_psi(xhci_extcap_psi(ec, i));
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| 339 | break;
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| 340 | }
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| 341 | }
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| 342 |
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| 343 | static void xhci_dump_slot_ctx(const struct xhci_slot_ctx *ctx)
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| 344 | {
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| 345 | #define SLOT_DUMP(name) usb_log_debug("\t" #name ":\t0x%x", XHCI_SLOT_##name(*ctx))
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| 346 | SLOT_DUMP(ROUTE_STRING);
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| 347 | SLOT_DUMP(SPEED);
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| 348 | SLOT_DUMP(MTT);
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| 349 | SLOT_DUMP(CTX_ENTRIES);
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| 350 | SLOT_DUMP(MAX_EXIT_LATENCY);
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| 351 | SLOT_DUMP(ROOT_HUB_PORT);
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| 352 | SLOT_DUMP(NUM_OF_PORTS);
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| 353 | SLOT_DUMP(TT_HUB_SLOT_ID);
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| 354 | SLOT_DUMP(TT_PORT_NUM);
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| 355 | SLOT_DUMP(TT_THINK_TIME);
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| 356 | SLOT_DUMP(INTERRUPTER);
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| 357 | SLOT_DUMP(DEVICE_ADDRESS);
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| 358 | SLOT_DUMP(SLOT_STATE);
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| 359 | #undef SLOT_DUMP
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| 360 | }
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| 361 |
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| 362 | static void xhci_dump_endpoint_ctx(const struct xhci_endpoint_ctx *ctx)
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| 363 | {
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| 364 | #define EP_DUMP_DW(name) usb_log_debug("\t" #name ":\t0x%x", XHCI_EP_##name(*ctx))
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| 365 | #define EP_DUMP_QW(name) usb_log_debug("\t" #name ":\t0x%llx", XHCI_EP_##name(*ctx))
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| 366 | EP_DUMP_DW(STATE);
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| 367 | EP_DUMP_DW(MULT);
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| 368 | EP_DUMP_DW(MAX_P_STREAMS);
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| 369 | EP_DUMP_DW(LSA);
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| 370 | EP_DUMP_DW(INTERVAL);
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| 371 | EP_DUMP_DW(ERROR_COUNT);
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| 372 | EP_DUMP_DW(TYPE);
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|---|
| 373 | EP_DUMP_DW(HID);
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| 374 | EP_DUMP_DW(MAX_BURST_SIZE);
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| 375 | EP_DUMP_DW(MAX_PACKET_SIZE);
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|---|
| 376 | EP_DUMP_QW(DCS);
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|---|
| 377 | EP_DUMP_QW(TR_DPTR);
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|---|
| 378 | EP_DUMP_DW(MAX_ESIT_PAYLOAD_LO);
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| 379 | EP_DUMP_DW(MAX_ESIT_PAYLOAD_HI);
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|---|
| 380 | #undef EP_DUMP_DW
|
|---|
| 381 | #undef EP_DUMP_QW
|
|---|
| 382 | }
|
|---|
| 383 |
|
|---|
| 384 | void xhci_dump_input_ctx(const struct xhci_input_ctx *ctx)
|
|---|
| 385 | {
|
|---|
| 386 | usb_log_debug("Input control context:");
|
|---|
| 387 | usb_log_debug("\tDrop:\t0x%08x", xhci2host(32, ctx->ctrl_ctx.data[0]));
|
|---|
| 388 | usb_log_debug("\tAdd:\t0x%08x", xhci2host(32, ctx->ctrl_ctx.data[1]));
|
|---|
| 389 |
|
|---|
| 390 | usb_log_debug("\tConfig:\t0x%02x", XHCI_INPUT_CTRL_CTX_CONFIG_VALUE(ctx->ctrl_ctx));
|
|---|
| 391 | usb_log_debug("\tIface:\t0x%02x", XHCI_INPUT_CTRL_CTX_IFACE_NUMBER(ctx->ctrl_ctx));
|
|---|
| 392 | usb_log_debug("\tAlternate:\t0x%02x", XHCI_INPUT_CTRL_CTX_ALTER_SETTING(ctx->ctrl_ctx));
|
|---|
| 393 |
|
|---|
| 394 | usb_log_debug("Slot context:");
|
|---|
| 395 | xhci_dump_slot_ctx(&ctx->slot_ctx);
|
|---|
| 396 |
|
|---|
| 397 | for (uint8_t dci = 1; dci <= XHCI_EP_COUNT; dci++)
|
|---|
| 398 | if (XHCI_INPUT_CTRL_CTX_DROP(ctx->ctrl_ctx, dci)
|
|---|
| 399 | || XHCI_INPUT_CTRL_CTX_ADD(ctx->ctrl_ctx, dci)) {
|
|---|
| 400 | usb_log_debug("Endpoint context DCI %u:", dci);
|
|---|
| 401 | xhci_dump_endpoint_ctx(&ctx->endpoint_ctx[dci - 1]);
|
|---|
| 402 | }
|
|---|
| 403 | }
|
|---|
| 404 |
|
|---|
| 405 | /**
|
|---|
| 406 | * @}
|
|---|
| 407 | */
|
|---|
