| 1 | /*
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| 2 | * Copyright (c) 2017 Jaroslav Jindrak
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * Utility functions used to place TRBs onto the command ring.
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| 34 | */
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| 35 |
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| 36 | #ifndef XHCI_COMMANDS_H
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| 37 | #define XHCI_COMMANDS_H
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| 38 |
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| 39 | #include <adt/list.h>
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| 40 | #include <stdbool.h>
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| 41 | #include <fibril_synch.h>
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| 42 | #include <usb/host/dma_buffer.h>
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| 43 | #include "hw_struct/trb.h"
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| 44 | #include "trb_ring.h"
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| 45 |
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| 46 | #define XHCI_COMMAND_TIMEOUT 10000000
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| 47 | #define XHCI_CR_ABORT_TIMEOUT 5000000
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| 48 |
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| 49 | typedef struct xhci_hc xhci_hc_t;
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| 50 | typedef struct xhci_input_ctx xhci_input_ctx_t;
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| 51 | typedef struct xhci_port_bandwidth_ctx xhci_port_bandwidth_ctx_t;
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| 52 |
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| 53 | typedef enum xhci_cmd_type {
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| 54 | XHCI_CMD_ENABLE_SLOT,
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| 55 | XHCI_CMD_DISABLE_SLOT,
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| 56 | XHCI_CMD_ADDRESS_DEVICE,
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| 57 | XHCI_CMD_CONFIGURE_ENDPOINT,
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| 58 | XHCI_CMD_EVALUATE_CONTEXT,
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| 59 | XHCI_CMD_RESET_ENDPOINT,
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| 60 | XHCI_CMD_STOP_ENDPOINT,
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| 61 | XHCI_CMD_SET_TR_DEQUEUE_POINTER,
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| 62 | XHCI_CMD_RESET_DEVICE,
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| 63 | XHCI_CMD_FORCE_EVENT,
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| 64 | XHCI_CMD_NEGOTIATE_BANDWIDTH,
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| 65 | XHCI_CMD_SET_LATENCY_TOLERANCE_VALUE,
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| 66 | XHCI_CMD_GET_PORT_BANDWIDTH,
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| 67 | XHCI_CMD_FORCE_HEADER,
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| 68 | XHCI_CMD_NO_OP,
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| 69 | } xhci_cmd_type_t;
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| 70 |
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| 71 | typedef enum {
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| 72 | XHCI_CR_STATE_CLOSED, /**< Commands are rejected with ENAK. */
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| 73 | XHCI_CR_STATE_OPEN, /**< Commands are enqueued normally. */
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| 74 | XHCI_CR_STATE_CHANGING, /**< Commands wait until state changes. */
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| 75 | XHCI_CR_STATE_FULL, /**< Commands wait until something completes. */
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| 76 | } xhci_cr_state_t;
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| 77 |
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| 78 | typedef struct xhci_command_ring {
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| 79 | xhci_trb_ring_t trb_ring;
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| 80 |
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| 81 | fibril_mutex_t guard; /**< Guard access to this structure. */
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| 82 | list_t cmd_list;
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| 83 |
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| 84 | xhci_cr_state_t state; /**< Whether commands are allowed to be
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| 85 | added. */
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| 86 | fibril_condvar_t state_cv; /**< For waiting on CR state change. */
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| 87 |
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| 88 | fibril_condvar_t stopped_cv; /**< For waiting on CR stopped event. */
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| 89 | } xhci_cmd_ring_t;
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| 90 |
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| 91 | typedef struct xhci_command {
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| 92 | /** Internal fields used for bookkeeping. Need not worry about these. */
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| 93 | struct {
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| 94 | link_t link;
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| 95 |
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| 96 | xhci_cmd_type_t cmd;
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| 97 |
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| 98 | xhci_trb_t trb;
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| 99 | uintptr_t trb_phys;
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| 100 |
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| 101 | bool async;
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| 102 | bool completed;
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| 103 |
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| 104 | /* Will broadcast after command completes. */
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| 105 | fibril_mutex_t completed_mtx;
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| 106 | fibril_condvar_t completed_cv;
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| 107 | } _header;
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| 108 |
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| 109 | /** Below are arguments of all commands mixed together.
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| 110 | * Be sure to know which command accepts what arguments. */
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| 111 |
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| 112 | uint32_t slot_id;
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| 113 | uint32_t endpoint_id;
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| 114 | uint16_t stream_id;
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| 115 |
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| 116 | dma_buffer_t input_ctx, bandwidth_ctx;
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| 117 | uintptr_t dequeue_ptr;
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| 118 |
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| 119 | uint8_t tcs;
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| 120 | uint8_t susp;
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| 121 | uint8_t device_speed;
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| 122 | uint32_t status;
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| 123 | bool deconfigure;
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| 124 | } xhci_cmd_t;
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| 125 |
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| 126 | /* Command handling control */
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| 127 | int xhci_init_commands(xhci_hc_t *);
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| 128 | void xhci_fini_commands(xhci_hc_t *);
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| 129 |
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| 130 | void xhci_stop_command_ring(xhci_hc_t *);
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| 131 | void xhci_abort_command_ring(xhci_hc_t *);
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| 132 | void xhci_start_command_ring(xhci_hc_t *);
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| 133 |
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| 134 | int xhci_handle_command_completion(xhci_hc_t *, xhci_trb_t *);
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| 135 |
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| 136 | /* Command lifecycle */
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| 137 | void xhci_cmd_init(xhci_cmd_t *, xhci_cmd_type_t);
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| 138 | void xhci_cmd_fini(xhci_cmd_t *);
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| 139 |
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| 140 | /* Issuing commands */
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| 141 | int xhci_cmd_sync(xhci_hc_t *, xhci_cmd_t *);
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| 142 | int xhci_cmd_sync_fini(xhci_hc_t *, xhci_cmd_t *);
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| 143 | int xhci_cmd_async_fini(xhci_hc_t *, xhci_cmd_t *);
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| 144 |
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| 145 | static inline int xhci_cmd_sync_inline_wrapper(xhci_hc_t *hc, xhci_cmd_t cmd)
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| 146 | {
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| 147 | /* Poor man's xhci_cmd_init (everything else is zeroed) */
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| 148 | link_initialize(&cmd._header.link);
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| 149 | fibril_mutex_initialize(&cmd._header.completed_mtx);
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| 150 | fibril_condvar_initialize(&cmd._header.completed_cv);
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| 151 |
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| 152 | /* Issue the command */
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| 153 | const int err = xhci_cmd_sync(hc, &cmd);
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| 154 | xhci_cmd_fini(&cmd);
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| 155 |
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| 156 | return err;
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| 157 | }
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| 158 |
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| 159 | /** The inline macro expects:
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| 160 | * - hc - HC to schedule command on (xhci_hc_t *).
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| 161 | * - command - Member of `xhci_cmd_type_t` without the "XHCI_CMD_" prefix.
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| 162 | * - VA_ARGS - (optional) Command arguments in struct initialization notation.
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| 163 | *
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| 164 | * The return code and semantics matches those of `xhci_cmd_sync_fini`.
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| 165 | *
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| 166 | * Example:
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| 167 | * int err = xhci_cmd_sync_inline(hc, DISABLE_SLOT, .slot_id = 42);
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| 168 | */
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| 169 |
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| 170 | #define xhci_cmd_sync_inline(hc, command, ...) \
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| 171 | xhci_cmd_sync_inline_wrapper(hc, \
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| 172 | (xhci_cmd_t) { ._header.cmd = XHCI_CMD_##command, ##__VA_ARGS__ })
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| 173 |
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| 174 | #endif
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| 175 |
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| 176 |
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| 177 |
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| 178 | /**
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| 179 | * @}
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| 180 | */
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