1 | /*
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2 | * Copyright (c) 2017 Jaroslav Jindrak
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup drvusbxhci
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30 | * @{
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31 | */
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32 | /** @file
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33 | * Utility functions used to place TRBs onto the command ring.
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34 | */
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35 |
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36 | #ifndef XHCI_COMMANDS_H
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37 | #define XHCI_COMMANDS_H
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38 |
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39 | #include <adt/list.h>
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40 | #include <stdbool.h>
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41 | #include <fibril_synch.h>
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42 | #include "hw_struct/trb.h"
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43 |
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44 | typedef struct xhci_hc xhci_hc_t;
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45 | typedef struct xhci_input_ctx xhci_input_ctx_t;
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46 |
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47 | typedef struct xhci_command {
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48 | link_t link;
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49 |
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50 | xhci_trb_t trb;
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51 | uintptr_t trb_phys;
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52 |
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53 | uint32_t slot_id;
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54 | uint32_t status;
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55 |
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56 | bool completed;
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57 |
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58 | /* Will broadcast after command completes. */
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59 | fibril_mutex_t completed_mtx;
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60 | fibril_condvar_t completed_cv;
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61 | } xhci_cmd_t;
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62 |
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63 | int xhci_init_commands(xhci_hc_t *);
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64 | void xhci_fini_commands(xhci_hc_t *);
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65 |
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66 | xhci_cmd_t *xhci_cmd_alloc(void);
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67 | void xhci_cmd_init(xhci_cmd_t *);
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68 | int xhci_cmd_wait(xhci_cmd_t *, suseconds_t);
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69 | void xhci_cmd_fini(xhci_cmd_t *);
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70 | void xhci_cmd_free(xhci_cmd_t *);
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71 |
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72 | void xhci_stop_command_ring(xhci_hc_t *);
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73 | void xhci_abort_command_ring(xhci_hc_t *);
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74 | void xhci_start_command_ring(xhci_hc_t *);
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75 |
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76 | int xhci_send_no_op_command(xhci_hc_t *, xhci_cmd_t *);
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77 | int xhci_send_enable_slot_command(xhci_hc_t *, xhci_cmd_t *);
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78 | int xhci_send_disable_slot_command(xhci_hc_t *, xhci_cmd_t *);
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79 | int xhci_send_address_device_command(xhci_hc_t *, xhci_cmd_t *, xhci_input_ctx_t *);
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80 | int xhci_send_configure_endpoint_command(xhci_hc_t *, xhci_cmd_t *, xhci_input_ctx_t *);
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81 | int xhci_send_evaluate_context_command(xhci_hc_t *, xhci_cmd_t *, xhci_input_ctx_t *);
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82 | int xhci_send_reset_endpoint_command(xhci_hc_t *, xhci_cmd_t *, uint32_t, uint8_t);
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83 | int xhci_send_stop_endpoint_command(xhci_hc_t *, xhci_cmd_t *, uint32_t, uint8_t);
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84 | int xhci_send_set_dequeue_ptr_command(xhci_hc_t *, xhci_cmd_t *, uintptr_t, uint16_t, uint32_t);
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85 | int xhci_send_reset_device_command(xhci_hc_t *, xhci_cmd_t *);
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86 | // TODO: Force event (optional normative, for VMM, section 4.6.12).
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87 | // TODO: Negotiate bandwidth (optional normative, section 4.6.13).
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88 | // TODO: Set latency tolerance value (optional normative, section 4.6.14).
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89 | // TODO: Get port bandwidth (mandatory, but needs root hub implementation, section 4.6.15).
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90 | // TODO: Force header (mandatory, but needs root hub implementation, section 4.6.16).
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91 |
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92 | int xhci_handle_command_completion(xhci_hc_t *, xhci_trb_t *);
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93 |
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94 | #endif
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95 |
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96 |
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97 |
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98 | /**
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99 | * @}
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100 | */
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