source: mainline/uspace/drv/bus/usb/xhci/commands.h@ 3692678

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3692678 was e0a5d4c, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

usb: update copyrights

The data was generated by a script, guided manually. If you feel your
name is missing somewhere, please add it!

The semi-automated process was roughly:

1) Changes per file and author (limited to our team) were counted
2) Trivial numbers were thrown away
3) Authors were sorted by lines added to file
4) All previous copyrights were replaced by the newly generated one
5) Hunks changing only year were discarded

It seems that a lot of my copyrights were added. It is due to me being
both sticking my nose everywhere and lazy to update the copyright right
away :)

  • Property mode set to 100644
File size: 5.5 KB
Line 
1/*
2 * Copyright (c) 2018 Jaroslav Jindrak, Petr Manek, Ondrej Hlavaty, Jan Hrach
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * Utility functions used to place TRBs onto the command ring.
34 */
35
36#ifndef XHCI_COMMANDS_H
37#define XHCI_COMMANDS_H
38
39#include <adt/list.h>
40#include <stdbool.h>
41#include <fibril_synch.h>
42#include <usb/dma_buffer.h>
43#include "hw_struct/trb.h"
44#include "trb_ring.h"
45
46#define XHCI_COMMAND_TIMEOUT 10000000
47#define XHCI_CR_ABORT_TIMEOUT 5000000
48
49typedef struct xhci_hc xhci_hc_t;
50typedef struct xhci_input_ctx xhci_input_ctx_t;
51typedef struct xhci_port_bandwidth_ctx xhci_port_bandwidth_ctx_t;
52
53typedef enum xhci_cmd_type {
54 XHCI_CMD_ENABLE_SLOT,
55 XHCI_CMD_DISABLE_SLOT,
56 XHCI_CMD_ADDRESS_DEVICE,
57 XHCI_CMD_CONFIGURE_ENDPOINT,
58 XHCI_CMD_EVALUATE_CONTEXT,
59 XHCI_CMD_RESET_ENDPOINT,
60 XHCI_CMD_STOP_ENDPOINT,
61 XHCI_CMD_SET_TR_DEQUEUE_POINTER,
62 XHCI_CMD_RESET_DEVICE,
63 XHCI_CMD_FORCE_EVENT,
64 XHCI_CMD_NEGOTIATE_BANDWIDTH,
65 XHCI_CMD_SET_LATENCY_TOLERANCE_VALUE,
66 XHCI_CMD_GET_PORT_BANDWIDTH,
67 XHCI_CMD_FORCE_HEADER,
68 XHCI_CMD_NO_OP,
69} xhci_cmd_type_t;
70
71typedef enum {
72 XHCI_CR_STATE_CLOSED, /**< Commands are rejected with ENAK. */
73 XHCI_CR_STATE_OPEN, /**< Commands are enqueued normally. */
74 XHCI_CR_STATE_CHANGING, /**< Commands wait until state changes. */
75 XHCI_CR_STATE_FULL, /**< Commands wait until something completes. */
76} xhci_cr_state_t;
77
78typedef struct xhci_command_ring {
79 xhci_trb_ring_t trb_ring;
80
81 fibril_mutex_t guard; /**< Guard access to this structure. */
82 list_t cmd_list;
83
84 xhci_cr_state_t state; /**< Whether commands are allowed to be
85 added. */
86 fibril_condvar_t state_cv; /**< For waiting on CR state change. */
87
88 fibril_condvar_t stopped_cv; /**< For waiting on CR stopped event. */
89} xhci_cmd_ring_t;
90
91typedef struct xhci_command {
92 /** Internal fields used for bookkeeping. Need not worry about these. */
93 struct {
94 link_t link;
95
96 xhci_cmd_type_t cmd;
97
98 xhci_trb_t trb;
99 uintptr_t trb_phys;
100
101 bool async;
102 bool completed;
103
104 /* Will broadcast after command completes. */
105 fibril_mutex_t completed_mtx;
106 fibril_condvar_t completed_cv;
107 } _header;
108
109 /** Below are arguments of all commands mixed together.
110 * Be sure to know which command accepts what arguments. */
111
112 uint32_t slot_id;
113 uint32_t endpoint_id;
114 uint16_t stream_id;
115
116 dma_buffer_t input_ctx, bandwidth_ctx;
117 uintptr_t dequeue_ptr;
118
119 bool tsp;
120 uint8_t susp;
121 uint8_t device_speed;
122 uint32_t status;
123 bool deconfigure;
124} xhci_cmd_t;
125
126/* Command handling control */
127extern errno_t xhci_init_commands(xhci_hc_t *);
128extern void xhci_fini_commands(xhci_hc_t *);
129
130extern void xhci_nuke_command_ring(xhci_hc_t *);
131extern void xhci_stop_command_ring(xhci_hc_t *);
132extern void xhci_abort_command_ring(xhci_hc_t *);
133extern void xhci_start_command_ring(xhci_hc_t *);
134
135extern errno_t xhci_handle_command_completion(xhci_hc_t *, xhci_trb_t *);
136
137/* Command lifecycle */
138extern void xhci_cmd_init(xhci_cmd_t *, xhci_cmd_type_t);
139extern void xhci_cmd_fini(xhci_cmd_t *);
140
141/* Issuing commands */
142extern errno_t xhci_cmd_sync(xhci_hc_t *, xhci_cmd_t *);
143extern errno_t xhci_cmd_sync_fini(xhci_hc_t *, xhci_cmd_t *);
144extern errno_t xhci_cmd_async_fini(xhci_hc_t *, xhci_cmd_t *);
145
146static inline errno_t xhci_cmd_sync_inline_wrapper(xhci_hc_t *hc, xhci_cmd_t cmd)
147{
148 /* Poor man's xhci_cmd_init (everything else is zeroed) */
149 link_initialize(&cmd._header.link);
150 fibril_mutex_initialize(&cmd._header.completed_mtx);
151 fibril_condvar_initialize(&cmd._header.completed_cv);
152
153 /* Issue the command */
154 const errno_t err = xhci_cmd_sync(hc, &cmd);
155 xhci_cmd_fini(&cmd);
156
157 return err;
158}
159
160/** The inline macro expects:
161 * - hc - HC to schedule command on (xhci_hc_t *).
162 * - command - Member of `xhci_cmd_type_t` without the "XHCI_CMD_" prefix.
163 * - VA_ARGS - (optional) Command arguments in struct initialization notation.
164 *
165 * The return code and semantics matches those of `xhci_cmd_sync_fini`.
166 *
167 * Example:
168 * errno_t err = xhci_cmd_sync_inline(hc, DISABLE_SLOT, .slot_id = 42);
169 */
170
171#define xhci_cmd_sync_inline(hc, command, ...) \
172 xhci_cmd_sync_inline_wrapper(hc, \
173 (xhci_cmd_t) { ._header.cmd = XHCI_CMD_##command, ##__VA_ARGS__ })
174
175#endif
176
177
178
179/**
180 * @}
181 */
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