source: mainline/uspace/drv/bus/usb/xhci/commands.c@ 665bf3c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 665bf3c was 665bf3c, checked in by Jaroslav Jindrak <dzejrou@…>, 9 years ago

Added a function that sends the configure endpoint command. Refactored the command completion handling code.

  • Property mode set to 100644
File size: 6.5 KB
Line 
1/*
2 * Copyright (c) 2017 Jaroslav Jindrak
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief Command sending functions.
34 */
35
36#include <errno.h>
37#include <str_error.h>
38#include <usb/debug.h>
39#include <usb/host/utils/malloc32.h>
40#include "commands.h"
41#include "debug.h"
42#include "hc.h"
43#include "hw_struct/context.h"
44#include "hw_struct/trb.h"
45
46static inline int ring_doorbell(xhci_hc_t *hc, unsigned doorbell, unsigned target)
47{
48 uint32_t v = host2xhci(32, target & BIT_RRANGE(uint32_t, 7));
49 pio_write_32(&hc->db_arry[doorbell], v);
50 return EOK;
51}
52
53static inline int enqueue_trb(xhci_hc_t *hc, xhci_trb_t *trb,
54 unsigned doorbell, unsigned target)
55{
56 xhci_trb_ring_enqueue(&hc->command_ring, trb);
57 ring_doorbell(hc, doorbell, target);
58
59 xhci_dump_trb(trb);
60 usb_log_debug2("HC(%p): Sent TRB", hc);
61
62 return EOK;
63}
64
65int xhci_send_no_op_command(xhci_hc_t *hc)
66{
67 xhci_trb_t trb;
68 memset(&trb, 0, sizeof(trb));
69
70 trb.control = host2xhci(32, XHCI_TRB_TYPE_NO_OP_CMD << 10);
71
72 return enqueue_trb(hc, &trb, 0, 0);
73}
74
75int xhci_send_enable_slot_command(xhci_hc_t *hc)
76{
77 xhci_trb_t trb;
78 memset(&trb, 0, sizeof(trb));
79
80 trb.control = host2xhci(32, XHCI_TRB_TYPE_ENABLE_SLOT_CMD << 10);
81 trb.control |= host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
82 trb.control |= host2xhci(32, hc->command_ring.pcs);
83
84 return enqueue_trb(hc, &trb, 0, 0);
85}
86
87int xhci_send_disable_slot_command(xhci_hc_t *hc, uint32_t slot_id)
88{
89 xhci_trb_t trb;
90 memset(&trb, 0, sizeof(trb));
91
92 trb.control = host2xhci(32, XHCI_TRB_TYPE_DISABLE_SLOT_CMD << 10);
93 trb.control |= host2xhci(32, hc->command_ring.pcs);
94 trb.control |= host2xhci(32, slot_id << 24);
95
96 return enqueue_trb(hc, &trb, 0, 0);
97}
98
99int xhci_send_address_device_command(xhci_hc_t *hc, uint32_t slot_id,
100 xhci_input_ctx_t *ictx)
101{
102 /**
103 * TODO: Requirements for this command:
104 * dcbaa[slot_id] is properly sized and initialized
105 * ictx has valids slot context and endpoint 0, all
106 * other should be ignored at this point (see section 4.6.5).
107 */
108 xhci_trb_t trb;
109 memset(&trb, 0, sizeof(trb));
110
111 uint64_t phys_addr = (uint64_t) addr_to_phys(ictx);
112 trb.parameter = host2xhci(32, phys_addr & 0xFFFFFFFFFFFFFFF0);
113
114 /**
115 * Note: According to section 6.4.3.4, we can set the 9th bit
116 * of the control field of the trb (BSR) to 1 and then the xHC
117 * will not issue the SET_ADDRESS request to the USB device.
118 * This can be used to provide compatibility with legacy USB devices
119 * that require their device descriptor to be read before such request.
120 */
121 trb.control = host2xhci(32, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD << 10);
122 trb.control |= host2xhci(32, hc->command_ring.pcs);
123 trb.control |= host2xhci(32, slot_id << 24);
124
125 return enqueue_trb(hc, &trb, 0, 0);
126}
127
128int xhci_send_configure_endpoint_command(xhci_hc_t *hc, uint32_t slot_id,
129 xhci_input_ctx_t *ictx)
130{
131 xhci_trb_t trb;
132 memset(&trb, 0, sizeof(trb));
133
134 uint64_t phys_addr = (uint64_t) addr_to_phys(ictx);
135 trb.parameter = host2xhci(32, phys_addr & 0xFFFFFFFFFFFFFFF0);
136
137 trb.control = host2xhci(32, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD << 10);
138 trb.control |= host2xhci(32, hc->command_ring.pcs);
139 trb.control |= host2xhci(32, slot_id << 24);
140
141 return enqueue_trb(hc, &trb, 0, 0);
142}
143
144static int report_error(int code)
145{
146 // TODO: Order these by their value.
147 switch (code) {
148 case XHCI_TRBC_NO_SLOTS_ERROR:
149 usb_log_error("Device slot not available.");
150 break;
151 case XHCI_TRBC_SLOT_NOT_ENABLE_ERROR:
152 usb_log_error("Slot ID is not enabled.");
153 break;
154 case XHCI_TRBC_CONTEXT_STATE_ERROR:
155 usb_log_error("Slot is not in enabled or default state.");
156 break;
157 case XHCI_TRBC_TRANSACTION_ERROR:
158 usb_log_error("Request to the USB device failed.");
159 break;
160 case XHCI_TRBC_BANDWIDTH_ERROR:
161 usb_log_error("Bandwidth required is not available.");
162 break;
163 case XHCI_TRBC_SECONDARY_BANDWIDTH_ERROR:
164 usb_log_error("Bandwidth error encountered in secondary domain.");
165 break;
166 case XHCI_TRBC_RESOURCE_ERROR:
167 usb_log_error("Resource required is not available.");
168 break;
169 case XHCI_TRBC_PARAMETER_ERROR:
170 usb_log_error("Parameter given is invalid.");
171 break;
172 default:
173 usb_log_error("Unknown error code.");
174 break;
175 }
176 return ENAK;
177}
178
179int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
180{
181 usb_log_debug("HC(%p) Command completed.", hc);
182 xhci_dump_trb(trb);
183
184 int code;
185 uint32_t slot_id;
186 xhci_trb_t *command;
187
188 code = XHCI_DWORD_EXTRACT(trb->status, 31, 24);
189 command = (xhci_trb_t *) XHCI_QWORD_EXTRACT(trb->parameter, 63, 4);
190 slot_id = XHCI_DWORD_EXTRACT(trb->control, 31, 24);
191
192 if (TRB_TYPE(*command) != XHCI_TRB_TYPE_NO_OP_CMD) {
193 if (code != XHCI_TRBC_SUCCESS) {
194 usb_log_debug2("Command resulted in failure.");
195 xhci_dump_trb(command);
196 }
197 }
198
199 switch (TRB_TYPE(*command)) {
200 case XHCI_TRB_TYPE_NO_OP_CMD:
201 assert(code = XHCI_TRBC_TRB_ERROR);
202 return EOK;
203 case XHCI_TRB_TYPE_ENABLE_SLOT_CMD:
204 return EOK;
205 case XHCI_TRB_TYPE_DISABLE_SLOT_CMD:
206 return EOK;
207 case XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD:
208 return EOK;
209 case XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD:
210 return EOK;
211 default:
212 usb_log_debug2("Unsupported command trb.");
213 xhci_dump_trb(command);
214 return ENAK;
215 }
216}
217
218
219/**
220 * @}
221 */
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