source: mainline/uspace/drv/bus/usb/xhci/commands.c@ 19f0048

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 19f0048 was 19f0048, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: reinitialize in case of HC error

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File size: 22.0 KB
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1/*
2 * Copyright (c) 2017 Jaroslav Jindrak
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief Command sending functions.
34 */
35
36#include <errno.h>
37#include <str_error.h>
38#include <usb/debug.h>
39#include "commands.h"
40#include "debug.h"
41#include "hc.h"
42#include "hw_struct/context.h"
43#include "hw_struct/trb.h"
44
45#define TRB_SET_TSP(trb, tsp) (trb).control |= host2xhci(32, (((tsp) & 0x1) << 9))
46#define TRB_SET_TYPE(trb, type) (trb).control |= host2xhci(32, (type) << 10)
47#define TRB_SET_DC(trb, dc) (trb).control |= host2xhci(32, (dc) << 9)
48#define TRB_SET_EP(trb, ep) (trb).control |= host2xhci(32, ((ep) & 0x5) << 16)
49#define TRB_SET_STREAM(trb, st) (trb).control |= host2xhci(32, ((st) & 0xFFFF) << 16)
50#define TRB_SET_SUSP(trb, susp) (trb).control |= host2xhci(32, ((susp) & 0x1) << 23)
51#define TRB_SET_SLOT(trb, slot) (trb).control |= host2xhci(32, (slot) << 24)
52#define TRB_SET_DEV_SPEED(trb, speed) (trb).control |= host2xhci(32, (speed & 0xF) << 16)
53#define TRB_SET_DEQUEUE_PTR(trb, dptr) (trb).parameter |= host2xhci(64, (dptr))
54#define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(64, (phys) & (~0xF))
55
56#define TRB_GET_CODE(trb) XHCI_DWORD_EXTRACT((trb).status, 31, 24)
57#define TRB_GET_SLOT(trb) XHCI_DWORD_EXTRACT((trb).control, 31, 24)
58#define TRB_GET_PHYS(trb) (XHCI_QWORD_EXTRACT((trb).parameter, 63, 4) << 4)
59
60/* Control functions */
61
62static xhci_cmd_ring_t *get_cmd_ring(xhci_hc_t *hc)
63{
64 assert(hc);
65 return &hc->cr;
66}
67
68/**
69 * Initialize the command subsystem. Allocates the comand ring.
70 *
71 * Does not configure the CR pointer to the hardware, because the xHC will be
72 * reset before starting.
73 */
74int xhci_init_commands(xhci_hc_t *hc)
75{
76 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
77 int err;
78
79 if ((err = xhci_trb_ring_init(&cr->trb_ring, 0)))
80 return err;
81
82 fibril_mutex_initialize(&cr->guard);
83 fibril_condvar_initialize(&cr->state_cv);
84 fibril_condvar_initialize(&cr->stopped_cv);
85
86 list_initialize(&cr->cmd_list);
87
88 return EOK;
89}
90
91/**
92 * Finish the command subsystem. Stops the hardware from running commands, then
93 * deallocates the ring.
94 */
95void xhci_fini_commands(xhci_hc_t *hc)
96{
97 assert(hc);
98 xhci_stop_command_ring(hc);
99
100 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
101
102 fibril_mutex_lock(&cr->guard);
103 xhci_trb_ring_fini(&cr->trb_ring);
104 fibril_mutex_unlock(&cr->guard);
105}
106
107/**
108 * Initialize a command structure for the given command.
109 */
110void xhci_cmd_init(xhci_cmd_t *cmd, xhci_cmd_type_t type)
111{
112 memset(cmd, 0, sizeof(*cmd));
113
114 link_initialize(&cmd->_header.link);
115
116 fibril_mutex_initialize(&cmd->_header.completed_mtx);
117 fibril_condvar_initialize(&cmd->_header.completed_cv);
118
119 cmd->_header.cmd = type;
120}
121
122/**
123 * Finish the command structure. Some command invocation includes allocating
124 * a context structure. To have the convenience in calling commands, this
125 * method deallocates all resources.
126 */
127void xhci_cmd_fini(xhci_cmd_t *cmd)
128{
129 list_remove(&cmd->_header.link);
130
131 dma_buffer_free(&cmd->input_ctx);
132 dma_buffer_free(&cmd->bandwidth_ctx);
133
134 if (cmd->_header.async) {
135 free(cmd);
136 }
137}
138
139/**
140 * Find a command issued by TRB at @c phys inside the command list.
141 *
142 * Call with guard locked only.
143 */
144static inline xhci_cmd_t *find_command(xhci_hc_t *hc, uint64_t phys)
145{
146 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
147 assert(fibril_mutex_is_locked(&cr->guard));
148
149 link_t *cmd_link = list_first(&cr->cmd_list);
150
151 while (cmd_link != NULL) {
152 xhci_cmd_t *cmd = list_get_instance(cmd_link, xhci_cmd_t, _header.link);
153
154 if (cmd->_header.trb_phys == phys)
155 break;
156
157 cmd_link = list_next(cmd_link, &cr->cmd_list);
158 }
159
160 return cmd_link ? list_get_instance(cmd_link, xhci_cmd_t, _header.link)
161 : NULL;
162}
163
164static void cr_set_state(xhci_cmd_ring_t *cr, xhci_cr_state_t state)
165{
166 assert(fibril_mutex_is_locked(&cr->guard));
167
168 cr->state = state;
169 if (state == XHCI_CR_STATE_OPEN
170 || state == XHCI_CR_STATE_CLOSED)
171 fibril_condvar_broadcast(&cr->state_cv);
172}
173
174static int wait_for_ring_open(xhci_cmd_ring_t *cr)
175{
176 assert(fibril_mutex_is_locked(&cr->guard));
177
178 while (true) {
179 switch (cr->state) {
180 case XHCI_CR_STATE_CHANGING:
181 case XHCI_CR_STATE_FULL:
182 fibril_condvar_wait(&cr->state_cv, &cr->guard);
183 break;
184 case XHCI_CR_STATE_OPEN:
185 return EOK;
186 case XHCI_CR_STATE_CLOSED:
187 return ENAK;
188 }
189 }
190}
191
192/**
193 * Enqueue a command on the TRB ring. Ring the doorbell to initiate processing.
194 * Register the command as waiting for completion inside the command list.
195 */
196static inline int enqueue_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
197{
198 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
199 assert(cmd);
200
201 fibril_mutex_lock(&cr->guard);
202
203 if (wait_for_ring_open(cr)) {
204 fibril_mutex_unlock(&cr->guard);
205 return ENAK;
206 }
207
208 usb_log_debug("Sending command %s", xhci_trb_str_type(TRB_TYPE(cmd->_header.trb)));
209
210 list_append(&cmd->_header.link, &cr->cmd_list);
211
212 int err = EOK;
213 while (err == EOK) {
214 err = xhci_trb_ring_enqueue(&cr->trb_ring,
215 &cmd->_header.trb, &cmd->_header.trb_phys);
216 if (err != EAGAIN)
217 break;
218
219 cr_set_state(cr, XHCI_CR_STATE_FULL);
220 err = wait_for_ring_open(cr);
221 }
222
223 if (err == EOK)
224 hc_ring_doorbell(hc, 0, 0);
225
226 fibril_mutex_unlock(&cr->guard);
227
228 return err;
229}
230
231/**
232 * Stop the command ring. Stop processing commands, block issuing new ones.
233 * Wait until hardware acknowledges it is stopped.
234 */
235void xhci_stop_command_ring(xhci_hc_t *hc)
236{
237 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
238
239 fibril_mutex_lock(&cr->guard);
240
241 // Prevent others from starting CR again.
242 cr_set_state(cr, XHCI_CR_STATE_CLOSED);
243
244 /* Some systems, inc. QEMU, need whole 64-bit qword to be written */
245 XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
246 XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0);
247
248 while (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR))
249 fibril_condvar_wait(&cr->stopped_cv, &cr->guard);
250
251 fibril_mutex_unlock(&cr->guard);
252}
253
254/**
255 * Mark the command ring as stopped. NAK new commands, abort running, do not
256 * touch the HC as it's probably broken.
257 */
258void xhci_nuke_command_ring(xhci_hc_t *hc)
259{
260 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
261 fibril_mutex_lock(&cr->guard);
262 // Prevent others from starting CR again.
263 cr_set_state(cr, XHCI_CR_STATE_CLOSED);
264 fibril_mutex_unlock(&cr->guard);
265}
266
267/**
268 * Mark the command ring as working again.
269 */
270void xhci_start_command_ring(xhci_hc_t *hc)
271{
272 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
273 fibril_mutex_lock(&cr->guard);
274 // Prevent others from starting CR again.
275 cr_set_state(cr, XHCI_CR_STATE_OPEN);
276 fibril_mutex_unlock(&cr->guard);
277}
278
279/**
280 * Abort currently processed command. Note that it is only aborted when the
281 * command is "blocking" - see section 4.6.1.2 of xHCI spec.
282 */
283static void abort_command_ring(xhci_hc_t *hc)
284{
285 /* Some systems, inc. QEMU, need whole 64-bit qword to be written */
286 XHCI_REG_SET(hc->op_regs, XHCI_OP_CA, 1);
287 XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0);
288}
289
290static const char *trb_codes [] = {
291#define TRBC(t) [XHCI_TRBC_##t] = #t
292 TRBC(INVALID),
293 TRBC(SUCCESS),
294 TRBC(DATA_BUFFER_ERROR),
295 TRBC(BABBLE_DETECTED_ERROR),
296 TRBC(USB_TRANSACTION_ERROR),
297 TRBC(TRB_ERROR),
298 TRBC(STALL_ERROR),
299 TRBC(RESOURCE_ERROR),
300 TRBC(BANDWIDTH_ERROR),
301 TRBC(NO_SLOTS_ERROR),
302 TRBC(INVALID_STREAM_ERROR),
303 TRBC(SLOT_NOT_ENABLED_ERROR),
304 TRBC(EP_NOT_ENABLED_ERROR),
305 TRBC(SHORT_PACKET),
306 TRBC(RING_UNDERRUN),
307 TRBC(RING_OVERRUN),
308 TRBC(VF_EVENT_RING_FULL),
309 TRBC(PARAMETER_ERROR),
310 TRBC(BANDWIDTH_OVERRUN_ERROR),
311 TRBC(CONTEXT_STATE_ERROR),
312 TRBC(NO_PING_RESPONSE_ERROR),
313 TRBC(EVENT_RING_FULL_ERROR),
314 TRBC(INCOMPATIBLE_DEVICE_ERROR),
315 TRBC(MISSED_SERVICE_ERROR),
316 TRBC(COMMAND_RING_STOPPED),
317 TRBC(COMMAND_ABORTED),
318 TRBC(STOPPED),
319 TRBC(STOPPED_LENGTH_INVALID),
320 TRBC(STOPPED_SHORT_PACKET),
321 TRBC(MAX_EXIT_LATENCY_TOO_LARGE_ERROR),
322 [30] = "<reserved>",
323 TRBC(ISOCH_BUFFER_OVERRUN),
324 TRBC(EVENT_LOST_ERROR),
325 TRBC(UNDEFINED_ERROR),
326 TRBC(INVALID_STREAM_ID_ERROR),
327 TRBC(SECONDARY_BANDWIDTH_ERROR),
328 TRBC(SPLIT_TRANSACTION_ERROR),
329 [XHCI_TRBC_MAX] = NULL
330#undef TRBC
331};
332
333/**
334 * Report an error according to command completion code.
335 */
336static void report_error(int code)
337{
338 if (code < XHCI_TRBC_MAX && trb_codes[code] != NULL)
339 usb_log_error("Command resulted in error: %s.", trb_codes[code]);
340 else
341 usb_log_error("Command resulted in reserved or vendor specific error.");
342}
343
344/**
345 * Handle a command completion. Feed the fibril waiting for result.
346 *
347 * @param trb The COMMAND_COMPLETION TRB found in event ring.
348 */
349int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
350{
351 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
352 assert(trb);
353
354 fibril_mutex_lock(&cr->guard);
355
356 int code = TRB_GET_CODE(*trb);
357
358 if (code == XHCI_TRBC_COMMAND_RING_STOPPED) {
359 /* This can either mean that the ring is being stopped, or
360 * a command was aborted. In either way, wake threads waiting
361 * on stopped_cv.
362 *
363 * Note that we need to hold mutex, because we must be sure the
364 * requesting thread is waiting inside the CV.
365 */
366 usb_log_debug("Command ring stopped.");
367 fibril_condvar_broadcast(&cr->stopped_cv);
368 fibril_mutex_unlock(&cr->guard);
369 return EOK;
370 }
371
372 const uint64_t phys = TRB_GET_PHYS(*trb);
373 xhci_trb_ring_update_dequeue(&cr->trb_ring, phys);
374
375 if (cr->state == XHCI_CR_STATE_FULL)
376 cr_set_state(cr, XHCI_CR_STATE_OPEN);
377
378 xhci_cmd_t *command = find_command(hc, phys);
379 if (command == NULL) {
380 usb_log_error("No command struct for completion event found.");
381
382 if (code != XHCI_TRBC_SUCCESS)
383 report_error(code);
384
385 return EOK;
386 }
387
388 list_remove(&command->_header.link);
389
390 /* Semantics of NO_OP_CMD is that success is marked as a TRB error. */
391 if (command->_header.cmd == XHCI_CMD_NO_OP && code == XHCI_TRBC_TRB_ERROR)
392 code = XHCI_TRBC_SUCCESS;
393
394 command->status = code;
395 command->slot_id = TRB_GET_SLOT(*trb);
396
397 usb_log_debug("Completed command %s",
398 xhci_trb_str_type(TRB_TYPE(command->_header.trb)));
399
400 if (code != XHCI_TRBC_SUCCESS) {
401 report_error(code);
402 xhci_dump_trb(&command->_header.trb);
403 }
404
405 fibril_mutex_unlock(&cr->guard);
406
407 fibril_mutex_lock(&command->_header.completed_mtx);
408 command->_header.completed = true;
409 fibril_condvar_broadcast(&command->_header.completed_cv);
410 fibril_mutex_unlock(&command->_header.completed_mtx);
411
412 if (command->_header.async) {
413 /* Free the command and other DS upon completion. */
414 xhci_cmd_fini(command);
415 }
416
417 return EOK;
418}
419
420/* Command-issuing functions */
421
422static int no_op_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
423{
424 assert(hc);
425
426 xhci_trb_clean(&cmd->_header.trb);
427
428 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_NO_OP_CMD);
429
430 return enqueue_command(hc, cmd);
431}
432
433static int enable_slot_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
434{
435 assert(hc);
436
437 xhci_trb_clean(&cmd->_header.trb);
438
439 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ENABLE_SLOT_CMD);
440 cmd->_header.trb.control |=
441 host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
442
443 return enqueue_command(hc, cmd);
444}
445
446static int disable_slot_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
447{
448 assert(hc);
449 assert(cmd);
450
451 xhci_trb_clean(&cmd->_header.trb);
452
453 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_DISABLE_SLOT_CMD);
454 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
455
456 return enqueue_command(hc, cmd);
457}
458
459static int address_device_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
460{
461 assert(hc);
462 assert(cmd);
463 assert(dma_buffer_is_set(&cmd->input_ctx));
464
465 /**
466 * TODO: Requirements for this command:
467 * dcbaa[slot_id] is properly sized and initialized
468 * ictx has valids slot context and endpoint 0, all
469 * other should be ignored at this point (see section 4.6.5).
470 */
471
472 xhci_trb_clean(&cmd->_header.trb);
473
474 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
475
476 /**
477 * Note: According to section 6.4.3.4, we can set the 9th bit
478 * of the control field of the trb (BSR) to 1 and then the xHC
479 * will not issue the SET_ADDRESS request to the USB device.
480 * This can be used to provide compatibility with legacy USB devices
481 * that require their device descriptor to be read before such request.
482 */
483 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD);
484 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
485
486 return enqueue_command(hc, cmd);
487}
488
489static int configure_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
490{
491 assert(hc);
492 assert(cmd);
493
494 xhci_trb_clean(&cmd->_header.trb);
495
496 if (!cmd->deconfigure) {
497 /* If the DC flag is on, input context is not evaluated. */
498 assert(dma_buffer_is_set(&cmd->input_ctx));
499
500 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
501 }
502
503 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD);
504 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
505 TRB_SET_DC(cmd->_header.trb, cmd->deconfigure);
506
507 return enqueue_command(hc, cmd);
508}
509
510static int evaluate_context_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
511{
512 assert(hc);
513 assert(cmd);
514 assert(dma_buffer_is_set(&cmd->input_ctx));
515
516 /**
517 * Note: All Drop Context flags of the input context shall be 0,
518 * all Add Context flags shall be initialize to indicate IDs
519 * of the contexts affected by the command.
520 * Refer to sections 6.2.2.3 and 6.3.3.3 for further info.
521 */
522 xhci_trb_clean(&cmd->_header.trb);
523
524 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
525
526 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD);
527 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
528
529 return enqueue_command(hc, cmd);
530}
531
532static int reset_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
533{
534 assert(hc);
535 assert(cmd);
536
537 xhci_trb_clean(&cmd->_header.trb);
538
539 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD);
540 TRB_SET_TSP(cmd->_header.trb, cmd->tsp);
541 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
542 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
543
544 return enqueue_command(hc, cmd);
545}
546
547static int stop_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
548{
549 assert(hc);
550 assert(cmd);
551
552 xhci_trb_clean(&cmd->_header.trb);
553
554 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_STOP_ENDPOINT_CMD);
555 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
556 TRB_SET_SUSP(cmd->_header.trb, cmd->susp);
557 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
558
559 return enqueue_command(hc, cmd);
560}
561
562static int set_tr_dequeue_pointer_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
563{
564 assert(hc);
565 assert(cmd);
566
567 xhci_trb_clean(&cmd->_header.trb);
568
569 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_SET_TR_DEQUEUE_POINTER_CMD);
570 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
571 TRB_SET_STREAM(cmd->_header.trb, cmd->stream_id);
572 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
573 TRB_SET_DEQUEUE_PTR(cmd->_header.trb, cmd->dequeue_ptr);
574
575 return enqueue_command(hc, cmd);
576}
577
578static int reset_device_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
579{
580 assert(hc);
581 assert(cmd);
582
583 xhci_trb_clean(&cmd->_header.trb);
584
585 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_DEVICE_CMD);
586 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
587
588 return enqueue_command(hc, cmd);
589}
590
591static int get_port_bandwidth_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
592{
593 assert(hc);
594 assert(cmd);
595
596 xhci_trb_clean(&cmd->_header.trb);
597
598 TRB_SET_ICTX(cmd->_header.trb, cmd->bandwidth_ctx.phys);
599
600 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_GET_PORT_BANDWIDTH_CMD);
601 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
602 TRB_SET_DEV_SPEED(cmd->_header.trb, cmd->device_speed);
603
604 return enqueue_command(hc, cmd);
605}
606
607/* The table of command-issuing functions. */
608
609typedef int (*cmd_handler) (xhci_hc_t *hc, xhci_cmd_t *cmd);
610
611static cmd_handler cmd_handlers [] = {
612 [XHCI_CMD_ENABLE_SLOT] = enable_slot_cmd,
613 [XHCI_CMD_DISABLE_SLOT] = disable_slot_cmd,
614 [XHCI_CMD_ADDRESS_DEVICE] = address_device_cmd,
615 [XHCI_CMD_CONFIGURE_ENDPOINT] = configure_endpoint_cmd,
616 [XHCI_CMD_EVALUATE_CONTEXT] = evaluate_context_cmd,
617 [XHCI_CMD_RESET_ENDPOINT] = reset_endpoint_cmd,
618 [XHCI_CMD_STOP_ENDPOINT] = stop_endpoint_cmd,
619 [XHCI_CMD_SET_TR_DEQUEUE_POINTER] = set_tr_dequeue_pointer_cmd,
620 [XHCI_CMD_RESET_DEVICE] = reset_device_cmd,
621 [XHCI_CMD_FORCE_EVENT] = NULL,
622 [XHCI_CMD_NEGOTIATE_BANDWIDTH] = NULL,
623 [XHCI_CMD_SET_LATENCY_TOLERANCE_VALUE] = NULL,
624 [XHCI_CMD_GET_PORT_BANDWIDTH] = get_port_bandwidth_cmd,
625 [XHCI_CMD_FORCE_HEADER] = NULL,
626 [XHCI_CMD_NO_OP] = no_op_cmd
627};
628
629/**
630 * Try to abort currently processed command. This is tricky, because
631 * calling fibril is not necessarily the one which issued the blocked command.
632 * Also, the trickiness intensifies by the fact that stopping a CR is denoted by
633 * event, which is again handled in different fibril. but, once we go to sleep
634 * on waiting for that event, another fibril may wake up and try to abort the
635 * blocked command.
636 *
637 * So, we mark the command ring as being restarted, wait for it to stop, and
638 * then start it again. If there was a blocked command, it will be satisfied by
639 * COMMAND_ABORTED event.
640 */
641static int try_abort_current_command(xhci_hc_t *hc)
642{
643 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
644
645 fibril_mutex_lock(&cr->guard);
646
647 if (cr->state == XHCI_CR_STATE_CLOSED) {
648 fibril_mutex_unlock(&cr->guard);
649 return ENAK;
650 }
651
652 if (cr->state == XHCI_CR_STATE_CHANGING) {
653 fibril_mutex_unlock(&cr->guard);
654 return EOK;
655 }
656
657 usb_log_error("Timeout while waiting for command: aborting current command.");
658
659 cr_set_state(cr, XHCI_CR_STATE_CHANGING);
660
661 abort_command_ring(hc);
662
663 fibril_condvar_wait_timeout(&cr->stopped_cv, &cr->guard, XHCI_CR_ABORT_TIMEOUT);
664
665 if (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR)) {
666 /* 4.6.1.2, implementation note
667 * Assume there are larger problems with HC and
668 * reset it.
669 */
670 usb_log_error("Command didn't abort.");
671
672 cr_set_state(cr, XHCI_CR_STATE_CLOSED);
673
674 // TODO: Reset HC completely.
675 // Don't forget to somehow complete all commands with error.
676
677 fibril_mutex_unlock(&cr->guard);
678 return ENAK;
679 }
680
681 cr_set_state(cr, XHCI_CR_STATE_OPEN);
682
683 fibril_mutex_unlock(&cr->guard);
684
685 usb_log_error("Command ring stopped. Starting again.");
686 hc_ring_doorbell(hc, 0, 0);
687
688 return EOK;
689}
690
691/**
692 * Wait, until the command is completed. The completion is triggered by
693 * COMMAND_COMPLETION event. As we do not want to rely on HW completing the
694 * command in timely manner, we timeout. Note that we can't just return an
695 * error after the timeout pass - it may be other command blocking the ring,
696 * and ours can be completed afterwards. Therefore, it is not guaranteed that
697 * this function will return in XHCI_COMMAND_TIMEOUT. It will continue waiting
698 * until COMMAND_COMPLETION event arrives.
699 */
700static int wait_for_cmd_completion(xhci_hc_t *hc, xhci_cmd_t *cmd)
701{
702 int rv = EOK;
703
704 if (fibril_get_id() == hc->event_handler) {
705 usb_log_error("Deadlock detected in waiting for command.");
706 abort();
707 }
708
709 fibril_mutex_lock(&cmd->_header.completed_mtx);
710 while (!cmd->_header.completed) {
711
712 rv = fibril_condvar_wait_timeout(&cmd->_header.completed_cv,
713 &cmd->_header.completed_mtx, XHCI_COMMAND_TIMEOUT);
714
715 /* The waiting timed out. Current command (not necessarily
716 * ours) is probably blocked.
717 */
718 if (!cmd->_header.completed && rv == ETIMEOUT) {
719 fibril_mutex_unlock(&cmd->_header.completed_mtx);
720
721 rv = try_abort_current_command(hc);
722 if (rv)
723 return rv;
724
725 fibril_mutex_lock(&cmd->_header.completed_mtx);
726 }
727 }
728 fibril_mutex_unlock(&cmd->_header.completed_mtx);
729
730 return rv;
731}
732
733/**
734 * Issue command and block the current fibril until it is completed or timeout
735 * expires. Nothing is deallocated. Caller should always execute `xhci_cmd_fini`.
736 */
737int xhci_cmd_sync(xhci_hc_t *hc, xhci_cmd_t *cmd)
738{
739 assert(hc);
740 assert(cmd);
741
742 int err;
743
744 if (!cmd_handlers[cmd->_header.cmd]) {
745 /* Handler not implemented. */
746 return ENOTSUP;
747 }
748
749 if ((err = cmd_handlers[cmd->_header.cmd](hc, cmd))) {
750 /* Command could not be issued. */
751 return err;
752 }
753
754 if ((err = wait_for_cmd_completion(hc, cmd))) {
755 /* Command failed. */
756 return err;
757 }
758
759 switch (cmd->status) {
760 case XHCI_TRBC_SUCCESS:
761 return EOK;
762 case XHCI_TRBC_USB_TRANSACTION_ERROR:
763 return ESTALL;
764 case XHCI_TRBC_RESOURCE_ERROR:
765 case XHCI_TRBC_BANDWIDTH_ERROR:
766 case XHCI_TRBC_NO_SLOTS_ERROR:
767 return ELIMIT;
768 case XHCI_TRBC_SLOT_NOT_ENABLED_ERROR:
769 return ENOENT;
770 default:
771 return EINVAL;
772 }
773}
774
775/**
776 * Does the same thing as `xhci_cmd_sync` and executes `xhci_cmd_fini`. This
777 * is a useful shorthand for issuing commands without out parameters.
778 */
779int xhci_cmd_sync_fini(xhci_hc_t *hc, xhci_cmd_t *cmd)
780{
781 const int err = xhci_cmd_sync(hc, cmd);
782 xhci_cmd_fini(cmd);
783
784 return err;
785}
786
787/**
788 * Does the same thing as `xhci_cmd_sync_fini` without blocking the current
789 * fibril. The command is copied to stack memory and `fini` is called upon its completion.
790 */
791int xhci_cmd_async_fini(xhci_hc_t *hc, xhci_cmd_t *stack_cmd)
792{
793 assert(hc);
794 assert(stack_cmd);
795
796 /* Save the command for later. */
797 xhci_cmd_t *heap_cmd = (xhci_cmd_t *) malloc(sizeof(xhci_cmd_t));
798 if (!heap_cmd) {
799 return ENOMEM;
800 }
801
802 /* TODO: Is this good for the mutex and the condvar? */
803 memcpy(heap_cmd, stack_cmd, sizeof(xhci_cmd_t));
804 heap_cmd->_header.async = true;
805
806 /* Issue the command. */
807 int err;
808
809 if (!cmd_handlers[heap_cmd->_header.cmd]) {
810 /* Handler not implemented. */
811 err = ENOTSUP;
812 goto err_heap_cmd;
813 }
814
815 if ((err = cmd_handlers[heap_cmd->_header.cmd](hc, heap_cmd))) {
816 /* Command could not be issued. */
817 goto err_heap_cmd;
818 }
819
820 return EOK;
821
822err_heap_cmd:
823 free(heap_cmd);
824 return err;
825}
826
827/**
828 * @}
829 */
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