| [4192d3d6] | 1 | /*
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| 2 | * Copyright (c) 2011 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| [58563585] | 28 |
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| [17ceb72] | 29 | /** @addtogroup drvusbuhcihc
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| [4192d3d6] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| [910ca3f] | 33 | * @brief UHCI driver USB transfer structure
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| [4192d3d6] | 34 | */
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| [8064c2f6] | 35 |
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| 36 | #include <assert.h>
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| [4192d3d6] | 37 | #include <errno.h>
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| [3f162ab] | 38 | #include <macros.h>
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| [8064c2f6] | 39 | #include <mem.h>
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| 40 | #include <stdlib.h>
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| [4192d3d6] | 41 |
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| [bdc8ab1] | 42 | #include <usb/usb.h>
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| [4192d3d6] | 43 | #include <usb/debug.h>
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| [8064c2f6] | 44 | #include <usb/host/endpoint.h>
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| [8fc61c8] | 45 | #include <usb/host/utils/malloc32.h>
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| [4192d3d6] | 46 |
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| [07f49ae] | 47 | #include "uhci_batch.h"
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| [c6f82e5] | 48 | #include "hc.h"
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| [87644b4] | 49 | #include "hw_struct/transfer_descriptor.h"
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| [4192d3d6] | 50 |
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| 51 | #define DEFAULT_ERROR_COUNT 3
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| [3afb758] | 52 |
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| [5fd9c30] | 53 | /** Transfer batch setup table. */
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| 54 | static void (*const batch_setup[])(uhci_transfer_batch_t*);
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| [76fbd9a] | 55 |
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| [5fd9c30] | 56 | /** Destroys uhci_transfer_batch_t structure.
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| [28d9c95] | 57 | *
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| [5fd9c30] | 58 | * @param[in] uhci_batch Instance to destroy.
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| [28d9c95] | 59 | */
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| [5fd9c30] | 60 | void uhci_transfer_batch_destroy(uhci_transfer_batch_t *uhci_batch)
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| [2cc6e97] | 61 | {
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| [b991d37] | 62 | assert(uhci_batch);
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| [c21e6a5] | 63 | dma_buffer_free(&uhci_batch->uhci_dma_buffer);
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| [5fd9c30] | 64 | free(uhci_batch);
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| [2cc6e97] | 65 | }
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| [76fbd9a] | 66 |
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| [17ceb72] | 67 | /** Allocate memory and initialize internal data structure.
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| [a7e2f0d] | 68 | *
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| [f7ac3f3] | 69 | * @param[in] usb_batch Pointer to generic USB batch structure.
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| [f706355] | 70 | * @return Valid pointer if all structures were successfully created,
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| [17ceb72] | 71 | * NULL otherwise.
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| [5fd9c30] | 72 | */
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| 73 | uhci_transfer_batch_t * uhci_transfer_batch_create(endpoint_t *ep)
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| 74 | {
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| 75 | uhci_transfer_batch_t *uhci_batch =
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| 76 | calloc(1, sizeof(uhci_transfer_batch_t));
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| 77 | if (!uhci_batch) {
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| [a1732929] | 78 | usb_log_error("Failed to allocate UHCI batch.");
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| [5fd9c30] | 79 | return NULL;
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| 80 | }
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| 81 |
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| 82 | usb_transfer_batch_init(&uhci_batch->base, ep);
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| 83 |
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| 84 | link_initialize(&uhci_batch->link);
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| 85 | return uhci_batch;
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| 86 | }
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| 87 |
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| 88 | /* Prepares batch for commiting.
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| [17ceb72] | 89 | *
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| [508a0ca] | 90 | * Determines the number of needed transfer descriptors (TDs).
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| 91 | * Prepares a transport buffer (that is accessible by the hardware).
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| [910ca3f] | 92 | * Initializes parameters needed for the transfer and callback.
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| [a7e2f0d] | 93 | */
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| [5fd9c30] | 94 | int uhci_transfer_batch_prepare(uhci_transfer_batch_t *uhci_batch)
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| [4192d3d6] | 95 | {
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| [1cf26ab] | 96 | static_assert((sizeof(td_t) % 16) == 0);
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| [2ab6875] | 97 |
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| [5fd9c30] | 98 | usb_transfer_batch_t *usb_batch = &uhci_batch->base;
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| 99 |
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| [1d758fc] | 100 | uhci_batch->td_count = (usb_batch->size + usb_batch->ep->max_packet_size - 1)
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| [5fd9c30] | 101 | / usb_batch->ep->max_packet_size;
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| 102 |
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| [b991d37] | 103 | if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
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| 104 | uhci_batch->td_count += 2;
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| [7dd3318] | 105 | }
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| 106 |
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| [17873ac7] | 107 | const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL)
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| [5fd9c30] | 108 | ? USB_SETUP_PACKET_SIZE
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| 109 | : 0;
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| 110 |
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| [b991d37] | 111 | const size_t total_size = (sizeof(td_t) * uhci_batch->td_count)
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| [c21e6a5] | 112 | + sizeof(qh_t) + setup_size;
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| 113 |
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| 114 | if (dma_buffer_alloc(&uhci_batch->uhci_dma_buffer, total_size)) {
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| [a1732929] | 115 | usb_log_error("Failed to allocate UHCI buffer.");
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| [5fd9c30] | 116 | return ENOMEM;
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| 117 | }
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| [c21e6a5] | 118 | memset(uhci_batch->uhci_dma_buffer.virt, 0, total_size);
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| [4192d3d6] | 119 |
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| [c21e6a5] | 120 | uhci_batch->tds = uhci_batch->uhci_dma_buffer.virt;
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| 121 | uhci_batch->qh = (qh_t *) &uhci_batch->tds[uhci_batch->td_count];
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| [2cc6e97] | 122 |
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| [b991d37] | 123 | qh_init(uhci_batch->qh);
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| 124 | qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
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| [2cc6e97] | 125 |
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| [c21e6a5] | 126 | void *setup_buffer = uhci_transfer_batch_setup_buffer(uhci_batch);
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| 127 | assert(setup_buffer == (void *) (uhci_batch->qh + 1));
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| [b991d37] | 128 | /* Copy SETUP packet data to the device buffer */
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| [c21e6a5] | 129 | memcpy(setup_buffer, usb_batch->setup.buffer, setup_size);
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| 130 |
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| [c4fb5ecd] | 131 | usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
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| [a1732929] | 132 | " memory structures ready.", usb_batch,
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| [b991d37] | 133 | USB_TRANSFER_BATCH_ARGS(*usb_batch));
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| [5d915b7] | 134 |
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| [790318e] | 135 | assert(batch_setup[usb_batch->ep->transfer_type]);
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| [5fd9c30] | 136 | batch_setup[usb_batch->ep->transfer_type](uhci_batch);
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| [b991d37] | 137 |
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| [5fd9c30] | 138 | return EOK;
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| [4192d3d6] | 139 | }
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| [76fbd9a] | 140 |
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| [17ceb72] | 141 | /** Check batch TDs for activity.
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| [a7e2f0d] | 142 | *
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| [5f57929] | 143 | * @param[in] uhci_batch Batch structure to use.
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| [a7e2f0d] | 144 | * @return False, if there is an active TD, true otherwise.
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| [17ceb72] | 145 | *
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| 146 | * Walk all TDs. Stop with false if there is an active one (it is to be
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| [910ca3f] | 147 | * processed). Stop with true if an error is found. Return true if the last TD
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| [17ceb72] | 148 | * is reached.
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| [a7e2f0d] | 149 | */
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| [5fd9c30] | 150 | bool uhci_transfer_batch_check_completed(uhci_transfer_batch_t *uhci_batch)
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| [4192d3d6] | 151 | {
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| [b991d37] | 152 | assert(uhci_batch);
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| [17873ac7] | 153 | usb_transfer_batch_t *batch = &uhci_batch->base;
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| [81dce9f] | 154 |
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| [b991d37] | 155 | usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
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| [a1732929] | 156 | " checking %zu transfer(s) for completion.",
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| [17873ac7] | 157 | uhci_batch, USB_TRANSFER_BATCH_ARGS(*batch),
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| [b991d37] | 158 | uhci_batch->td_count);
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| [db51a6a6] | 159 | batch->transferred_size = 0;
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| [75f9dcd] | 160 |
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| [c6f82e5] | 161 | uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) batch->ep;
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| 162 |
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| [75f9dcd] | 163 | for (size_t i = 0;i < uhci_batch->td_count; ++i) {
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| [b991d37] | 164 | if (td_is_active(&uhci_batch->tds[i])) {
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| [7dd3318] | 165 | return false;
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| [600733e] | 166 | }
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| [c5b93dc] | 167 |
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| [17873ac7] | 168 | batch->error = td_status(&uhci_batch->tds[i]);
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| 169 | if (batch->error != EOK) {
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| 170 | assert(batch->ep != NULL);
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| [b991d37] | 171 |
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| [b64fbc9] | 172 | usb_log_debug("Batch %p found error TD(%zu->%p):%"
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| [a1732929] | 173 | PRIx32 ".", uhci_batch, i,
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| [b64fbc9] | 174 | &uhci_batch->tds[i], uhci_batch->tds[i].status);
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| [b991d37] | 175 | td_print_status(&uhci_batch->tds[i]);
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| [feb10c88] | 176 |
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| [c6f82e5] | 177 | uhci_ep->toggle = td_toggle(&uhci_batch->tds[i]);
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| [2755a622] | 178 | goto substract_ret;
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| [7dd3318] | 179 | }
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| [c5b93dc] | 180 |
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| [db51a6a6] | 181 | batch->transferred_size
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| [b991d37] | 182 | += td_act_size(&uhci_batch->tds[i]);
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| 183 | if (td_is_short(&uhci_batch->tds[i]))
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| [c5b93dc] | 184 | goto substract_ret;
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| [4192d3d6] | 185 | }
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| [c5b93dc] | 186 | substract_ret:
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| [db51a6a6] | 187 | if (batch->transferred_size > 0 && batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
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| 188 | assert(batch->transferred_size >= USB_SETUP_PACKET_SIZE);
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| 189 | batch->transferred_size -= USB_SETUP_PACKET_SIZE;
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| [2755a622] | 190 | }
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| [17873ac7] | 191 |
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| [1d758fc] | 192 | assert(batch->transferred_size <= batch->size);
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| [17873ac7] | 193 |
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| [7dd3318] | 194 | return true;
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| [4192d3d6] | 195 | }
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| [76fbd9a] | 196 |
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| [f7ac3f3] | 197 | /** Direction to pid conversion table */
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| [25d224c6] | 198 | static const usb_packet_id direction_pids[] = {
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| 199 | [USB_DIRECTION_IN] = USB_PID_IN,
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| 200 | [USB_DIRECTION_OUT] = USB_PID_OUT,
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| 201 | };
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| [76fbd9a] | 202 |
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| [910ca3f] | 203 | /** Prepare generic data transfer
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| [a7e2f0d] | 204 | *
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| [5f57929] | 205 | * @param[in] uhci_batch Batch structure to use.
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| [25d224c6] | 206 | * @param[in] dir Communication direction.
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| [17ceb72] | 207 | *
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| [910ca3f] | 208 | * Transactions with alternating toggle bit and supplied pid value.
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| [20a1e76] | 209 | * The last transfer is marked with IOC flag.
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| [a7e2f0d] | 210 | */
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| [5fd9c30] | 211 | static void batch_data(uhci_transfer_batch_t *uhci_batch)
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| [0e06a14] | 212 | {
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| [b991d37] | 213 | assert(uhci_batch);
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| [5fd9c30] | 214 |
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| 215 | usb_direction_t dir = uhci_batch->base.dir;
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| [25d224c6] | 216 | assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
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| [5d915b7] | 217 |
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| [9a790ad1] | 218 |
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| [25d224c6] | 219 | const usb_packet_id pid = direction_pids[dir];
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| [b991d37] | 220 | const bool low_speed =
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| [888238e9] | 221 | uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
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| [5fd9c30] | 222 | const size_t mps = uhci_batch->base.ep->max_packet_size;
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| [b991d37] | 223 |
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| [c6f82e5] | 224 | uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) uhci_batch->base.ep;
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| 225 |
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| 226 | int toggle = uhci_ep->toggle;
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| [3e37964] | 227 | assert(toggle == 0 || toggle == 1);
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| [0e06a14] | 228 |
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| [508a0ca] | 229 | size_t td = 0;
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| [1d758fc] | 230 | size_t remain_size = uhci_batch->base.size;
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| [b991d37] | 231 | char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
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| 232 |
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| [0e06a14] | 233 | while (remain_size > 0) {
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| [3f162ab] | 234 | const size_t packet_size = min(remain_size, mps);
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| [c8dd5b1] | 235 |
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| [b991d37] | 236 | const td_t *next_td = (td + 1 < uhci_batch->td_count)
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| 237 | ? &uhci_batch->tds[td + 1] : NULL;
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| [30a4301] | 238 |
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| [b991d37] | 239 | assert(td < uhci_batch->td_count);
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| [bcaefe3] | 240 | td_init(
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| [b991d37] | 241 | &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
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| [a5b3de6] | 242 | toggle, false, low_speed, uhci_batch->base.target, pid, buffer, next_td);
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| [bcaefe3] | 243 |
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| [910ca3f] | 244 | ++td;
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| [bcaefe3] | 245 | toggle = 1 - toggle;
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| [910ca3f] | 246 | buffer += packet_size;
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| [0e06a14] | 247 | remain_size -= packet_size;
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| 248 | }
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| [b991d37] | 249 | td_set_ioc(&uhci_batch->tds[td - 1]);
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| [c6f82e5] | 250 | uhci_ep->toggle = toggle;
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| [5f57929] | 251 | usb_log_debug2(
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| [a1732929] | 252 | "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.", \
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| [58ac3ec] | 253 | uhci_batch,
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| [5fd9c30] | 254 | usb_str_transfer_type(uhci_batch->base.ep->transfer_type),
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| 255 | usb_str_direction(uhci_batch->base.ep->direction),
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| [58ac3ec] | 256 | USB_TRANSFER_BATCH_ARGS(uhci_batch->base));
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| [4192d3d6] | 257 | }
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| [76fbd9a] | 258 |
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| [910ca3f] | 259 | /** Prepare generic control transfer
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| [a7e2f0d] | 260 | *
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| [5f57929] | 261 | * @param[in] uhci_batch Batch structure to use.
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| [25d224c6] | 262 | * @param[in] dir Communication direction.
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| [17ceb72] | 263 | *
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| 264 | * Setup stage with toggle 0 and USB_PID_SETUP.
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| [25d224c6] | 265 | * Data stage with alternating toggle and pid determined by the communication
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| 266 | * direction.
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| 267 | * Status stage with toggle 1 and pid determined by the communication direction.
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| [20a1e76] | 268 | * The last transfer is marked with IOC.
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| [a7e2f0d] | 269 | */
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| [5fd9c30] | 270 | static void batch_control(uhci_transfer_batch_t *uhci_batch)
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| [bdc8ab1] | 271 | {
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| [b991d37] | 272 | assert(uhci_batch);
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| [5fd9c30] | 273 |
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| 274 | usb_direction_t dir = uhci_batch->base.dir;
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| [25d224c6] | 275 | assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
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| [b991d37] | 276 | assert(uhci_batch->td_count >= 2);
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| [25d224c6] | 277 | static const usb_packet_id status_stage_pids[] = {
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| 278 | [USB_DIRECTION_IN] = USB_PID_OUT,
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| 279 | [USB_DIRECTION_OUT] = USB_PID_IN,
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| 280 | };
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| [b991d37] | 281 |
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| [25d224c6] | 282 | const usb_packet_id data_stage_pid = direction_pids[dir];
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| 283 | const usb_packet_id status_stage_pid = status_stage_pids[dir];
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| [b991d37] | 284 | const bool low_speed =
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| [888238e9] | 285 | uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
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| [5fd9c30] | 286 | const size_t mps = uhci_batch->base.ep->max_packet_size;
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| [a5b3de6] | 287 | const usb_target_t target = uhci_batch->base.target;
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| [d017cea] | 288 |
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| [bdc8ab1] | 289 | /* setup stage */
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| [81dce9f] | 290 | td_init(
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| [b991d37] | 291 | &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
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| [5fd9c30] | 292 | USB_SETUP_PACKET_SIZE, 0, false,
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| [b991d37] | 293 | low_speed, target, USB_PID_SETUP,
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| 294 | uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
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| [bdc8ab1] | 295 |
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| 296 | /* data stage */
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| [508a0ca] | 297 | size_t td = 1;
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| [910ca3f] | 298 | unsigned toggle = 1;
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| [1d758fc] | 299 | size_t remain_size = uhci_batch->base.size;
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| [b991d37] | 300 | char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
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| 301 |
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| [bdc8ab1] | 302 | while (remain_size > 0) {
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| [3f162ab] | 303 | const size_t packet_size = min(remain_size, mps);
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| [bdc8ab1] | 304 |
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| [bcaefe3] | 305 | td_init(
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| [b991d37] | 306 | &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
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| 307 | toggle, false, low_speed, target, data_stage_pid,
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| 308 | buffer, &uhci_batch->tds[td + 1]);
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| [bdc8ab1] | 309 |
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| [508a0ca] | 310 | ++td;
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| [910ca3f] | 311 | toggle = 1 - toggle;
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| 312 | buffer += packet_size;
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| [bdc8ab1] | 313 | remain_size -= packet_size;
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| [b991d37] | 314 | assert(td < uhci_batch->td_count);
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| [bdc8ab1] | 315 | }
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| 316 |
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| 317 | /* status stage */
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| [b991d37] | 318 | assert(td == uhci_batch->td_count - 1);
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| [4192d3d6] | 319 |
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| [81dce9f] | 320 | td_init(
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| [b991d37] | 321 | &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
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| 322 | target, status_stage_pid, NULL, NULL);
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| 323 | td_set_ioc(&uhci_batch->tds[td]);
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| [7dd3318] | 324 |
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| [a1732929] | 325 | usb_log_debug2("Control last TD status: %x.",
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| [b991d37] | 326 | uhci_batch->tds[td].status);
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| [4192d3d6] | 327 | }
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| [76fbd9a] | 328 |
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| [5fd9c30] | 329 | static void (*const batch_setup[])(uhci_transfer_batch_t*) =
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| [b991d37] | 330 | {
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| [790318e] | 331 | [USB_TRANSFER_CONTROL] = batch_control,
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| 332 | [USB_TRANSFER_BULK] = batch_data,
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| 333 | [USB_TRANSFER_INTERRUPT] = batch_data,
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| 334 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
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| [b991d37] | 335 | };
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| [4192d3d6] | 336 | /**
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| 337 | * @}
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| 338 | */
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