source: mainline/uspace/drv/bus/usb/uhci/pci.c@ 698cb1cc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 698cb1cc was 266976f, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

uhci: Use parsed variant of hw_resources.

  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*
2 * Copyright (c) 2011 Vojtech Horky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/**
29 * @addtogroup drvusbuhcihc
30 * @{
31 */
32/**
33 * @file
34 * PCI related functions needed by the UHCI driver.
35 */
36
37#include <errno.h>
38#include <assert.h>
39#include <devman.h>
40#include <device/hw_res_parsed.h>
41
42#include <usb/debug.h>
43#include <pci_dev_iface.h>
44
45#include "pci.h"
46
47/** Get I/O address of registers and IRQ for given device.
48 *
49 * @param[in] dev Device asking for the addresses.
50 * @param[out] io_reg_address Base address of the I/O range.
51 * @param[out] io_reg_size Size of the I/O range.
52 * @param[out] irq_no IRQ assigned to the device.
53 * @return Error code.
54 */
55int pci_get_my_registers(const ddf_dev_t *dev,
56 uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no)
57{
58 assert(dev);
59 assert(io_reg_address);
60 assert(io_reg_size);
61 assert(irq_no);
62
63 async_sess_t *parent_sess =
64 devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle,
65 IPC_FLAG_BLOCKING);
66 if (!parent_sess)
67 return ENOMEM;
68
69 hw_res_list_parsed_t hw_res;
70 hw_res_list_parsed_init(&hw_res);
71 const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0);
72 async_hangup(parent_sess);
73 if (ret != EOK) {
74 return ret;
75 }
76
77 /* We want one irq and one io range. */
78 if (hw_res.irqs.count != 1 || hw_res.io_ranges.count != 1) {
79 hw_res_list_parsed_clean(&hw_res);
80 return EINVAL;
81 }
82
83 if (io_reg_address)
84 *io_reg_address = hw_res.io_ranges.ranges[0].address;
85 if (io_reg_size)
86 *io_reg_size = hw_res.io_ranges.ranges[0].size;
87 if (irq_no)
88 *irq_no = hw_res.irqs.irqs[0];
89
90 hw_res_list_parsed_clean(&hw_res);
91 return EOK;
92}
93/*----------------------------------------------------------------------------*/
94/** Call the PCI driver with a request to enable interrupts
95 *
96 * @param[in] device Device asking for interrupts
97 * @return Error code.
98 */
99int pci_enable_interrupts(const ddf_dev_t *device)
100{
101 async_sess_t *parent_sess =
102 devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle,
103 IPC_FLAG_BLOCKING);
104 if (!parent_sess)
105 return ENOMEM;
106
107 const bool enabled = hw_res_enable_interrupt(parent_sess);
108 async_hangup(parent_sess);
109
110 return enabled ? EOK : EIO;
111}
112/*----------------------------------------------------------------------------*/
113/** Call the PCI driver with a request to clear legacy support register
114 *
115 * @param[in] device Device asking to disable interrupts
116 * @return Error code.
117 */
118int pci_disable_legacy(const ddf_dev_t *device)
119{
120 assert(device);
121
122 async_sess_t *parent_sess =
123 devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle,
124 IPC_FLAG_BLOCKING);
125 if (!parent_sess)
126 return ENOMEM;
127
128 /* See UHCI design guide for these values p.45,
129 * write all WC bits in USB legacy register */
130 const sysarg_t address = 0xc0;
131 const sysarg_t value = 0xaf00;
132
133 async_exch_t *exch = async_exchange_begin(parent_sess);
134
135 const int rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
136 IPC_M_CONFIG_SPACE_WRITE_16, address, value);
137
138 async_exchange_end(exch);
139 async_hangup(parent_sess);
140
141 return rc;
142}
143
144/**
145 * @}
146 */
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