1 | /*
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2 | * Copyright (c) 2011 Vojtech Horky
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 | /**
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29 | * @addtogroup drvusbuhcihc
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30 | * @{
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31 | */
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32 | /**
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33 | * @file
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34 | * PCI related functions needed by the UHCI driver.
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35 | */
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36 |
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37 | #include <errno.h>
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38 | #include <assert.h>
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39 | #include <devman.h>
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40 | #include <device/hw_res_parsed.h>
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41 |
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42 | #include <usb/debug.h>
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43 | #include <pci_dev_iface.h>
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44 |
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45 | #include "pci.h"
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46 |
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47 | /** Get I/O address of registers and IRQ for given device.
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48 | *
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49 | * @param[in] dev Device asking for the addresses.
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50 | * @param[out] io_reg_address Base address of the I/O range.
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51 | * @param[out] io_reg_size Size of the I/O range.
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52 | * @param[out] irq_no IRQ assigned to the device.
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53 | * @return Error code.
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54 | */
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55 | int pci_get_my_registers(const ddf_dev_t *dev,
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56 | uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no)
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57 | {
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58 | assert(dev);
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59 | assert(io_reg_address);
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60 | assert(io_reg_size);
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61 | assert(irq_no);
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62 |
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63 | async_sess_t *parent_sess =
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64 | devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle,
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65 | IPC_FLAG_BLOCKING);
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66 | if (!parent_sess)
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67 | return ENOMEM;
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68 |
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69 | hw_res_list_parsed_t hw_res;
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70 | hw_res_list_parsed_init(&hw_res);
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71 | const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0);
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72 | async_hangup(parent_sess);
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73 | if (ret != EOK) {
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74 | return ret;
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75 | }
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76 |
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77 | /* We want one irq and one io range. */
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78 | if (hw_res.irqs.count != 1 || hw_res.io_ranges.count != 1) {
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79 | hw_res_list_parsed_clean(&hw_res);
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80 | return EINVAL;
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81 | }
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82 |
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83 | if (io_reg_address)
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84 | *io_reg_address = hw_res.io_ranges.ranges[0].address;
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85 | if (io_reg_size)
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86 | *io_reg_size = hw_res.io_ranges.ranges[0].size;
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87 | if (irq_no)
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88 | *irq_no = hw_res.irqs.irqs[0];
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89 |
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90 | hw_res_list_parsed_clean(&hw_res);
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91 | return EOK;
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92 | }
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93 | /*----------------------------------------------------------------------------*/
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94 | /** Call the PCI driver with a request to enable interrupts
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95 | *
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96 | * @param[in] device Device asking for interrupts
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97 | * @return Error code.
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98 | */
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99 | int pci_enable_interrupts(const ddf_dev_t *device)
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100 | {
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101 | async_sess_t *parent_sess =
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102 | devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle,
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103 | IPC_FLAG_BLOCKING);
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104 | if (!parent_sess)
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105 | return ENOMEM;
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106 |
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107 | const bool enabled = hw_res_enable_interrupt(parent_sess);
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108 | async_hangup(parent_sess);
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109 |
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110 | return enabled ? EOK : EIO;
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111 | }
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112 | /*----------------------------------------------------------------------------*/
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113 | /** Call the PCI driver with a request to clear legacy support register
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114 | *
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115 | * @param[in] device Device asking to disable interrupts
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116 | * @return Error code.
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117 | */
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118 | int pci_disable_legacy(const ddf_dev_t *device)
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119 | {
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120 | assert(device);
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121 |
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122 | async_sess_t *parent_sess =
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123 | devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle,
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124 | IPC_FLAG_BLOCKING);
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125 | if (!parent_sess)
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126 | return ENOMEM;
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127 |
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128 | /* See UHCI design guide for these values p.45,
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129 | * write all WC bits in USB legacy register */
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130 | const sysarg_t address = 0xc0;
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131 | const sysarg_t value = 0xaf00;
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132 |
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133 | async_exch_t *exch = async_exchange_begin(parent_sess);
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134 |
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135 | const int rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
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136 | IPC_M_CONFIG_SPACE_WRITE_16, address, value);
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137 |
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138 | async_exchange_end(exch);
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139 | async_hangup(parent_sess);
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140 |
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141 | return rc;
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142 | }
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143 |
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144 | /**
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145 | * @}
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146 | */
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