[ea991e84] | 1 | /*
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| 2 | * Copyright (c) 2011 Vojtech Horky
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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[79ae36dd] | 28 |
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[ea991e84] | 29 | /**
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[17ceb72] | 30 | * @addtogroup drvusbuhcihc
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[ea991e84] | 31 | * @{
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| 32 | */
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| 33 | /**
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| 34 | * @file
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| 35 | * PCI related functions needed by the UHCI driver.
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| 36 | */
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[79ae36dd] | 37 |
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[ea991e84] | 38 | #include <errno.h>
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| 39 | #include <assert.h>
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| 40 | #include <devman.h>
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| 41 | #include <device/hw_res.h>
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| 42 |
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[2d33eb5] | 43 | #include <usb/debug.h>
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[ab414a6] | 44 | #include <pci_dev_iface.h>
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[2d33eb5] | 45 |
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[c56dbe0] | 46 | #include "pci.h"
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| 47 |
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[ea993d18] | 48 | /** Get I/O address of registers and IRQ for given device.
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[ea991e84] | 49 | *
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| 50 | * @param[in] dev Device asking for the addresses.
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| 51 | * @param[out] io_reg_address Base address of the I/O range.
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| 52 | * @param[out] io_reg_size Size of the I/O range.
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| 53 | * @param[out] irq_no IRQ assigned to the device.
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| 54 | * @return Error code.
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| 55 | */
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[e247d83] | 56 | int pci_get_my_registers(const ddf_dev_t *dev,
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[ea993d18] | 57 | uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no)
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[ea991e84] | 58 | {
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[e247d83] | 59 | assert(dev);
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| 60 | assert(io_reg_address);
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| 61 | assert(io_reg_size);
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| 62 | assert(irq_no);
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[5d915b7] | 63 |
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[79ae36dd] | 64 | async_sess_t *parent_sess =
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| 65 | devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle,
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| 66 | IPC_FLAG_BLOCKING);
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| 67 | if (!parent_sess)
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| 68 | return ENOMEM;
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[5d915b7] | 69 |
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[ea991e84] | 70 | hw_resource_list_t hw_resources;
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[45a9cf4] | 71 | const int rc = hw_res_get_resource_list(parent_sess, &hw_resources);
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| 72 | async_hangup(parent_sess);
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[ea991e84] | 73 | if (rc != EOK) {
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[e247d83] | 74 | return rc;
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[ea991e84] | 75 | }
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[5d915b7] | 76 |
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[ea991e84] | 77 | uintptr_t io_address = 0;
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| 78 | size_t io_size = 0;
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| 79 | bool io_found = false;
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[45a9cf4] | 80 |
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[ea991e84] | 81 | int irq = 0;
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| 82 | bool irq_found = false;
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[45a9cf4] | 83 |
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[ea991e84] | 84 | size_t i;
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| 85 | for (i = 0; i < hw_resources.count; i++) {
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[e247d83] | 86 | const hw_resource_t *res = &hw_resources.resources[i];
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[79ae36dd] | 87 | switch (res->type) {
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[4b4e163] | 88 | case INTERRUPT:
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| 89 | irq = res->res.interrupt.irq;
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| 90 | irq_found = true;
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| 91 | usb_log_debug2("Found interrupt: %d.\n", irq);
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| 92 | break;
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| 93 | case IO_RANGE:
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| 94 | io_address = res->res.io_range.address;
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| 95 | io_size = res->res.io_range.size;
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[4125b7d] | 96 | usb_log_debug2("Found io: %" PRIx64" %zu.\n",
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[4b4e163] | 97 | res->res.io_range.address, res->res.io_range.size);
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| 98 | io_found = true;
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[ea993d18] | 99 | break;
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[4b4e163] | 100 | default:
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| 101 | break;
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[ea991e84] | 102 | }
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| 103 | }
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[45a9cf4] | 104 | free(hw_resources.resources);
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[5d915b7] | 105 |
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[e247d83] | 106 | if (!io_found || !irq_found)
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| 107 | return ENOENT;
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[5d915b7] | 108 |
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[2d33eb5] | 109 | *io_reg_address = io_address;
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| 110 | *io_reg_size = io_size;
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| 111 | *irq_no = irq;
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[5d915b7] | 112 |
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[e247d83] | 113 | return EOK;
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[ea991e84] | 114 | }
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[5d915b7] | 115 | /*----------------------------------------------------------------------------*/
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[17ceb72] | 116 | /** Call the PCI driver with a request to enable interrupts
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[a7e2f0d] | 117 | *
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| 118 | * @param[in] device Device asking for interrupts
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| 119 | * @return Error code.
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| 120 | */
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[e247d83] | 121 | int pci_enable_interrupts(const ddf_dev_t *device)
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[fb78ae72] | 122 | {
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[79ae36dd] | 123 | async_sess_t *parent_sess =
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| 124 | devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle,
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| 125 | IPC_FLAG_BLOCKING);
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| 126 | if (!parent_sess)
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| 127 | return ENOMEM;
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[5d915b7] | 128 |
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[79ae36dd] | 129 | const bool enabled = hw_res_enable_interrupt(parent_sess);
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| 130 | async_hangup(parent_sess);
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[5d915b7] | 131 |
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[fb78ae72] | 132 | return enabled ? EOK : EIO;
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| 133 | }
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[5d915b7] | 134 | /*----------------------------------------------------------------------------*/
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[17ceb72] | 135 | /** Call the PCI driver with a request to clear legacy support register
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[a7e2f0d] | 136 | *
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| 137 | * @param[in] device Device asking to disable interrupts
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| 138 | * @return Error code.
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| 139 | */
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[e247d83] | 140 | int pci_disable_legacy(const ddf_dev_t *device)
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[ab414a6] | 141 | {
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| 142 | assert(device);
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[3afb758] | 143 |
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[79ae36dd] | 144 | async_sess_t *parent_sess =
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| 145 | devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle,
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| 146 | IPC_FLAG_BLOCKING);
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| 147 | if (!parent_sess)
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| 148 | return ENOMEM;
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[3afb758] | 149 |
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[ea993d18] | 150 | /* See UHCI design guide for these values p.45,
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[b375bb8] | 151 | * write all WC bits in USB legacy register */
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[e247d83] | 152 | const sysarg_t address = 0xc0;
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| 153 | const sysarg_t value = 0xaf00;
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[3afb758] | 154 |
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[79ae36dd] | 155 | async_exch_t *exch = async_exchange_begin(parent_sess);
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[3afb758] | 156 |
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[79ae36dd] | 157 | const int rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
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[ab414a6] | 158 | IPC_M_CONFIG_SPACE_WRITE_16, address, value);
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[3afb758] | 159 |
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[79ae36dd] | 160 | async_exchange_end(exch);
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| 161 | async_hangup(parent_sess);
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[3afb758] | 162 |
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[4b4e163] | 163 | return rc;
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[ab414a6] | 164 | }
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[ea991e84] | 165 |
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[c56dbe0] | 166 | /**
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| 167 | * @}
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| 168 | */
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