source: mainline/uspace/drv/bus/usb/uhci/hc.c@ 26858040

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 26858040 was 26858040, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

UHCI: Remove old way of generating irq code. Reshuffle initialization.
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File size: 15.8 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbuhcihc
29 * @{
30 */
31/** @file
32 * @brief UHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41
42#include "hc.h"
43
44#define UHCI_INTR_ALLOW_INTERRUPTS \
45 (UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET)
46#define UHCI_STATUS_USED_INTERRUPTS \
47 (UHCI_STATUS_INTERRUPT | UHCI_STATUS_ERROR_INTERRUPT)
48
49static const irq_cmd_t uhci_irq_commands[] =
50{
51 { .cmd = CMD_PIO_READ_16, .dstarg = 1, .addr = NULL/*filled later*/},
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2,
53 .value = UHCI_STATUS_USED_INTERRUPTS | UHCI_STATUS_NM_INTERRUPTS },
54 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
55 { .cmd = CMD_PIO_WRITE_A_16, .srcarg = 1, .addr = NULL/*filled later*/},
56 { .cmd = CMD_ACCEPT },
57};
58
59static int hc_init_transfer_lists(hc_t *instance);
60static int hc_init_mem_structures(hc_t *instance);
61static void hc_init_hw(hc_t *instance);
62
63static int hc_interrupt_emulator(void *arg);
64static int hc_debug_checker(void *arg);
65
66/*----------------------------------------------------------------------------*/
67/** Get number of commands used in IRQ code.
68 * @return Number of commands.
69 */
70size_t hc_irq_cmd_count(void)
71{
72 return sizeof(uhci_irq_commands) / sizeof(irq_cmd_t);
73}
74/*----------------------------------------------------------------------------*/
75/** Generate IRQ code commands.
76 * @param[out] cmds Place to store the commands.
77 * @param[in] cmd_size Size of the place (bytes).
78 * @param[in] regs Physical address of device's registers.
79 * @param[in] reg_size Size of the register area (bytes).
80 *
81 * @return Error code.
82 */
83int hc_get_irq_commands(
84 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
85{
86 if (cmd_size < sizeof(uhci_irq_commands)
87 || reg_size < sizeof(uhci_regs_t))
88 return EOVERFLOW;
89
90 uhci_regs_t *registers = (uhci_regs_t*)regs;
91
92 memcpy(cmds, uhci_irq_commands, sizeof(uhci_irq_commands));
93
94 cmds[0].addr = (void*)&registers->usbsts;
95 cmds[3].addr = (void*)&registers->usbsts;
96 return EOK;
97}
98/*----------------------------------------------------------------------------*/
99/** Initialize UHCI hc driver structure
100 *
101 * @param[in] instance Memory place to initialize.
102 * @param[in] regs Address of I/O control registers.
103 * @param[in] reg_size Size of I/O control registers.
104 * @param[in] interrupts True if hw interrupts should be used.
105 * @return Error code.
106 * @note Should be called only once on any structure.
107 *
108 * Initializes memory structures, starts up hw, and launches debugger and
109 * interrupt fibrils.
110 */
111int hc_init(hc_t *instance, void *regs, size_t reg_size, bool interrupts)
112{
113 assert(reg_size >= sizeof(uhci_regs_t));
114 int ret;
115
116#define CHECK_RET_RETURN(ret, message...) \
117 if (ret != EOK) { \
118 usb_log_error(message); \
119 return ret; \
120 } else (void) 0
121
122 instance->hw_interrupts = interrupts;
123 instance->hw_failures = 0;
124
125 /* allow access to hc control registers */
126 uhci_regs_t *io;
127 ret = pio_enable(regs, reg_size, (void **)&io);
128 CHECK_RET_RETURN(ret, "Failed to gain access to registers at %p: %s.\n",
129 io, str_error(ret));
130 instance->registers = io;
131 usb_log_debug(
132 "Device registers at %p (%zuB) accessible.\n", io, reg_size);
133
134 ret = hc_init_mem_structures(instance);
135 CHECK_RET_RETURN(ret,
136 "Failed to initialize UHCI memory structures: %s.\n",
137 str_error(ret));
138
139 hc_init_hw(instance);
140 if (!interrupts) {
141 instance->interrupt_emulator =
142 fibril_create(hc_interrupt_emulator, instance);
143 fibril_add_ready(instance->interrupt_emulator);
144 }
145 (void)hc_debug_checker;
146
147 return EOK;
148#undef CHECK_RET_DEST_FUN_RETURN
149}
150/*----------------------------------------------------------------------------*/
151/** Initialize UHCI hc hw resources.
152 *
153 * @param[in] instance UHCI structure to use.
154 * For magic values see UHCI Design Guide
155 */
156void hc_init_hw(hc_t *instance)
157{
158 assert(instance);
159 uhci_regs_t *registers = instance->registers;
160
161 /* Reset everything, who knows what touched it before us */
162 pio_write_16(&registers->usbcmd, UHCI_CMD_GLOBAL_RESET);
163 async_usleep(50000); /* 50ms according to USB spec(root hub reset) */
164 pio_write_16(&registers->usbcmd, 0);
165
166 /* Reset hc, all states and counters. Hope that hw is not broken */
167 pio_write_16(&registers->usbcmd, UHCI_CMD_HCRESET);
168 do { async_usleep(10); }
169 while ((pio_read_16(&registers->usbcmd) & UHCI_CMD_HCRESET) != 0);
170
171 /* Set frame to exactly 1ms */
172 pio_write_8(&registers->sofmod, 64);
173
174 /* Set frame list pointer */
175 const uint32_t pa = addr_to_phys(instance->frame_list);
176 pio_write_32(&registers->flbaseadd, pa);
177
178 if (instance->hw_interrupts) {
179 /* Enable all interrupts, but resume interrupt */
180 pio_write_16(&instance->registers->usbintr,
181 UHCI_INTR_ALLOW_INTERRUPTS);
182 }
183
184 const uint16_t cmd = pio_read_16(&registers->usbcmd);
185 if (cmd != 0)
186 usb_log_warning("Previous command value: %x.\n", cmd);
187
188 /* Start the hc with large(64B) packet FSBR */
189 pio_write_16(&registers->usbcmd,
190 UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET | UHCI_CMD_CONFIGURE);
191}
192/*----------------------------------------------------------------------------*/
193/** Initialize UHCI hc memory structures.
194 *
195 * @param[in] instance UHCI structure to use.
196 * @return Error code
197 * @note Should be called only once on any structure.
198 *
199 * Structures:
200 * - interrupt code (I/O addressses are customized per instance)
201 * - transfer lists (queue heads need to be accessible by the hw)
202 * - frame list page (needs to be one UHCI hw accessible 4K page)
203 */
204int hc_init_mem_structures(hc_t *instance)
205{
206 assert(instance);
207#define CHECK_RET_RETURN(ret, message...) \
208 if (ret != EOK) { \
209 usb_log_error(message); \
210 return ret; \
211 } else (void) 0
212
213 /* Init transfer lists */
214 int ret = hc_init_transfer_lists(instance);
215 CHECK_RET_RETURN(ret, "Failed to initialize transfer lists.\n");
216 usb_log_debug("Initialized transfer lists.\n");
217
218 /* Init device keeper */
219 usb_device_keeper_init(&instance->manager);
220 usb_log_debug("Initialized device keeper.\n");
221
222 ret = usb_endpoint_manager_init(&instance->ep_manager,
223 BANDWIDTH_AVAILABLE_USB11);
224 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
225 str_error(ret));
226
227 /* Init USB frame list page*/
228 instance->frame_list = get_page();
229 if (!instance->frame_list) {
230 usb_log_error("Failed to get frame list page.\n");
231 usb_endpoint_manager_destroy(&instance->ep_manager);
232 return ENOMEM;
233 }
234 usb_log_debug("Initialized frame list at %p.\n", instance->frame_list);
235
236 /* Set all frames to point to the first queue head */
237 const uint32_t queue = LINK_POINTER_QH(
238 addr_to_phys(instance->transfers_interrupt.queue_head));
239 unsigned i = 0;
240 for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
241 instance->frame_list[i] = queue;
242 }
243
244 return EOK;
245#undef CHECK_RET_RETURN
246}
247/*----------------------------------------------------------------------------*/
248/** Initialize UHCI hc transfer lists.
249 *
250 * @param[in] instance UHCI structure to use.
251 * @return Error code
252 * @note Should be called only once on any structure.
253 *
254 * Initializes transfer lists and sets them in one chain to support proper
255 * USB scheduling. Sets pointer table for quick access.
256 */
257int hc_init_transfer_lists(hc_t *instance)
258{
259 assert(instance);
260#define SETUP_TRANSFER_LIST(type, name) \
261do { \
262 int ret = transfer_list_init(&instance->transfers_##type, name); \
263 if (ret != EOK) { \
264 usb_log_error("Failed to setup %s transfer list: %s.\n", \
265 name, str_error(ret)); \
266 transfer_list_fini(&instance->transfers_bulk_full); \
267 transfer_list_fini(&instance->transfers_control_full); \
268 transfer_list_fini(&instance->transfers_control_slow); \
269 transfer_list_fini(&instance->transfers_interrupt); \
270 return ret; \
271 } \
272} while (0)
273
274 SETUP_TRANSFER_LIST(bulk_full, "BULK FULL");
275 SETUP_TRANSFER_LIST(control_full, "CONTROL FULL");
276 SETUP_TRANSFER_LIST(control_slow, "CONTROL LOW");
277 SETUP_TRANSFER_LIST(interrupt, "INTERRUPT");
278#undef SETUP_TRANSFER_LIST
279 /* Connect lists into one schedule */
280 transfer_list_set_next(&instance->transfers_control_full,
281 &instance->transfers_bulk_full);
282 transfer_list_set_next(&instance->transfers_control_slow,
283 &instance->transfers_control_full);
284 transfer_list_set_next(&instance->transfers_interrupt,
285 &instance->transfers_control_slow);
286
287 /*FSBR, This feature is not needed (adds no benefit) and is supposedly
288 * buggy on certain hw, enable at your own risk. */
289#ifdef FSBR
290 transfer_list_set_next(&instance->transfers_bulk_full,
291 &instance->transfers_control_full);
292#endif
293
294 /* Assign pointers to be used during scheduling */
295 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_INTERRUPT] =
296 &instance->transfers_interrupt;
297 instance->transfers[USB_SPEED_LOW][USB_TRANSFER_INTERRUPT] =
298 &instance->transfers_interrupt;
299 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_CONTROL] =
300 &instance->transfers_control_full;
301 instance->transfers[USB_SPEED_LOW][USB_TRANSFER_CONTROL] =
302 &instance->transfers_control_slow;
303 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_BULK] =
304 &instance->transfers_bulk_full;
305
306 return EOK;
307#undef CHECK_RET_CLEAR_RETURN
308}
309/*----------------------------------------------------------------------------*/
310/** Schedule batch for execution.
311 *
312 * @param[in] instance UHCI structure to use.
313 * @param[in] batch Transfer batch to schedule.
314 * @return Error code
315 *
316 * Checks for bandwidth availability and appends the batch to the proper queue.
317 */
318int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
319{
320 assert(instance);
321 assert(batch);
322
323 transfer_list_t *list =
324 instance->transfers[batch->ep->speed][batch->ep->transfer_type];
325 assert(list);
326 transfer_list_add_batch(list, batch);
327
328 return EOK;
329}
330/*----------------------------------------------------------------------------*/
331/** Take action based on the interrupt cause.
332 *
333 * @param[in] instance UHCI structure to use.
334 * @param[in] status Value of the status register at the time of interrupt.
335 *
336 * Interrupt might indicate:
337 * - transaction completed, either by triggering IOC, SPD, or an error
338 * - some kind of device error
339 * - resume from suspend state (not implemented)
340 */
341void hc_interrupt(hc_t *instance, uint16_t status)
342{
343 assert(instance);
344 /* Lower 2 bits are transaction error and transaction complete */
345 if (status & (UHCI_STATUS_INTERRUPT | UHCI_STATUS_ERROR_INTERRUPT)) {
346 LIST_INITIALIZE(done);
347 transfer_list_remove_finished(
348 &instance->transfers_interrupt, &done);
349 transfer_list_remove_finished(
350 &instance->transfers_control_slow, &done);
351 transfer_list_remove_finished(
352 &instance->transfers_control_full, &done);
353 transfer_list_remove_finished(
354 &instance->transfers_bulk_full, &done);
355
356 while (!list_empty(&done)) {
357 link_t *item = list_first(&done);
358 list_remove(item);
359 usb_transfer_batch_t *batch =
360 list_get_instance(item, usb_transfer_batch_t, link);
361 usb_transfer_batch_finish(batch);
362 }
363 }
364 /* Resume interrupts are not supported */
365 if (status & UHCI_STATUS_RESUME) {
366 usb_log_error("Resume interrupt!\n");
367 }
368
369 /* Bits 4 and 5 indicate hc error */
370 if (status & (UHCI_STATUS_PROCESS_ERROR | UHCI_STATUS_SYSTEM_ERROR)) {
371 usb_log_error("UHCI hardware failure!.\n");
372 ++instance->hw_failures;
373 transfer_list_abort_all(&instance->transfers_interrupt);
374 transfer_list_abort_all(&instance->transfers_control_slow);
375 transfer_list_abort_all(&instance->transfers_control_full);
376 transfer_list_abort_all(&instance->transfers_bulk_full);
377
378 if (instance->hw_failures < UHCI_ALLOWED_HW_FAIL) {
379 /* reinitialize hw, this triggers virtual disconnect*/
380 hc_init_hw(instance);
381 } else {
382 usb_log_fatal("Too many UHCI hardware failures!.\n");
383 hc_fini(instance);
384 }
385 }
386}
387/*----------------------------------------------------------------------------*/
388/** Polling function, emulates interrupts.
389 *
390 * @param[in] arg UHCI hc structure to use.
391 * @return EOK (should never return)
392 */
393int hc_interrupt_emulator(void* arg)
394{
395 usb_log_debug("Started interrupt emulator.\n");
396 hc_t *instance = arg;
397 assert(instance);
398
399 while (1) {
400 /* Read and clear status register */
401 uint16_t status = pio_read_16(&instance->registers->usbsts);
402 pio_write_16(&instance->registers->usbsts, status);
403 if (status != 0)
404 usb_log_debug2("UHCI status: %x.\n", status);
405// Qemu fails to report stalled communication
406// see https://bugs.launchpad.net/qemu/+bug/757654
407// This is a simple workaround to force queue processing every time
408 // status |= 1;
409 hc_interrupt(instance, status);
410 async_usleep(UHCI_INT_EMULATOR_TIMEOUT);
411 }
412 return EOK;
413}
414/*---------------------------------------------------------------------------*/
415/** Debug function, checks consistency of memory structures.
416 *
417 * @param[in] arg UHCI structure to use.
418 * @return EOK (should never return)
419 */
420int hc_debug_checker(void *arg)
421{
422 hc_t *instance = arg;
423 assert(instance);
424
425#define QH(queue) \
426 instance->transfers_##queue.queue_head
427
428 while (1) {
429 const uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
430 const uint16_t sts = pio_read_16(&instance->registers->usbsts);
431 const uint16_t intr =
432 pio_read_16(&instance->registers->usbintr);
433
434 if (((cmd & UHCI_CMD_RUN_STOP) != 1) || (sts != 0)) {
435 usb_log_debug2("Command: %X Status: %X Intr: %x\n",
436 cmd, sts, intr);
437 }
438
439 const uintptr_t frame_list =
440 pio_read_32(&instance->registers->flbaseadd) & ~0xfff;
441 if (frame_list != addr_to_phys(instance->frame_list)) {
442 usb_log_debug("Framelist address: %p vs. %p.\n",
443 (void *) frame_list,
444 (void *) addr_to_phys(instance->frame_list));
445 }
446
447 int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
448
449 uintptr_t expected_pa = instance->frame_list[frnum]
450 & LINK_POINTER_ADDRESS_MASK;
451 uintptr_t real_pa = addr_to_phys(QH(interrupt));
452 if (expected_pa != real_pa) {
453 usb_log_debug("Interrupt QH: %p (frame %d) vs. %p.\n",
454 (void *) expected_pa, frnum, (void *) real_pa);
455 }
456
457 expected_pa = QH(interrupt)->next & LINK_POINTER_ADDRESS_MASK;
458 real_pa = addr_to_phys(QH(control_slow));
459 if (expected_pa != real_pa) {
460 usb_log_debug("Control Slow QH: %p vs. %p.\n",
461 (void *) expected_pa, (void *) real_pa);
462 }
463
464 expected_pa = QH(control_slow)->next & LINK_POINTER_ADDRESS_MASK;
465 real_pa = addr_to_phys(QH(control_full));
466 if (expected_pa != real_pa) {
467 usb_log_debug("Control Full QH: %p vs. %p.\n",
468 (void *) expected_pa, (void *) real_pa);
469 }
470
471 expected_pa = QH(control_full)->next & LINK_POINTER_ADDRESS_MASK;
472 real_pa = addr_to_phys(QH(bulk_full));
473 if (expected_pa != real_pa ) {
474 usb_log_debug("Bulk QH: %p vs. %p.\n",
475 (void *) expected_pa, (void *) real_pa);
476 }
477 async_usleep(UHCI_DEBUGER_TIMEOUT);
478 }
479 return EOK;
480#undef QH
481}
482/**
483 * @}
484 */
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