source: mainline/uspace/drv/bus/usb/ohci/ohci_bus.c@ eb862fd

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since eb862fd was e67c50a, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

ohci: use dma memory responsibly

Instead of leaving arbitrary TD behind to be used by next transfer,
prepare two of them in endpoint and use them in a cyclic manner. This
reduces the number of pages allocated per transfer to one.

  • Property mode set to 100644
File size: 5.4 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbohci
30 * @{
31 */
32/** @file
33 * @brief OHCI driver
34 */
35
36#include <assert.h>
37#include <stdlib.h>
38#include <usb/host/utils/malloc32.h>
39#include <usb/host/bandwidth.h>
40
41#include "ohci_bus.h"
42#include "ohci_batch.h"
43#include "hc.h"
44
45/**
46 * Callback to reset toggle on ED.
47 *
48 * @param[in] hcd_ep hcd endpoint structure
49 * @param[in] toggle new value of toggle bit
50 */
51void ohci_ep_toggle_reset(endpoint_t *ep)
52{
53 ohci_endpoint_t *instance = ohci_endpoint_get(ep);
54 assert(instance);
55 assert(instance->ed);
56 ed_toggle_set(instance->ed, 0);
57}
58
59static int ohci_device_enumerate(device_t *dev)
60{
61 ohci_bus_t *bus = (ohci_bus_t *) dev->bus;
62 return usb2_bus_device_enumerate(&bus->helper, dev);
63}
64
65static void ohci_device_gone(device_t *dev)
66{
67 ohci_bus_t *bus = (ohci_bus_t *) dev->bus;
68 usb2_bus_device_gone(&bus->helper, dev);
69}
70
71/** Creates new hcd endpoint representation.
72 */
73static endpoint_t *ohci_endpoint_create(device_t *dev, const usb_endpoint_descriptors_t *desc)
74{
75 assert(dev);
76
77 ohci_endpoint_t *ohci_ep = calloc(1, sizeof(ohci_endpoint_t));
78 if (ohci_ep == NULL)
79 return NULL;
80
81 endpoint_init(&ohci_ep->base, dev, desc);
82
83 const errno_t err = dma_buffer_alloc(&ohci_ep->dma_buffer, sizeof(ed_t) + 2 * sizeof(td_t));
84 if (err) {
85 free(ohci_ep);
86 return NULL;
87 }
88
89 ohci_ep->ed = ohci_ep->dma_buffer.virt;
90
91 ohci_ep->tds[0] = (td_t *) ohci_ep->ed + 1;
92 ohci_ep->tds[1] = ohci_ep->tds[0] + 1;
93
94 link_initialize(&ohci_ep->eplist_link);
95 link_initialize(&ohci_ep->pending_link);
96 return &ohci_ep->base;
97}
98
99/** Disposes hcd endpoint structure
100 *
101 * @param[in] hcd driver using this instance.
102 * @param[in] ep endpoint structure.
103 */
104static void ohci_endpoint_destroy(endpoint_t *ep)
105{
106 assert(ep);
107 ohci_endpoint_t *instance = ohci_endpoint_get(ep);
108
109 dma_buffer_free(&instance->dma_buffer);
110 free(instance);
111}
112
113
114static int ohci_register_ep(endpoint_t *ep)
115{
116 bus_t *bus_base = endpoint_get_bus(ep);
117 ohci_bus_t *bus = (ohci_bus_t *) bus_base;
118 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
119
120 const int err = usb2_bus_endpoint_register(&bus->helper, ep);
121 if (err)
122 return err;
123
124 ed_init(ohci_ep->ed, ep, ohci_ep->tds[0]);
125 hc_enqueue_endpoint(bus->hc, ep);
126 endpoint_set_online(ep, &bus->hc->guard);
127
128 return EOK;
129}
130
131static void ohci_unregister_ep(endpoint_t *ep)
132{
133 ohci_bus_t * const bus = (ohci_bus_t *) endpoint_get_bus(ep);
134 hc_t * const hc = bus->hc;
135 assert(ep);
136
137 usb2_bus_endpoint_unregister(&bus->helper, ep);
138 hc_dequeue_endpoint(bus->hc, ep);
139
140 /*
141 * Now we can be sure the active transfer will not be completed,
142 * as it's out of the schedule, and HC acknowledged it.
143 */
144
145 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
146
147 fibril_mutex_lock(&hc->guard);
148 endpoint_set_offline_locked(ep);
149 list_remove(&ohci_ep->pending_link);
150 usb_transfer_batch_t * const batch = ep->active_batch;
151 endpoint_deactivate_locked(ep);
152 fibril_mutex_unlock(&hc->guard);
153
154 if (batch) {
155 batch->error = EINTR;
156 batch->transferred_size = 0;
157 usb_transfer_batch_finish(batch);
158 }
159}
160
161static usb_transfer_batch_t *ohci_create_batch(endpoint_t *ep)
162{
163 ohci_transfer_batch_t *batch = ohci_transfer_batch_create(ep);
164 return &batch->base;
165}
166
167static void ohci_destroy_batch(usb_transfer_batch_t *batch)
168{
169 ohci_transfer_batch_destroy(ohci_transfer_batch_get(batch));
170}
171
172static const bus_ops_t ohci_bus_ops = {
173 .interrupt = ohci_hc_interrupt,
174 .status = ohci_hc_status,
175
176 .device_enumerate = ohci_device_enumerate,
177 .device_gone = ohci_device_gone,
178
179 .endpoint_destroy = ohci_endpoint_destroy,
180 .endpoint_create = ohci_endpoint_create,
181 .endpoint_register = ohci_register_ep,
182 .endpoint_unregister = ohci_unregister_ep,
183
184 .batch_create = ohci_create_batch,
185 .batch_destroy = ohci_destroy_batch,
186 .batch_schedule = ohci_hc_schedule,
187};
188
189
190int ohci_bus_init(ohci_bus_t *bus, hc_t *hc)
191{
192 assert(hc);
193 assert(bus);
194
195 bus_t *bus_base = (bus_t *) bus;
196 bus_init(bus_base, sizeof(device_t));
197 bus_base->ops = &ohci_bus_ops;
198
199 usb2_bus_helper_init(&bus->helper, &bandwidth_accounting_usb11);
200
201 bus->hc = hc;
202
203 return EOK;
204}
205
206/**
207 * @}
208 */
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