source: mainline/uspace/drv/bus/usb/ohci/ohci_bus.c@ bb97118

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since bb97118 was 09ab0a9a, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Fix vertical spacing with new Ccheck revision.

  • Property mode set to 100644
File size: 5.4 KB
RevLine 
[2759c52]1/*
2 * Copyright (c) 2011 Jan Vesely
[e0a5d4c]3 * Copyright (c) 2018 Ondrej Hlavaty
[2759c52]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
[58563585]29
[2759c52]30/** @addtogroup drvusbohci
31 * @{
32 */
33/** @file
34 * @brief OHCI driver
35 */
[0d4b110]36
37#include <assert.h>
38#include <stdlib.h>
[2dbfe44]39#include <usb/host/utils/malloc32.h>
[e6b9182]40#include <usb/host/bandwidth.h>
[0d4b110]41
[e6b9182]42#include "ohci_bus.h"
[5fd9c30]43#include "ohci_batch.h"
[620c710]44#include "hc.h"
[2759c52]45
[c6f82e5]46/**
47 * Callback to reset toggle on ED.
[02cacce]48 *
49 * @param[in] hcd_ep hcd endpoint structure
50 * @param[in] toggle new value of toggle bit
51 */
[c6f82e5]52void ohci_ep_toggle_reset(endpoint_t *ep)
[545764b]53{
[e6b9182]54 ohci_endpoint_t *instance = ohci_endpoint_get(ep);
[545764b]55 assert(instance);
56 assert(instance->ed);
[56257ba]57 ed_toggle_set(instance->ed, 0);
[545764b]58}
[76fbd9a]59
[d369b3b]60static int ohci_device_enumerate(device_t *dev)
61{
62 ohci_bus_t *bus = (ohci_bus_t *) dev->bus;
63 return usb2_bus_device_enumerate(&bus->helper, dev);
64}
65
[f3ae58b]66static void ohci_device_gone(device_t *dev)
67{
68 ohci_bus_t *bus = (ohci_bus_t *) dev->bus;
69 usb2_bus_device_gone(&bus->helper, dev);
70}
71
[02cacce]72/** Creates new hcd endpoint representation.
73 */
[ae3a941]74static endpoint_t *ohci_endpoint_create(device_t *dev,
75 const usb_endpoint_descriptors_t *desc)
[2759c52]76{
[6832245]77 assert(dev);
[e6b9182]78
[e67c50a]79 ohci_endpoint_t *ohci_ep = calloc(1, sizeof(ohci_endpoint_t));
[e20eaed]80 if (ohci_ep == NULL)
[e6b9182]81 return NULL;
[2759c52]82
[6832245]83 endpoint_init(&ohci_ep->base, dev, desc);
[741bcdeb]84
[ae3a941]85 const errno_t err = dma_buffer_alloc(&ohci_ep->dma_buffer,
86 sizeof(ed_t) + 2 * sizeof(td_t));
[e67c50a]87 if (err) {
[e20eaed]88 free(ohci_ep);
[e6b9182]89 return NULL;
[2759c52]90 }
91
[e67c50a]92 ohci_ep->ed = ohci_ep->dma_buffer.virt;
93
94 ohci_ep->tds[0] = (td_t *) ohci_ep->ed + 1;
95 ohci_ep->tds[1] = ohci_ep->tds[0] + 1;
[2759c52]96
[d60115a]97 link_initialize(&ohci_ep->eplist_link);
98 link_initialize(&ohci_ep->pending_link);
[5995383c]99 return &ohci_ep->base;
[2759c52]100}
[76fbd9a]101
[48ae3ef]102/** Disposes hcd endpoint structure
103 *
[57e06ef]104 * @param[in] hcd driver using this instance.
105 * @param[in] ep endpoint structure.
[48ae3ef]106 */
[e6b9182]107static void ohci_endpoint_destroy(endpoint_t *ep)
[48ae3ef]108{
109 assert(ep);
110 ohci_endpoint_t *instance = ohci_endpoint_get(ep);
[e6b9182]111
[e67c50a]112 dma_buffer_free(&instance->dma_buffer);
[e6b9182]113 free(instance);
114}
115
[6832245]116static int ohci_register_ep(endpoint_t *ep)
[e6b9182]117{
[6832245]118 bus_t *bus_base = endpoint_get_bus(ep);
[e6b9182]119 ohci_bus_t *bus = (ohci_bus_t *) bus_base;
120 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
121
[d369b3b]122 const int err = usb2_bus_endpoint_register(&bus->helper, ep);
[e6b9182]123 if (err)
124 return err;
125
[e67c50a]126 ed_init(ohci_ep->ed, ep, ohci_ep->tds[0]);
[e6b9182]127 hc_enqueue_endpoint(bus->hc, ep);
[4db49344]128 endpoint_set_online(ep, &bus->hc->guard);
[e6b9182]129
130 return EOK;
131}
132
[bad4a05]133static void ohci_unregister_ep(endpoint_t *ep)
[e6b9182]134{
[3bacee1]135 ohci_bus_t *const bus = (ohci_bus_t *) endpoint_get_bus(ep);
136 hc_t *const hc = bus->hc;
[e6b9182]137 assert(ep);
138
[d369b3b]139 usb2_bus_endpoint_unregister(&bus->helper, ep);
[e6b9182]140 hc_dequeue_endpoint(bus->hc, ep);
[d60115a]141
142 /*
[4db49344]143 * Now we can be sure the active transfer will not be completed,
144 * as it's out of the schedule, and HC acknowledged it.
[d60115a]145 */
[4db49344]146
147 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
148
[d60115a]149 fibril_mutex_lock(&hc->guard);
[4db49344]150 endpoint_set_offline_locked(ep);
[d60115a]151 list_remove(&ohci_ep->pending_link);
[3bacee1]152 usb_transfer_batch_t *const batch = ep->active_batch;
[d60115a]153 endpoint_deactivate_locked(ep);
[4db49344]154 fibril_mutex_unlock(&hc->guard);
[d60115a]155
156 if (batch) {
157 batch->error = EINTR;
[db51a6a6]158 batch->transferred_size = 0;
[d60115a]159 usb_transfer_batch_finish(batch);
160 }
[5fd9c30]161}
162
[6832245]163static usb_transfer_batch_t *ohci_create_batch(endpoint_t *ep)
[5fd9c30]164{
165 ohci_transfer_batch_t *batch = ohci_transfer_batch_create(ep);
166 return &batch->base;
167}
[e6b9182]168
[6832245]169static void ohci_destroy_batch(usb_transfer_batch_t *batch)
[5fd9c30]170{
171 ohci_transfer_batch_destroy(ohci_transfer_batch_get(batch));
[e6b9182]172}
173
[6832245]174static const bus_ops_t ohci_bus_ops = {
[32fb6bce]175 .interrupt = ohci_hc_interrupt,
176 .status = ohci_hc_status,
177
[d369b3b]178 .device_enumerate = ohci_device_enumerate,
[f3ae58b]179 .device_gone = ohci_device_gone,
[d369b3b]180
[6832245]181 .endpoint_destroy = ohci_endpoint_destroy,
182 .endpoint_create = ohci_endpoint_create,
183 .endpoint_register = ohci_register_ep,
184 .endpoint_unregister = ohci_unregister_ep,
[c6f82e5]185
[6832245]186 .batch_create = ohci_create_batch,
187 .batch_destroy = ohci_destroy_batch,
[32fb6bce]188 .batch_schedule = ohci_hc_schedule,
[6832245]189};
190
[32fb6bce]191int ohci_bus_init(ohci_bus_t *bus, hc_t *hc)
[e6b9182]192{
193 assert(hc);
194 assert(bus);
195
[6832245]196 bus_t *bus_base = (bus_t *) bus;
[d369b3b]197 bus_init(bus_base, sizeof(device_t));
[6832245]198 bus_base->ops = &ohci_bus_ops;
[5fd9c30]199
[d369b3b]200 usb2_bus_helper_init(&bus->helper, &bandwidth_accounting_usb11);
201
[5995383c]202 bus->hc = hc;
203
[e6b9182]204 return EOK;
[48ae3ef]205}
[58563585]206
[2759c52]207/**
208 * @}
209 */
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