[2759c52] | 1 | /*
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| 2 | * Copyright (c) 2011 Jan Vesely
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[e0a5d4c] | 3 | * Copyright (c) 2018 Ondrej Hlavaty
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[2759c52] | 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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[58563585] | 29 |
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[2759c52] | 30 | /** @addtogroup drvusbohci
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| 31 | * @{
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| 32 | */
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| 33 | /** @file
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| 34 | * @brief OHCI driver
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| 35 | */
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[0d4b110] | 36 |
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| 37 | #include <assert.h>
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| 38 | #include <stdlib.h>
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[2dbfe44] | 39 | #include <usb/host/utils/malloc32.h>
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[e6b9182] | 40 | #include <usb/host/bandwidth.h>
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[0d4b110] | 41 |
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[e6b9182] | 42 | #include "ohci_bus.h"
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[5fd9c30] | 43 | #include "ohci_batch.h"
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[620c710] | 44 | #include "hc.h"
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[2759c52] | 45 |
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[c6f82e5] | 46 | /**
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| 47 | * Callback to reset toggle on ED.
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[02cacce] | 48 | *
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| 49 | * @param[in] hcd_ep hcd endpoint structure
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| 50 | * @param[in] toggle new value of toggle bit
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| 51 | */
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[c6f82e5] | 52 | void ohci_ep_toggle_reset(endpoint_t *ep)
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[545764b] | 53 | {
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[e6b9182] | 54 | ohci_endpoint_t *instance = ohci_endpoint_get(ep);
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[545764b] | 55 | assert(instance);
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| 56 | assert(instance->ed);
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[56257ba] | 57 | ed_toggle_set(instance->ed, 0);
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[545764b] | 58 | }
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[76fbd9a] | 59 |
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[d369b3b] | 60 | static int ohci_device_enumerate(device_t *dev)
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| 61 | {
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| 62 | ohci_bus_t *bus = (ohci_bus_t *) dev->bus;
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| 63 | return usb2_bus_device_enumerate(&bus->helper, dev);
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| 64 | }
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| 65 |
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[f3ae58b] | 66 | static void ohci_device_gone(device_t *dev)
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| 67 | {
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| 68 | ohci_bus_t *bus = (ohci_bus_t *) dev->bus;
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| 69 | usb2_bus_device_gone(&bus->helper, dev);
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| 70 | }
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| 71 |
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[02cacce] | 72 | /** Creates new hcd endpoint representation.
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| 73 | */
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[ae3a941] | 74 | static endpoint_t *ohci_endpoint_create(device_t *dev,
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| 75 | const usb_endpoint_descriptors_t *desc)
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[2759c52] | 76 | {
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[6832245] | 77 | assert(dev);
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[e6b9182] | 78 |
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[e67c50a] | 79 | ohci_endpoint_t *ohci_ep = calloc(1, sizeof(ohci_endpoint_t));
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[e20eaed] | 80 | if (ohci_ep == NULL)
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[e6b9182] | 81 | return NULL;
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[2759c52] | 82 |
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[6832245] | 83 | endpoint_init(&ohci_ep->base, dev, desc);
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[741bcdeb] | 84 |
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[ae3a941] | 85 | const errno_t err = dma_buffer_alloc(&ohci_ep->dma_buffer,
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| 86 | sizeof(ed_t) + 2 * sizeof(td_t));
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[e67c50a] | 87 | if (err) {
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[e20eaed] | 88 | free(ohci_ep);
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[e6b9182] | 89 | return NULL;
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[2759c52] | 90 | }
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| 91 |
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[e67c50a] | 92 | ohci_ep->ed = ohci_ep->dma_buffer.virt;
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| 93 |
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| 94 | ohci_ep->tds[0] = (td_t *) ohci_ep->ed + 1;
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| 95 | ohci_ep->tds[1] = ohci_ep->tds[0] + 1;
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[2759c52] | 96 |
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[d60115a] | 97 | link_initialize(&ohci_ep->eplist_link);
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| 98 | link_initialize(&ohci_ep->pending_link);
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[5995383c] | 99 | return &ohci_ep->base;
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[2759c52] | 100 | }
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[76fbd9a] | 101 |
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[48ae3ef] | 102 | /** Disposes hcd endpoint structure
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| 103 | *
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[57e06ef] | 104 | * @param[in] hcd driver using this instance.
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| 105 | * @param[in] ep endpoint structure.
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[48ae3ef] | 106 | */
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[e6b9182] | 107 | static void ohci_endpoint_destroy(endpoint_t *ep)
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[48ae3ef] | 108 | {
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| 109 | assert(ep);
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| 110 | ohci_endpoint_t *instance = ohci_endpoint_get(ep);
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[e6b9182] | 111 |
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[e67c50a] | 112 | dma_buffer_free(&instance->dma_buffer);
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[e6b9182] | 113 | free(instance);
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| 114 | }
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| 115 |
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| 116 |
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[6832245] | 117 | static int ohci_register_ep(endpoint_t *ep)
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[e6b9182] | 118 | {
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[6832245] | 119 | bus_t *bus_base = endpoint_get_bus(ep);
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[e6b9182] | 120 | ohci_bus_t *bus = (ohci_bus_t *) bus_base;
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| 121 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
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| 122 |
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[d369b3b] | 123 | const int err = usb2_bus_endpoint_register(&bus->helper, ep);
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[e6b9182] | 124 | if (err)
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| 125 | return err;
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| 126 |
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[e67c50a] | 127 | ed_init(ohci_ep->ed, ep, ohci_ep->tds[0]);
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[e6b9182] | 128 | hc_enqueue_endpoint(bus->hc, ep);
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[4db49344] | 129 | endpoint_set_online(ep, &bus->hc->guard);
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[e6b9182] | 130 |
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| 131 | return EOK;
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| 132 | }
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| 133 |
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[bad4a05] | 134 | static void ohci_unregister_ep(endpoint_t *ep)
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[e6b9182] | 135 | {
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[d60115a] | 136 | ohci_bus_t * const bus = (ohci_bus_t *) endpoint_get_bus(ep);
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| 137 | hc_t * const hc = bus->hc;
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[e6b9182] | 138 | assert(ep);
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| 139 |
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[d369b3b] | 140 | usb2_bus_endpoint_unregister(&bus->helper, ep);
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[e6b9182] | 141 | hc_dequeue_endpoint(bus->hc, ep);
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[d60115a] | 142 |
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| 143 | /*
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[4db49344] | 144 | * Now we can be sure the active transfer will not be completed,
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| 145 | * as it's out of the schedule, and HC acknowledged it.
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[d60115a] | 146 | */
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[4db49344] | 147 |
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| 148 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
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| 149 |
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[d60115a] | 150 | fibril_mutex_lock(&hc->guard);
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[4db49344] | 151 | endpoint_set_offline_locked(ep);
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[d60115a] | 152 | list_remove(&ohci_ep->pending_link);
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| 153 | usb_transfer_batch_t * const batch = ep->active_batch;
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| 154 | endpoint_deactivate_locked(ep);
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[4db49344] | 155 | fibril_mutex_unlock(&hc->guard);
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[d60115a] | 156 |
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| 157 | if (batch) {
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| 158 | batch->error = EINTR;
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[db51a6a6] | 159 | batch->transferred_size = 0;
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[d60115a] | 160 | usb_transfer_batch_finish(batch);
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| 161 | }
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[5fd9c30] | 162 | }
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| 163 |
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[6832245] | 164 | static usb_transfer_batch_t *ohci_create_batch(endpoint_t *ep)
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[5fd9c30] | 165 | {
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| 166 | ohci_transfer_batch_t *batch = ohci_transfer_batch_create(ep);
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| 167 | return &batch->base;
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| 168 | }
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[e6b9182] | 169 |
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[6832245] | 170 | static void ohci_destroy_batch(usb_transfer_batch_t *batch)
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[5fd9c30] | 171 | {
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| 172 | ohci_transfer_batch_destroy(ohci_transfer_batch_get(batch));
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[e6b9182] | 173 | }
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| 174 |
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[6832245] | 175 | static const bus_ops_t ohci_bus_ops = {
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[32fb6bce] | 176 | .interrupt = ohci_hc_interrupt,
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| 177 | .status = ohci_hc_status,
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| 178 |
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[d369b3b] | 179 | .device_enumerate = ohci_device_enumerate,
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[f3ae58b] | 180 | .device_gone = ohci_device_gone,
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[d369b3b] | 181 |
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[6832245] | 182 | .endpoint_destroy = ohci_endpoint_destroy,
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| 183 | .endpoint_create = ohci_endpoint_create,
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| 184 | .endpoint_register = ohci_register_ep,
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| 185 | .endpoint_unregister = ohci_unregister_ep,
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[c6f82e5] | 186 |
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[6832245] | 187 | .batch_create = ohci_create_batch,
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| 188 | .batch_destroy = ohci_destroy_batch,
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[32fb6bce] | 189 | .batch_schedule = ohci_hc_schedule,
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[6832245] | 190 | };
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| 191 |
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| 192 |
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[32fb6bce] | 193 | int ohci_bus_init(ohci_bus_t *bus, hc_t *hc)
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[e6b9182] | 194 | {
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| 195 | assert(hc);
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| 196 | assert(bus);
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| 197 |
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[6832245] | 198 | bus_t *bus_base = (bus_t *) bus;
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[d369b3b] | 199 | bus_init(bus_base, sizeof(device_t));
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[6832245] | 200 | bus_base->ops = &ohci_bus_ops;
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[5fd9c30] | 201 |
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[d369b3b] | 202 | usb2_bus_helper_init(&bus->helper, &bandwidth_accounting_usb11);
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| 203 |
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[5995383c] | 204 | bus->hc = hc;
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| 205 |
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[e6b9182] | 206 | return EOK;
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[48ae3ef] | 207 | }
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[58563585] | 208 |
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[2759c52] | 209 | /**
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| 210 | * @}
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| 211 | */
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