| 1 | /*
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| 2 | * Copyright (c) 2011 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbohci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief OHCI driver USB transaction structure
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| 34 | */
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| 35 |
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| 36 | #include <assert.h>
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| 37 | #include <errno.h>
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| 38 | #include <macros.h>
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| 39 | #include <mem.h>
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| 40 | #include <stdbool.h>
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| 41 |
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| 42 | #include <usb/usb.h>
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| 43 | #include <usb/debug.h>
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| 44 | #include <usb/host/utils/malloc32.h>
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| 45 |
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| 46 | #include "ohci_batch.h"
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| 47 | #include "ohci_bus.h"
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| 48 |
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| 49 | static void (*const batch_setup[])(ohci_transfer_batch_t*);
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| 50 |
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| 51 | /** Safely destructs ohci_transfer_batch_t structure
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| 52 | *
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| 53 | * @param[in] ohci_batch Instance to destroy.
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| 54 | */
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| 55 | void ohci_transfer_batch_destroy(ohci_transfer_batch_t *ohci_batch)
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| 56 | {
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| 57 | assert(ohci_batch);
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| 58 | dma_buffer_free(&ohci_batch->ohci_dma_buffer);
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| 59 | free(ohci_batch);
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| 60 | }
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| 61 |
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| 62 | /** Allocate memory and initialize internal data structure.
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| 63 | *
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| 64 | * @param[in] ep Endpoint for which the batch will be created
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| 65 | * @return Valid pointer if all structures were successfully created,
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| 66 | * NULL otherwise.
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| 67 | */
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| 68 | ohci_transfer_batch_t * ohci_transfer_batch_create(endpoint_t *ep)
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| 69 | {
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| 70 | assert(ep);
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| 71 |
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| 72 | ohci_transfer_batch_t *ohci_batch =
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| 73 | calloc(1, sizeof(ohci_transfer_batch_t));
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| 74 | if (!ohci_batch) {
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| 75 | usb_log_error("Failed to allocate OHCI batch data.");
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| 76 | return NULL;
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| 77 | }
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| 78 |
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| 79 | usb_transfer_batch_init(&ohci_batch->base, ep);
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| 80 |
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| 81 | return ohci_batch;
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| 82 | }
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| 83 |
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| 84 | /** Prepares a batch to be sent.
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| 85 | *
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| 86 | * Determines the number of needed transfer descriptors (TDs).
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| 87 | * Prepares a transport buffer (that is accessible by the hardware).
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| 88 | * Initializes parameters needed for the transfer and callback.
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| 89 | */
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| 90 | int ohci_transfer_batch_prepare(ohci_transfer_batch_t *ohci_batch)
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| 91 | {
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| 92 | assert(ohci_batch);
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| 93 | usb_transfer_batch_t *usb_batch = &ohci_batch->base;
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| 94 |
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| 95 | if (!batch_setup[usb_batch->ep->transfer_type])
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| 96 | return ENOTSUP;
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| 97 |
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| 98 | ohci_batch->td_count = (usb_batch->buffer_size + OHCI_TD_MAX_TRANSFER - 1)
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| 99 | / OHCI_TD_MAX_TRANSFER;
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| 100 | /* Control transfer need Setup and Status stage */
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| 101 | if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
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| 102 | ohci_batch->td_count += 2;
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| 103 | }
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| 104 |
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| 105 | /* Alloc one more to NULL terminate */
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| 106 | ohci_batch->tds = calloc(ohci_batch->td_count + 1, sizeof(td_t *));
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| 107 | if (!ohci_batch->tds)
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| 108 | return ENOMEM;
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| 109 |
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| 110 | const size_t td_size = ohci_batch->td_count * sizeof(td_t);
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| 111 | const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL)
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| 112 | ? USB_SETUP_PACKET_SIZE
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| 113 | : 0;
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| 114 |
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| 115 | if (dma_buffer_alloc(&ohci_batch->ohci_dma_buffer, td_size + setup_size + usb_batch->buffer_size)) {
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| 116 | usb_log_error("Failed to allocate OHCI DMA buffer.");
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| 117 | return ENOMEM;
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| 118 | }
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| 119 |
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| 120 | td_t *tds = ohci_batch->ohci_dma_buffer.virt;
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| 121 |
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| 122 | for (size_t i = 0; i < ohci_batch->td_count; i++)
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| 123 | ohci_batch->tds[i] = &tds[i];
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| 124 |
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| 125 | /* Presence of this terminator makes TD initialization easier */
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| 126 | ohci_batch->tds[ohci_batch->td_count] = NULL;
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| 127 |
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| 128 | ohci_batch->setup_buffer = (void *) (&tds[ohci_batch->td_count]);
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| 129 | memcpy(ohci_batch->setup_buffer, usb_batch->setup.buffer, setup_size);
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| 130 |
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| 131 | ohci_batch->data_buffer = ohci_batch->setup_buffer + setup_size;
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| 132 | if (usb_batch->dir == USB_DIRECTION_OUT)
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| 133 | memcpy(ohci_batch->data_buffer, usb_batch->buffer, usb_batch->buffer_size);
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| 134 |
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| 135 | batch_setup[usb_batch->ep->transfer_type](ohci_batch);
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| 136 |
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| 137 | return EOK;
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| 138 | }
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| 139 |
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| 140 | /** Check batch TDs' status.
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| 141 | *
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| 142 | * @param[in] ohci_batch Batch structure to use.
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| 143 | * @return False, if there is an active TD, true otherwise.
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| 144 | *
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| 145 | * Walk all TDs (usually there is just one). Stop with false if there is an
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| 146 | * active TD. Stop with true if an error is found. Return true if the walk
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| 147 | * completes with the last TD.
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| 148 | */
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| 149 | bool ohci_transfer_batch_check_completed(ohci_transfer_batch_t *ohci_batch)
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| 150 | {
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| 151 | assert(ohci_batch);
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| 152 |
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| 153 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ohci_batch->base.ep);
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| 154 | assert(ohci_ep);
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| 155 |
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| 156 | usb_log_debug("Batch %p checking %zu td(s) for completion.",
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| 157 | &ohci_batch->base, ohci_batch->td_count);
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| 158 | usb_log_debug2("ED: %08x:%08x:%08x:%08x.",
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| 159 | ohci_ep->ed->status, ohci_ep->ed->td_head,
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| 160 | ohci_ep->ed->td_tail, ohci_ep->ed->next);
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| 161 |
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| 162 | if (!ed_inactive(ohci_ep->ed) && ed_transfer_pending(ohci_ep->ed))
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| 163 | return false;
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| 164 |
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| 165 | /* Now we may be sure that either the ED is inactive because of errors
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| 166 | * or all transfer descriptors completed successfully */
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| 167 |
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| 168 | /* Assume all data got through */
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| 169 | ohci_batch->base.transferred_size = ohci_batch->base.buffer_size;
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| 170 |
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| 171 | /* Check all TDs */
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| 172 | for (size_t i = 0; i < ohci_batch->td_count; ++i) {
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| 173 | assert(ohci_batch->tds[i] != NULL);
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| 174 | usb_log_debug("TD %zu: %08x:%08x:%08x:%08x.", i,
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| 175 | ohci_batch->tds[i]->status, ohci_batch->tds[i]->cbp,
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| 176 | ohci_batch->tds[i]->next, ohci_batch->tds[i]->be);
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| 177 |
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| 178 | ohci_batch->base.error = td_error(ohci_batch->tds[i]);
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| 179 | if (ohci_batch->base.error == EOK) {
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| 180 | /* If the TD got all its data through, it will report
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| 181 | * 0 bytes remain, the sole exception is INPUT with
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| 182 | * data rounding flag (short), i.e. every INPUT.
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| 183 | * Nice thing is that short packets will correctly
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| 184 | * report remaining data, thus making this computation
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| 185 | * correct (short packets need to be produced by the
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| 186 | * last TD)
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| 187 | * NOTE: This also works for CONTROL transfer as
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| 188 | * the first TD will return 0 remain.
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| 189 | * NOTE: Short packets don't break the assumption that
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| 190 | * we leave the very last(unused) TD behind.
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| 191 | */
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| 192 | ohci_batch->base.transferred_size
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| 193 | -= td_remain_size(ohci_batch->tds[i]);
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| 194 | } else {
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| 195 | usb_log_debug("Batch %p found error TD(%zu):%08x.",
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| 196 | &ohci_batch->base, i, ohci_batch->tds[i]->status);
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| 197 |
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| 198 | /* ED should be stopped because of errors */
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| 199 | assert((ohci_ep->ed->td_head & ED_TDHEAD_HALTED_FLAG) != 0);
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| 200 |
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| 201 | /* We don't care where the processing stopped, we just
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| 202 | * need to make sure it's not using any of the TDs owned
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| 203 | * by the transfer.
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| 204 | *
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| 205 | * As the chain is terminated by a TD in ownership of
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| 206 | * the EP, set it.
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| 207 | */
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| 208 | ed_set_head_td(ohci_ep->ed, ohci_ep->tds[0]);
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| 209 |
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| 210 | /* Clear the halted condition for the next transfer */
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| 211 | ed_clear_halt(ohci_ep->ed);
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| 212 | break;
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| 213 | }
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| 214 | }
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| 215 | assert(ohci_batch->base.transferred_size <=
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| 216 | ohci_batch->base.buffer_size);
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| 217 |
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| 218 | if (ohci_batch->base.dir == USB_DIRECTION_IN)
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| 219 | memcpy(ohci_batch->base.buffer,
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| 220 | ohci_batch->data_buffer,
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| 221 | ohci_batch->base.transferred_size);
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| 222 |
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| 223 | /* Make sure that we are leaving the right TD behind */
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| 224 | assert(addr_to_phys(ohci_ep->tds[0]) == ed_tail_td(ohci_ep->ed));
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| 225 | assert(ed_tail_td(ohci_ep->ed) == ed_head_td(ohci_ep->ed));
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| 226 |
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| 227 | return true;
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| 228 | }
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| 229 |
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| 230 | /** Starts execution of the TD list
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| 231 | *
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| 232 | * @param[in] ohci_batch Batch structure to use
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| 233 | */
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| 234 | void ohci_transfer_batch_commit(const ohci_transfer_batch_t *ohci_batch)
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| 235 | {
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| 236 | assert(ohci_batch);
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| 237 |
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| 238 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ohci_batch->base.ep);
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| 239 |
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| 240 | usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.", ohci_ep->ed,
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| 241 | ohci_ep->ed->status, ohci_ep->ed->td_tail,
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| 242 | ohci_ep->ed->td_head, ohci_ep->ed->next);
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| 243 |
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| 244 | /*
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| 245 | * According to spec, we need to copy the first TD to the currently
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| 246 | * enqueued one.
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| 247 | */
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| 248 | memcpy(ohci_ep->tds[0], ohci_batch->tds[0], sizeof(td_t));
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| 249 | ohci_batch->tds[0] = ohci_ep->tds[0];
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| 250 |
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| 251 | td_t *last = ohci_batch->tds[ohci_batch->td_count - 1];
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| 252 | td_set_next(last, ohci_ep->tds[1]);
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| 253 |
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| 254 | ed_set_tail_td(ohci_ep->ed, ohci_ep->tds[1]);
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| 255 |
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| 256 | /* Swap the EP TDs for the next transfer */
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| 257 | td_t *tmp = ohci_ep->tds[0];
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| 258 | ohci_ep->tds[0] = ohci_ep->tds[1];
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| 259 | ohci_ep->tds[1] = tmp;
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| 260 | }
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| 261 |
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| 262 | /** Prepare generic control transfer
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| 263 | *
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| 264 | * @param[in] ohci_batch Batch structure to use.
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| 265 | * @param[in] dir Communication direction
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| 266 | *
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| 267 | * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
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| 268 | * Data stage with alternating toggle and direction supplied by parameter.
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| 269 | * Status stage with toggle 1 and direction supplied by parameter.
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| 270 | */
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| 271 | static void batch_control(ohci_transfer_batch_t *ohci_batch)
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| 272 | {
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| 273 | assert(ohci_batch);
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| 274 |
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| 275 | usb_direction_t dir = ohci_batch->base.dir;
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| 276 | assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
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| 277 |
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| 278 | static const usb_direction_t reverse_dir[] = {
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| 279 | [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
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| 280 | [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
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| 281 | };
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| 282 |
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| 283 | int toggle = 0;
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| 284 | const usb_direction_t data_dir = dir;
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| 285 | const usb_direction_t status_dir = reverse_dir[dir];
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| 286 |
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| 287 | /* Setup stage */
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| 288 | td_init(
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| 289 | ohci_batch->tds[0], ohci_batch->tds[1], USB_DIRECTION_BOTH,
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| 290 | ohci_batch->setup_buffer, USB_SETUP_PACKET_SIZE, toggle);
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| 291 | usb_log_debug("Created CONTROL SETUP TD: %08x:%08x:%08x:%08x.",
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| 292 | ohci_batch->tds[0]->status, ohci_batch->tds[0]->cbp,
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| 293 | ohci_batch->tds[0]->next, ohci_batch->tds[0]->be);
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| 294 |
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| 295 | /* Data stage */
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| 296 | size_t td_current = 1;
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| 297 | const char* buffer = ohci_batch->data_buffer;
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| 298 | size_t remain_size = ohci_batch->base.buffer_size;
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| 299 | while (remain_size > 0) {
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| 300 | const size_t transfer_size =
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| 301 | min(remain_size, OHCI_TD_MAX_TRANSFER);
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| 302 | toggle = 1 - toggle;
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| 303 |
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| 304 | td_init(ohci_batch->tds[td_current],
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| 305 | ohci_batch->tds[td_current + 1],
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| 306 | data_dir, buffer, transfer_size, toggle);
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| 307 | usb_log_debug("Created CONTROL DATA TD: %08x:%08x:%08x:%08x.",
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| 308 | ohci_batch->tds[td_current]->status,
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| 309 | ohci_batch->tds[td_current]->cbp,
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| 310 | ohci_batch->tds[td_current]->next,
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| 311 | ohci_batch->tds[td_current]->be);
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| 312 |
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| 313 | buffer += transfer_size;
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| 314 | remain_size -= transfer_size;
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| 315 | assert(td_current < ohci_batch->td_count - 1);
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| 316 | ++td_current;
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| 317 | }
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| 318 |
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| 319 | /* Status stage */
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| 320 | assert(td_current == ohci_batch->td_count - 1);
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| 321 | td_init(ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
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| 322 | status_dir, NULL, 0, 1);
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| 323 | usb_log_debug("Created CONTROL STATUS TD: %08x:%08x:%08x:%08x.",
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| 324 | ohci_batch->tds[td_current]->status,
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| 325 | ohci_batch->tds[td_current]->cbp,
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| 326 | ohci_batch->tds[td_current]->next,
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| 327 | ohci_batch->tds[td_current]->be);
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| 328 | usb_log_debug2(
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| 329 | "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.", \
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| 330 | &ohci_batch->base,
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| 331 | usb_str_transfer_type(ohci_batch->base.ep->transfer_type),
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| 332 | usb_str_direction(dir),
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| 333 | USB_TRANSFER_BATCH_ARGS(ohci_batch->base));
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| 334 | }
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| 335 |
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| 336 | /** Prepare generic data transfer
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| 337 | *
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| 338 | * @param[in] ohci_batch Batch structure to use.
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| 339 | * @paramp[in] dir Communication direction.
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| 340 | *
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| 341 | * Direction is supplied by the associated ep and toggle is maintained by the
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| 342 | * OHCI hw in ED.
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| 343 | */
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| 344 | static void batch_data(ohci_transfer_batch_t *ohci_batch)
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| 345 | {
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| 346 | assert(ohci_batch);
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| 347 |
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| 348 | usb_direction_t dir = ohci_batch->base.dir;
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| 349 | assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
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| 350 |
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| 351 | size_t td_current = 0;
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| 352 | size_t remain_size = ohci_batch->base.buffer_size;
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| 353 | char *buffer = ohci_batch->data_buffer;
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| 354 | while (remain_size > 0) {
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| 355 | const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER
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| 356 | ? OHCI_TD_MAX_TRANSFER : remain_size;
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| 357 |
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| 358 | td_init(
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| 359 | ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
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| 360 | dir, buffer, transfer_size, -1);
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| 361 |
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| 362 | usb_log_debug("Created DATA TD: %08x:%08x:%08x:%08x.",
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| 363 | ohci_batch->tds[td_current]->status,
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| 364 | ohci_batch->tds[td_current]->cbp,
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| 365 | ohci_batch->tds[td_current]->next,
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| 366 | ohci_batch->tds[td_current]->be);
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| 367 |
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| 368 | buffer += transfer_size;
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| 369 | remain_size -= transfer_size;
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| 370 | assert(td_current < ohci_batch->td_count);
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| 371 | ++td_current;
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| 372 | }
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| 373 | usb_log_debug2(
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| 374 | "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.", \
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| 375 | &ohci_batch->base,
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| 376 | usb_str_transfer_type(ohci_batch->base.ep->transfer_type),
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| 377 | usb_str_direction(dir),
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| 378 | USB_TRANSFER_BATCH_ARGS(ohci_batch->base));
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| 379 | }
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| 380 |
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| 381 | /** Transfer setup table. */
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| 382 | static void (*const batch_setup[])(ohci_transfer_batch_t*) =
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| 383 | {
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| 384 | [USB_TRANSFER_CONTROL] = batch_control,
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| 385 | [USB_TRANSFER_BULK] = batch_data,
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| 386 | [USB_TRANSFER_INTERRUPT] = batch_data,
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| 387 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
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| 388 | };
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| 389 | /**
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| 390 | * @}
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|---|
| 391 | */
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|---|