source: mainline/uspace/drv/bus/usb/ohci/ohci_batch.c@ d92060f

Last change on this file since d92060f was 3bacee1, checked in by Jiri Svoboda <jiri@…>, 8 years ago

Make ccheck-fix again and commit more good files.

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[41b96b4]1/*
2 * Copyright (c) 2011 Jan Vesely
[e0a5d4c]3 * Copyright (c) 2018 Ondrej Hlavaty
[41b96b4]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
[58563585]29
[81dce9f]30/** @addtogroup drvusbohci
[41b96b4]31 * @{
32 */
33/** @file
34 * @brief OHCI driver USB transaction structure
35 */
[0d4b110]36
37#include <assert.h>
[41b96b4]38#include <errno.h>
[3f162ab]39#include <macros.h>
[0d4b110]40#include <mem.h>
41#include <stdbool.h>
[41b96b4]42
43#include <usb/usb.h>
44#include <usb/debug.h>
[2dbfe44]45#include <usb/host/utils/malloc32.h>
[41b96b4]46
[ff6dd73]47#include "ohci_batch.h"
[e6b9182]48#include "ohci_bus.h"
[09ace19]49
[3bacee1]50static void (*const batch_setup[])(ohci_transfer_batch_t *);
[76fbd9a]51
[28d9c95]52/** Safely destructs ohci_transfer_batch_t structure
53 *
54 * @param[in] ohci_batch Instance to destroy.
55 */
[5fd9c30]56void ohci_transfer_batch_destroy(ohci_transfer_batch_t *ohci_batch)
[2cc6e97]57{
[5fd9c30]58 assert(ohci_batch);
[e67c50a]59 dma_buffer_free(&ohci_batch->ohci_dma_buffer);
[9c10e51]60 free(ohci_batch);
[2cc6e97]61}
[76fbd9a]62
[6fa04db]63/** Allocate memory and initialize internal data structure.
64 *
[9162b27]65 * @param[in] ep Endpoint for which the batch will be created
[6fa04db]66 * @return Valid pointer if all structures were successfully created,
67 * NULL otherwise.
68 */
[3bacee1]69ohci_transfer_batch_t *ohci_transfer_batch_create(endpoint_t *ep)
[9c10e51]70{
[5fd9c30]71 assert(ep);
[e2976bb]72
[9c10e51]73 ohci_transfer_batch_t *ohci_batch =
[8e3d17f]74 calloc(1, sizeof(ohci_transfer_batch_t));
[584aa38]75 if (!ohci_batch) {
76 usb_log_error("Failed to allocate OHCI batch data.");
[5fd9c30]77 return NULL;
[584aa38]78 }
[5fd9c30]79
80 usb_transfer_batch_init(&ohci_batch->base, ep);
81
82 return ohci_batch;
83}
84
85/** Prepares a batch to be sent.
86 *
87 * Determines the number of needed transfer descriptors (TDs).
88 * Prepares a transport buffer (that is accessible by the hardware).
89 * Initializes parameters needed for the transfer and callback.
90 */
91int ohci_transfer_batch_prepare(ohci_transfer_batch_t *ohci_batch)
92{
93 assert(ohci_batch);
94 usb_transfer_batch_t *usb_batch = &ohci_batch->base;
95
[e67c50a]96 if (!batch_setup[usb_batch->ep->transfer_type])
97 return ENOTSUP;
98
[3bacee1]99 ohci_batch->td_count = (usb_batch->size + OHCI_TD_MAX_TRANSFER - 1) /
100 OHCI_TD_MAX_TRANSFER;
[e2976bb]101 /* Control transfer need Setup and Status stage */
[9c10e51]102 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
103 ohci_batch->td_count += 2;
[e2976bb]104 }
105
[e67c50a]106 /* Alloc one more to NULL terminate */
107 ohci_batch->tds = calloc(ohci_batch->td_count + 1, sizeof(td_t *));
108 if (!ohci_batch->tds)
[5fd9c30]109 return ENOMEM;
[e2976bb]110
[e67c50a]111 const size_t td_size = ohci_batch->td_count * sizeof(td_t);
[3bacee1]112 const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) ?
113 USB_SETUP_PACKET_SIZE :
114 0;
[9b8958b]115
[c21e6a5]116 if (dma_buffer_alloc(&ohci_batch->ohci_dma_buffer, td_size + setup_size)) {
[e67c50a]117 usb_log_error("Failed to allocate OHCI DMA buffer.");
118 return ENOMEM;
[e2976bb]119 }
120
[e67c50a]121 td_t *tds = ohci_batch->ohci_dma_buffer.virt;
122
123 for (size_t i = 0; i < ohci_batch->td_count; i++)
124 ohci_batch->tds[i] = &tds[i];
125
126 /* Presence of this terminator makes TD initialization easier */
127 ohci_batch->tds[ohci_batch->td_count] = NULL;
128
129 ohci_batch->setup_buffer = (void *) (&tds[ohci_batch->td_count]);
130 memcpy(ohci_batch->setup_buffer, usb_batch->setup.buffer, setup_size);
131
[c21e6a5]132 ohci_batch->data_buffer = usb_batch->dma_buffer.virt;
[e67c50a]133
[5fd9c30]134 batch_setup[usb_batch->ep->transfer_type](ohci_batch);
[90dd59dc]135
[5fd9c30]136 return EOK;
[e2976bb]137}
[76fbd9a]138
[28d9c95]139/** Check batch TDs' status.
140 *
[5f57929]141 * @param[in] ohci_batch Batch structure to use.
[28d9c95]142 * @return False, if there is an active TD, true otherwise.
143 *
144 * Walk all TDs (usually there is just one). Stop with false if there is an
145 * active TD. Stop with true if an error is found. Return true if the walk
146 * completes with the last TD.
147 */
[5fd9c30]148bool ohci_transfer_batch_check_completed(ohci_transfer_batch_t *ohci_batch)
[f98b8269]149{
[9c10e51]150 assert(ohci_batch);
151
[c21e6a5]152 usb_transfer_batch_t *usb_batch = &ohci_batch->base;
153 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(usb_batch->ep);
[e67c50a]154 assert(ohci_ep);
155
[a1732929]156 usb_log_debug("Batch %p checking %zu td(s) for completion.",
[c21e6a5]157 ohci_batch, ohci_batch->td_count);
[a1732929]158 usb_log_debug2("ED: %08x:%08x:%08x:%08x.",
[e67c50a]159 ohci_ep->ed->status, ohci_ep->ed->td_head,
160 ohci_ep->ed->td_tail, ohci_ep->ed->next);
[9c10e51]161
[e67c50a]162 if (!ed_inactive(ohci_ep->ed) && ed_transfer_pending(ohci_ep->ed))
[d5abaf4]163 return false;
164
165 /* Now we may be sure that either the ED is inactive because of errors
166 * or all transfer descriptors completed successfully */
167
168 /* Assume all data got through */
[1d758fc]169 usb_batch->transferred_size = usb_batch->size;
[dab3112]170
[d5abaf4]171 /* Check all TDs */
172 for (size_t i = 0; i < ohci_batch->td_count; ++i) {
[9c10e51]173 assert(ohci_batch->tds[i] != NULL);
[a1732929]174 usb_log_debug("TD %zu: %08x:%08x:%08x:%08x.", i,
[9c10e51]175 ohci_batch->tds[i]->status, ohci_batch->tds[i]->cbp,
176 ohci_batch->tds[i]->next, ohci_batch->tds[i]->be);
[d5abaf4]177
[c21e6a5]178 usb_batch->error = td_error(ohci_batch->tds[i]);
179 if (usb_batch->error == EOK) {
[7f7e6f5]180 /* If the TD got all its data through, it will report
181 * 0 bytes remain, the sole exception is INPUT with
182 * data rounding flag (short), i.e. every INPUT.
183 * Nice thing is that short packets will correctly
184 * report remaining data, thus making this computation
185 * correct (short packets need to be produced by the
186 * last TD)
187 * NOTE: This also works for CONTROL transfer as
188 * the first TD will return 0 remain.
189 * NOTE: Short packets don't break the assumption that
190 * we leave the very last(unused) TD behind.
191 */
[3bacee1]192 usb_batch->transferred_size -=
193 td_remain_size(ohci_batch->tds[i]);
[7f7e6f5]194 } else {
[a1732929]195 usb_log_debug("Batch %p found error TD(%zu):%08x.",
[c21e6a5]196 ohci_batch, i, ohci_batch->tds[i]->status);
[d5abaf4]197
198 /* ED should be stopped because of errors */
[e67c50a]199 assert((ohci_ep->ed->td_head & ED_TDHEAD_HALTED_FLAG) != 0);
200
[1b20da0]201 /* We don't care where the processing stopped, we just
[e67c50a]202 * need to make sure it's not using any of the TDs owned
203 * by the transfer.
204 *
205 * As the chain is terminated by a TD in ownership of
206 * the EP, set it.
[d5abaf4]207 */
[e67c50a]208 ed_set_head_td(ohci_ep->ed, ohci_ep->tds[0]);
[d5abaf4]209
[e67c50a]210 /* Clear the halted condition for the next transfer */
211 ed_clear_halt(ohci_ep->ed);
[9a6fde4]212 break;
[f1be95c8]213 }
214 }
[1d758fc]215 assert(usb_batch->transferred_size <= usb_batch->size);
[e20eaed]216
[dab3112]217 /* Make sure that we are leaving the right TD behind */
[e67c50a]218 assert(addr_to_phys(ohci_ep->tds[0]) == ed_tail_td(ohci_ep->ed));
219 assert(ed_tail_td(ohci_ep->ed) == ed_head_td(ohci_ep->ed));
[d6522dd]220
[f1be95c8]221 return true;
[f98b8269]222}
[76fbd9a]223
[28d9c95]224/** Starts execution of the TD list
225 *
[5f57929]226 * @param[in] ohci_batch Batch structure to use
[28d9c95]227 */
[11cb0565]228void ohci_transfer_batch_commit(const ohci_transfer_batch_t *ohci_batch)
[7013b14]229{
[9c10e51]230 assert(ohci_batch);
[e67c50a]231
232 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ohci_batch->base.ep);
233
234 usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.", ohci_ep->ed,
235 ohci_ep->ed->status, ohci_ep->ed->td_tail,
236 ohci_ep->ed->td_head, ohci_ep->ed->next);
237
238 /*
239 * According to spec, we need to copy the first TD to the currently
240 * enqueued one.
241 */
242 memcpy(ohci_ep->tds[0], ohci_batch->tds[0], sizeof(td_t));
243 ohci_batch->tds[0] = ohci_ep->tds[0];
244
245 td_t *last = ohci_batch->tds[ohci_batch->td_count - 1];
246 td_set_next(last, ohci_ep->tds[1]);
247
248 ed_set_tail_td(ohci_ep->ed, ohci_ep->tds[1]);
249
250 /* Swap the EP TDs for the next transfer */
251 td_t *tmp = ohci_ep->tds[0];
252 ohci_ep->tds[0] = ohci_ep->tds[1];
253 ohci_ep->tds[1] = tmp;
[7013b14]254}
[76fbd9a]255
[28d9c95]256/** Prepare generic control transfer
257 *
[5f57929]258 * @param[in] ohci_batch Batch structure to use.
[058fd76]259 * @param[in] dir Communication direction
[28d9c95]260 *
261 * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
262 * Data stage with alternating toggle and direction supplied by parameter.
263 * Status stage with toggle 1 and direction supplied by parameter.
264 */
[5fd9c30]265static void batch_control(ohci_transfer_batch_t *ohci_batch)
[7786cea]266{
[9c10e51]267 assert(ohci_batch);
[5fd9c30]268
269 usb_direction_t dir = ohci_batch->base.dir;
[058fd76]270 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
[5fd9c30]271
[058fd76]272 static const usb_direction_t reverse_dir[] = {
273 [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
274 [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
275 };
[9c10e51]276
[e42dd32]277 int toggle = 0;
[058fd76]278 const usb_direction_t data_dir = dir;
279 const usb_direction_t status_dir = reverse_dir[dir];
[9c10e51]280
[dab3112]281 /* Setup stage */
[70d72dd]282 td_init(
283 ohci_batch->tds[0], ohci_batch->tds[1], USB_DIRECTION_BOTH,
[e67c50a]284 ohci_batch->setup_buffer, USB_SETUP_PACKET_SIZE, toggle);
[a1732929]285 usb_log_debug("Created CONTROL SETUP TD: %08x:%08x:%08x:%08x.",
[9c10e51]286 ohci_batch->tds[0]->status, ohci_batch->tds[0]->cbp,
287 ohci_batch->tds[0]->next, ohci_batch->tds[0]->be);
[e42dd32]288
[dab3112]289 /* Data stage */
[e42dd32]290 size_t td_current = 1;
[3bacee1]291 const char *buffer = ohci_batch->data_buffer;
[1d758fc]292 size_t remain_size = ohci_batch->base.size;
[e42dd32]293 while (remain_size > 0) {
[9c10e51]294 const size_t transfer_size =
[3f162ab]295 min(remain_size, OHCI_TD_MAX_TRANSFER);
[e42dd32]296 toggle = 1 - toggle;
297
[70d72dd]298 td_init(ohci_batch->tds[td_current],
299 ohci_batch->tds[td_current + 1],
300 data_dir, buffer, transfer_size, toggle);
[a1732929]301 usb_log_debug("Created CONTROL DATA TD: %08x:%08x:%08x:%08x.",
[9c10e51]302 ohci_batch->tds[td_current]->status,
303 ohci_batch->tds[td_current]->cbp,
304 ohci_batch->tds[td_current]->next,
305 ohci_batch->tds[td_current]->be);
[e42dd32]306
[d017cea]307 buffer += transfer_size;
[e42dd32]308 remain_size -= transfer_size;
[9c10e51]309 assert(td_current < ohci_batch->td_count - 1);
[e42dd32]310 ++td_current;
311 }
312
[dab3112]313 /* Status stage */
[9c10e51]314 assert(td_current == ohci_batch->td_count - 1);
[70d72dd]315 td_init(ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
316 status_dir, NULL, 0, 1);
[a1732929]317 usb_log_debug("Created CONTROL STATUS TD: %08x:%08x:%08x:%08x.",
[9c10e51]318 ohci_batch->tds[td_current]->status,
319 ohci_batch->tds[td_current]->cbp,
320 ohci_batch->tds[td_current]->next,
321 ohci_batch->tds[td_current]->be);
[058fd76]322 usb_log_debug2(
[5ef16903]323 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.",
[9162b27]324 &ohci_batch->base,
325 usb_str_transfer_type(ohci_batch->base.ep->transfer_type),
[058fd76]326 usb_str_direction(dir),
[9162b27]327 USB_TRANSFER_BATCH_ARGS(ohci_batch->base));
[f98b8269]328}
[76fbd9a]329
[28d9c95]330/** Prepare generic data transfer
331 *
[5f57929]332 * @param[in] ohci_batch Batch structure to use.
[058fd76]333 * @paramp[in] dir Communication direction.
[28d9c95]334 *
335 * Direction is supplied by the associated ep and toggle is maintained by the
336 * OHCI hw in ED.
337 */
[5fd9c30]338static void batch_data(ohci_transfer_batch_t *ohci_batch)
[c6fe469]339{
[9c10e51]340 assert(ohci_batch);
[5fd9c30]341
342 usb_direction_t dir = ohci_batch->base.dir;
[058fd76]343 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
[c6fe469]344
[aa9ccf7]345 size_t td_current = 0;
[1d758fc]346 size_t remain_size = ohci_batch->base.size;
[e67c50a]347 char *buffer = ohci_batch->data_buffer;
[c6fe469]348 while (remain_size > 0) {
[3bacee1]349 const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER ?
350 OHCI_TD_MAX_TRANSFER : remain_size;
[c6fe469]351
[70d72dd]352 td_init(
353 ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
354 dir, buffer, transfer_size, -1);
[058fd76]355
[a1732929]356 usb_log_debug("Created DATA TD: %08x:%08x:%08x:%08x.",
[9c10e51]357 ohci_batch->tds[td_current]->status,
358 ohci_batch->tds[td_current]->cbp,
359 ohci_batch->tds[td_current]->next,
360 ohci_batch->tds[td_current]->be);
[c6fe469]361
[d017cea]362 buffer += transfer_size;
[c6fe469]363 remain_size -= transfer_size;
[9c10e51]364 assert(td_current < ohci_batch->td_count);
[c6fe469]365 ++td_current;
366 }
[5f57929]367 usb_log_debug2(
[5ef16903]368 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.",
[9162b27]369 &ohci_batch->base,
370 usb_str_transfer_type(ohci_batch->base.ep->transfer_type),
[058fd76]371 usb_str_direction(dir),
[9162b27]372 USB_TRANSFER_BATCH_ARGS(ohci_batch->base));
[7bce1fc]373}
[76fbd9a]374
[6fa04db]375/** Transfer setup table. */
[3bacee1]376static void (*const batch_setup[])(ohci_transfer_batch_t *) =
377 {
[790318e]378 [USB_TRANSFER_CONTROL] = batch_control,
379 [USB_TRANSFER_BULK] = batch_data,
380 [USB_TRANSFER_INTERRUPT] = batch_data,
381 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[7bce1fc]382};
[41b96b4]383/**
384 * @}
385 */
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