source: mainline/uspace/drv/bus/usb/ohci/ohci_batch.c@ 6fa04db

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 6fa04db was 6fa04db, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

ohci: Doxygen

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[41b96b4]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[81dce9f]28/** @addtogroup drvusbohci
[41b96b4]29 * @{
30 */
31/** @file
32 * @brief OHCI driver USB transaction structure
33 */
34#include <errno.h>
35#include <str_error.h>
[3f162ab]36#include <macros.h>
[41b96b4]37
38#include <usb/usb.h>
39#include <usb/debug.h>
40
[ff6dd73]41#include "ohci_batch.h"
[e20eaed]42#include "ohci_endpoint.h"
[2bf8f8c]43#include "utils/malloc32.h"
[09ace19]44
[790318e]45static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t);
[28d9c95]46/*----------------------------------------------------------------------------*/
47/** Safely destructs ohci_transfer_batch_t structure
48 *
49 * @param[in] ohci_batch Instance to destroy.
50 */
[9c10e51]51static void ohci_transfer_batch_dispose(ohci_transfer_batch_t *ohci_batch)
[2cc6e97]52{
[9c10e51]53 if (!ohci_batch)
[9a6fde4]54 return;
[9c10e51]55 if (ohci_batch->tds) {
[9b8958b]56 for (unsigned i = 0; i < ohci_batch->td_count; ++i) {
[9c10e51]57 if (i != ohci_batch->leave_td)
58 free32(ohci_batch->tds[i]);
[9a6fde4]59 }
[9c10e51]60 free(ohci_batch->tds);
[9a6fde4]61 }
[549ff23]62 usb_transfer_batch_destroy(ohci_batch->usb_batch);
[9c10e51]63 free32(ohci_batch->device_buffer);
64 free(ohci_batch);
[2cc6e97]65}
[9a6fde4]66/*----------------------------------------------------------------------------*/
[6fa04db]67/** Finishes usb_transfer_batch and destroys the structure.
68 *
69 * @param[in] uhci_batch Instance to finish and destroy.
70 */
[9c10e51]71void ohci_transfer_batch_finish_dispose(ohci_transfer_batch_t *ohci_batch)
[e2976bb]72{
[9c10e51]73 assert(ohci_batch);
74 assert(ohci_batch->usb_batch);
75 usb_transfer_batch_finish(ohci_batch->usb_batch,
[5cfcc64]76 ohci_batch->device_buffer + ohci_batch->usb_batch->setup_size);
[9c10e51]77 ohci_transfer_batch_dispose(ohci_batch);
78}
79/*----------------------------------------------------------------------------*/
[6fa04db]80/** Allocate memory and initialize internal data structure.
81 *
82 * @param[in] usb_batch Pointer to generic USB batch structure.
83 * @return Valid pointer if all structures were successfully created,
84 * NULL otherwise.
85 *
86 * Determines the number of needed transfer descriptors (TDs).
87 * Prepares a transport buffer (that is accessible by the hardware).
88 * Initializes parameters needed for the transfer and callback.
89 */
[9c10e51]90ohci_transfer_batch_t * ohci_transfer_batch_get(usb_transfer_batch_t *usb_batch)
91{
92 assert(usb_batch);
93#define CHECK_NULL_DISPOSE_RET(ptr, message...) \
94if (ptr == NULL) { \
95 usb_log_error(message); \
96 ohci_transfer_batch_dispose(ohci_batch); \
97 return NULL; \
98} else (void)0
[e2976bb]99
[9c10e51]100 ohci_transfer_batch_t *ohci_batch =
[8e3d17f]101 calloc(1, sizeof(ohci_transfer_batch_t));
[9c10e51]102 CHECK_NULL_DISPOSE_RET(ohci_batch,
103 "Failed to allocate OHCI batch data.\n");
[7bce1fc]104 link_initialize(&ohci_batch->link);
[9c10e51]105 ohci_batch->td_count =
106 (usb_batch->buffer_size + OHCI_TD_MAX_TRANSFER - 1)
107 / OHCI_TD_MAX_TRANSFER;
[e2976bb]108 /* Control transfer need Setup and Status stage */
[9c10e51]109 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
110 ohci_batch->td_count += 2;
[e2976bb]111 }
112
[f974519]113 /* We need an extra place for TD that was left at ED */
[9c10e51]114 ohci_batch->tds = calloc(ohci_batch->td_count + 1, sizeof(td_t*));
115 CHECK_NULL_DISPOSE_RET(ohci_batch->tds,
116 "Failed to allocate OHCI transfer descriptors.\n");
[e2976bb]117
118 /* Add TD left over by the previous transfer */
[9c10e51]119 ohci_batch->ed = ohci_endpoint_get(usb_batch->ep)->ed;
120 ohci_batch->tds[0] = ohci_endpoint_get(usb_batch->ep)->td;
121 ohci_batch->leave_td = 0;
[9b8958b]122
123 for (unsigned i = 1; i <= ohci_batch->td_count; ++i) {
[9c10e51]124 ohci_batch->tds[i] = malloc32(sizeof(td_t));
125 CHECK_NULL_DISPOSE_RET(ohci_batch->tds[i],
[e2976bb]126 "Failed to allocate TD %d.\n", i );
127 }
128
129
130 /* NOTE: OHCI is capable of handling buffer that crosses page boundaries
131 * it is, however, not capable of handling buffer that occupies more
132 * than two pages (the first page is computed using start pointer, the
133 * other using the end pointer) */
[9c10e51]134 if (usb_batch->setup_size + usb_batch->buffer_size > 0) {
135 /* Use one buffer for setup and data stage */
136 ohci_batch->device_buffer =
137 malloc32(usb_batch->setup_size + usb_batch->buffer_size);
138 CHECK_NULL_DISPOSE_RET(ohci_batch->device_buffer,
[e2976bb]139 "Failed to allocate device accessible buffer.\n");
[f974519]140 /* Copy setup data */
[9c10e51]141 memcpy(ohci_batch->device_buffer, usb_batch->setup_buffer,
142 usb_batch->setup_size);
143 /* Copy generic data */
144 if (usb_batch->ep->direction != USB_DIRECTION_IN)
145 memcpy(
146 ohci_batch->device_buffer + usb_batch->setup_size,
147 usb_batch->buffer, usb_batch->buffer_size);
[e2976bb]148 }
[9c10e51]149 ohci_batch->usb_batch = usb_batch;
[e2976bb]150
[058fd76]151 const usb_direction_t dir = usb_transfer_batch_direction(usb_batch);
[790318e]152 assert(batch_setup[usb_batch->ep->transfer_type]);
153 batch_setup[usb_batch->ep->transfer_type](ohci_batch, dir);
[90dd59dc]154
[9c10e51]155 return ohci_batch;
156#undef CHECK_NULL_DISPOSE_RET
[e2976bb]157}
158/*----------------------------------------------------------------------------*/
[28d9c95]159/** Check batch TDs' status.
160 *
[5f57929]161 * @param[in] ohci_batch Batch structure to use.
[28d9c95]162 * @return False, if there is an active TD, true otherwise.
163 *
164 * Walk all TDs (usually there is just one). Stop with false if there is an
165 * active TD. Stop with true if an error is found. Return true if the walk
166 * completes with the last TD.
167 */
[9c10e51]168bool ohci_transfer_batch_is_complete(ohci_transfer_batch_t *ohci_batch)
[f98b8269]169{
[9c10e51]170 assert(ohci_batch);
171 assert(ohci_batch->usb_batch);
172
173 usb_log_debug("Batch %p checking %zu td(s) for completion.\n",
174 ohci_batch->usb_batch, ohci_batch->td_count);
[49a98c8]175 usb_log_debug2("ED: %08x:%08x:%08x:%08x.\n",
[9c10e51]176 ohci_batch->ed->status, ohci_batch->ed->td_head,
177 ohci_batch->ed->td_tail, ohci_batch->ed->next);
178
[d5abaf4]179 if (!ed_inactive(ohci_batch->ed) && ed_transfer_pending(ohci_batch->ed))
180 return false;
181
182 /* Now we may be sure that either the ED is inactive because of errors
183 * or all transfer descriptors completed successfully */
184
185 /* Assume all data got through */
186 ohci_batch->usb_batch->transfered_size =
187 ohci_batch->usb_batch->buffer_size;
[dab3112]188
189 /* Assume we will leave the last(unused) TD behind */
[d5abaf4]190 ohci_batch->leave_td = ohci_batch->td_count;
191
192 /* Check all TDs */
193 for (size_t i = 0; i < ohci_batch->td_count; ++i) {
[9c10e51]194 assert(ohci_batch->tds[i] != NULL);
[49a98c8]195 usb_log_debug("TD %zu: %08x:%08x:%08x:%08x.\n", i,
[9c10e51]196 ohci_batch->tds[i]->status, ohci_batch->tds[i]->cbp,
197 ohci_batch->tds[i]->next, ohci_batch->tds[i]->be);
[d5abaf4]198
199 /* If the TD got all its data through, it will report 0 bytes
200 * remain, the sole exception is INPUT with data rounding flag
201 * (short), i.e. every INPUT. Nice thing is that short packets
202 * will correctly report remaining data, thus making
203 * this computation correct (short packets need to be produced
204 * by the last TD)
205 * NOTE: This also works for CONTROL transfer as
206 * the first TD will return 0 remain.
207 * NOTE: Short packets don't break the assumption that
208 * we leave the very last(unused) TD behind.
209 */
210 ohci_batch->usb_batch->transfered_size
211 -= td_remain_size(ohci_batch->tds[i]);
212
[9c10e51]213 ohci_batch->usb_batch->error = td_error(ohci_batch->tds[i]);
214 if (ohci_batch->usb_batch->error != EOK) {
[49a98c8]215 usb_log_debug("Batch %p found error TD(%zu):%08x.\n",
[9c10e51]216 ohci_batch->usb_batch, i,
217 ohci_batch->tds[i]->status);
[d5abaf4]218
219 /* ED should be stopped because of errors */
220 assert((ohci_batch->ed->td_head & ED_TDHEAD_HALTED_FLAG) != 0);
221
222 /* Now we have a problem: we don't know what TD
223 * the head pointer points to, the retiring rules
224 * described in specs say it should be the one after
225 * the failed one so set the tail pointer accordingly.
226 * It will be the one TD we leave behind.
227 */
228 ohci_batch->leave_td = i + 1;
229
230 /* Check TD assumption */
231 const uint32_t pa = addr_to_phys(
232 ohci_batch->tds[ohci_batch->leave_td]);
233 assert((ohci_batch->ed->td_head & ED_TDTAIL_PTR_MASK)
234 == pa);
235
236 ed_set_tail_td(ohci_batch->ed,
237 ohci_batch->tds[ohci_batch->leave_td]);
238
239 /* Clear possible ED HALT */
240 ohci_batch->ed->td_head &= ~ED_TDHEAD_HALTED_FLAG;
[9a6fde4]241 break;
[f1be95c8]242 }
243 }
[d5abaf4]244 assert(ohci_batch->usb_batch->transfered_size <=
245 ohci_batch->usb_batch->buffer_size);
[e20eaed]246
[d5abaf4]247 /* Store the remaining TD */
[9c10e51]248 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ohci_batch->usb_batch->ep);
[e20eaed]249 assert(ohci_ep);
[9c10e51]250 ohci_ep->td = ohci_batch->tds[ohci_batch->leave_td];
[dab3112]251
252 /* Make sure that we are leaving the right TD behind */
[e20eaed]253 const uint32_t pa = addr_to_phys(ohci_ep->td);
[9c10e51]254 assert(pa == (ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK));
255 assert(pa == (ohci_batch->ed->td_tail & ED_TDTAIL_PTR_MASK));
[d6522dd]256
[f1be95c8]257 return true;
[f98b8269]258}
259/*----------------------------------------------------------------------------*/
[28d9c95]260/** Starts execution of the TD list
261 *
[5f57929]262 * @param[in] ohci_batch Batch structure to use
[28d9c95]263 */
[9c10e51]264void ohci_transfer_batch_commit(ohci_transfer_batch_t *ohci_batch)
[7013b14]265{
[9c10e51]266 assert(ohci_batch);
[9515f674]267 ed_set_tail_td(ohci_batch->ed, ohci_batch->tds[ohci_batch->td_count]);
[7013b14]268}
269/*----------------------------------------------------------------------------*/
[28d9c95]270/** Prepare generic control transfer
271 *
[5f57929]272 * @param[in] ohci_batch Batch structure to use.
[058fd76]273 * @param[in] dir Communication direction
[28d9c95]274 *
275 * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
276 * Data stage with alternating toggle and direction supplied by parameter.
277 * Status stage with toggle 1 and direction supplied by parameter.
278 */
[058fd76]279static void batch_control(ohci_transfer_batch_t *ohci_batch, usb_direction_t dir)
[7786cea]280{
[9c10e51]281 assert(ohci_batch);
282 assert(ohci_batch->usb_batch);
[058fd76]283 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
[49a98c8]284 usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.\n", ohci_batch->ed,
[9c10e51]285 ohci_batch->ed->status, ohci_batch->ed->td_tail,
286 ohci_batch->ed->td_head, ohci_batch->ed->next);
[058fd76]287 static const usb_direction_t reverse_dir[] = {
288 [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
289 [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
290 };
[9c10e51]291
[e42dd32]292 int toggle = 0;
[058fd76]293 const char* buffer = ohci_batch->device_buffer;
294 const usb_direction_t data_dir = dir;
295 const usb_direction_t status_dir = reverse_dir[dir];
[9c10e51]296
[dab3112]297 /* Setup stage */
[70d72dd]298 td_init(
299 ohci_batch->tds[0], ohci_batch->tds[1], USB_DIRECTION_BOTH,
300 buffer, ohci_batch->usb_batch->setup_size, toggle);
[49a98c8]301 usb_log_debug("Created CONTROL SETUP TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]302 ohci_batch->tds[0]->status, ohci_batch->tds[0]->cbp,
303 ohci_batch->tds[0]->next, ohci_batch->tds[0]->be);
304 buffer += ohci_batch->usb_batch->setup_size;
[e42dd32]305
[dab3112]306 /* Data stage */
[e42dd32]307 size_t td_current = 1;
[9c10e51]308 size_t remain_size = ohci_batch->usb_batch->buffer_size;
[e42dd32]309 while (remain_size > 0) {
[9c10e51]310 const size_t transfer_size =
[3f162ab]311 min(remain_size, OHCI_TD_MAX_TRANSFER);
[e42dd32]312 toggle = 1 - toggle;
313
[70d72dd]314 td_init(ohci_batch->tds[td_current],
315 ohci_batch->tds[td_current + 1],
316 data_dir, buffer, transfer_size, toggle);
[49a98c8]317 usb_log_debug("Created CONTROL DATA TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]318 ohci_batch->tds[td_current]->status,
319 ohci_batch->tds[td_current]->cbp,
320 ohci_batch->tds[td_current]->next,
321 ohci_batch->tds[td_current]->be);
[e42dd32]322
[d017cea]323 buffer += transfer_size;
[e42dd32]324 remain_size -= transfer_size;
[9c10e51]325 assert(td_current < ohci_batch->td_count - 1);
[e42dd32]326 ++td_current;
327 }
328
[dab3112]329 /* Status stage */
[9c10e51]330 assert(td_current == ohci_batch->td_count - 1);
[70d72dd]331 td_init(ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
332 status_dir, NULL, 0, 1);
[49a98c8]333 usb_log_debug("Created CONTROL STATUS TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]334 ohci_batch->tds[td_current]->status,
335 ohci_batch->tds[td_current]->cbp,
336 ohci_batch->tds[td_current]->next,
337 ohci_batch->tds[td_current]->be);
[058fd76]338 usb_log_debug2(
339 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
340 ohci_batch->usb_batch,
341 usb_str_transfer_type(ohci_batch->usb_batch->ep->transfer_type),
342 usb_str_direction(dir),
343 USB_TRANSFER_BATCH_ARGS(*ohci_batch->usb_batch));
[f98b8269]344}
345/*----------------------------------------------------------------------------*/
[28d9c95]346/** Prepare generic data transfer
347 *
[5f57929]348 * @param[in] ohci_batch Batch structure to use.
[058fd76]349 * @paramp[in] dir Communication direction.
[28d9c95]350 *
351 * Direction is supplied by the associated ep and toggle is maintained by the
352 * OHCI hw in ED.
353 */
[058fd76]354static void batch_data(ohci_transfer_batch_t *ohci_batch, usb_direction_t dir)
[c6fe469]355{
[9c10e51]356 assert(ohci_batch);
[058fd76]357 assert(ohci_batch->usb_batch);
358 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
[49a98c8]359 usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.\n", ohci_batch->ed,
[9c10e51]360 ohci_batch->ed->status, ohci_batch->ed->td_tail,
361 ohci_batch->ed->td_head, ohci_batch->ed->next);
[c6fe469]362
[aa9ccf7]363 size_t td_current = 0;
[9c10e51]364 size_t remain_size = ohci_batch->usb_batch->buffer_size;
365 char *buffer = ohci_batch->device_buffer;
[c6fe469]366 while (remain_size > 0) {
[02cacce]367 const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER
368 ? OHCI_TD_MAX_TRANSFER : remain_size;
[c6fe469]369
[70d72dd]370 td_init(
371 ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
372 dir, buffer, transfer_size, -1);
[058fd76]373
[49a98c8]374 usb_log_debug("Created DATA TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]375 ohci_batch->tds[td_current]->status,
376 ohci_batch->tds[td_current]->cbp,
377 ohci_batch->tds[td_current]->next,
378 ohci_batch->tds[td_current]->be);
[c6fe469]379
[d017cea]380 buffer += transfer_size;
[c6fe469]381 remain_size -= transfer_size;
[9c10e51]382 assert(td_current < ohci_batch->td_count);
[c6fe469]383 ++td_current;
384 }
[5f57929]385 usb_log_debug2(
386 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
387 ohci_batch->usb_batch,
[7bce1fc]388 usb_str_transfer_type(ohci_batch->usb_batch->ep->transfer_type),
[058fd76]389 usb_str_direction(dir),
[5f57929]390 USB_TRANSFER_BATCH_ARGS(*ohci_batch->usb_batch));
[7bce1fc]391}
392/*----------------------------------------------------------------------------*/
[6fa04db]393/** Transfer setup table. */
[790318e]394static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t) =
[7bce1fc]395{
[790318e]396 [USB_TRANSFER_CONTROL] = batch_control,
397 [USB_TRANSFER_BULK] = batch_data,
398 [USB_TRANSFER_INTERRUPT] = batch_data,
399 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[7bce1fc]400};
[41b96b4]401/**
402 * @}
403 */
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