source: mainline/uspace/drv/bus/usb/ohci/ohci_batch.c@ 698cb1cc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 698cb1cc was 11cb0565, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

ohci: Drop leave_td field. Make is_compete() and commit() parameters const.

  • Property mode set to 100644
File size: 14.6 KB
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[41b96b4]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[81dce9f]28/** @addtogroup drvusbohci
[41b96b4]29 * @{
30 */
31/** @file
32 * @brief OHCI driver USB transaction structure
33 */
34#include <errno.h>
35#include <str_error.h>
[3f162ab]36#include <macros.h>
[41b96b4]37
38#include <usb/usb.h>
39#include <usb/debug.h>
40
[ff6dd73]41#include "ohci_batch.h"
[e20eaed]42#include "ohci_endpoint.h"
[2bf8f8c]43#include "utils/malloc32.h"
[09ace19]44
[790318e]45static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t);
[28d9c95]46/*----------------------------------------------------------------------------*/
47/** Safely destructs ohci_transfer_batch_t structure
48 *
49 * @param[in] ohci_batch Instance to destroy.
50 */
[9c10e51]51static void ohci_transfer_batch_dispose(ohci_transfer_batch_t *ohci_batch)
[2cc6e97]52{
[9c10e51]53 if (!ohci_batch)
[9a6fde4]54 return;
[9c10e51]55 if (ohci_batch->tds) {
[11cb0565]56 const ohci_endpoint_t *ohci_ep =
57 ohci_endpoint_get(ohci_batch->usb_batch->ep);
58 assert(ohci_ep);
[9b8958b]59 for (unsigned i = 0; i < ohci_batch->td_count; ++i) {
[11cb0565]60 if (ohci_batch->tds[i] != ohci_ep->td)
[9c10e51]61 free32(ohci_batch->tds[i]);
[9a6fde4]62 }
[9c10e51]63 free(ohci_batch->tds);
[9a6fde4]64 }
[549ff23]65 usb_transfer_batch_destroy(ohci_batch->usb_batch);
[9c10e51]66 free32(ohci_batch->device_buffer);
67 free(ohci_batch);
[2cc6e97]68}
[9a6fde4]69/*----------------------------------------------------------------------------*/
[6fa04db]70/** Finishes usb_transfer_batch and destroys the structure.
71 *
72 * @param[in] uhci_batch Instance to finish and destroy.
73 */
[9c10e51]74void ohci_transfer_batch_finish_dispose(ohci_transfer_batch_t *ohci_batch)
[e2976bb]75{
[9c10e51]76 assert(ohci_batch);
77 assert(ohci_batch->usb_batch);
78 usb_transfer_batch_finish(ohci_batch->usb_batch,
[5cfcc64]79 ohci_batch->device_buffer + ohci_batch->usb_batch->setup_size);
[9c10e51]80 ohci_transfer_batch_dispose(ohci_batch);
81}
82/*----------------------------------------------------------------------------*/
[6fa04db]83/** Allocate memory and initialize internal data structure.
84 *
85 * @param[in] usb_batch Pointer to generic USB batch structure.
86 * @return Valid pointer if all structures were successfully created,
87 * NULL otherwise.
88 *
89 * Determines the number of needed transfer descriptors (TDs).
90 * Prepares a transport buffer (that is accessible by the hardware).
91 * Initializes parameters needed for the transfer and callback.
92 */
[9c10e51]93ohci_transfer_batch_t * ohci_transfer_batch_get(usb_transfer_batch_t *usb_batch)
94{
95 assert(usb_batch);
96#define CHECK_NULL_DISPOSE_RET(ptr, message...) \
97if (ptr == NULL) { \
98 usb_log_error(message); \
99 ohci_transfer_batch_dispose(ohci_batch); \
100 return NULL; \
101} else (void)0
[e2976bb]102
[9c10e51]103 ohci_transfer_batch_t *ohci_batch =
[8e3d17f]104 calloc(1, sizeof(ohci_transfer_batch_t));
[9c10e51]105 CHECK_NULL_DISPOSE_RET(ohci_batch,
106 "Failed to allocate OHCI batch data.\n");
[7bce1fc]107 link_initialize(&ohci_batch->link);
[9c10e51]108 ohci_batch->td_count =
109 (usb_batch->buffer_size + OHCI_TD_MAX_TRANSFER - 1)
110 / OHCI_TD_MAX_TRANSFER;
[e2976bb]111 /* Control transfer need Setup and Status stage */
[9c10e51]112 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
113 ohci_batch->td_count += 2;
[e2976bb]114 }
115
[f974519]116 /* We need an extra place for TD that was left at ED */
[9c10e51]117 ohci_batch->tds = calloc(ohci_batch->td_count + 1, sizeof(td_t*));
118 CHECK_NULL_DISPOSE_RET(ohci_batch->tds,
119 "Failed to allocate OHCI transfer descriptors.\n");
[e2976bb]120
121 /* Add TD left over by the previous transfer */
[9c10e51]122 ohci_batch->ed = ohci_endpoint_get(usb_batch->ep)->ed;
123 ohci_batch->tds[0] = ohci_endpoint_get(usb_batch->ep)->td;
[9b8958b]124
125 for (unsigned i = 1; i <= ohci_batch->td_count; ++i) {
[9c10e51]126 ohci_batch->tds[i] = malloc32(sizeof(td_t));
127 CHECK_NULL_DISPOSE_RET(ohci_batch->tds[i],
[e2976bb]128 "Failed to allocate TD %d.\n", i );
129 }
130
131
132 /* NOTE: OHCI is capable of handling buffer that crosses page boundaries
133 * it is, however, not capable of handling buffer that occupies more
134 * than two pages (the first page is computed using start pointer, the
135 * other using the end pointer) */
[9c10e51]136 if (usb_batch->setup_size + usb_batch->buffer_size > 0) {
137 /* Use one buffer for setup and data stage */
138 ohci_batch->device_buffer =
139 malloc32(usb_batch->setup_size + usb_batch->buffer_size);
140 CHECK_NULL_DISPOSE_RET(ohci_batch->device_buffer,
[e2976bb]141 "Failed to allocate device accessible buffer.\n");
[f974519]142 /* Copy setup data */
[9c10e51]143 memcpy(ohci_batch->device_buffer, usb_batch->setup_buffer,
144 usb_batch->setup_size);
145 /* Copy generic data */
146 if (usb_batch->ep->direction != USB_DIRECTION_IN)
147 memcpy(
148 ohci_batch->device_buffer + usb_batch->setup_size,
149 usb_batch->buffer, usb_batch->buffer_size);
[e2976bb]150 }
[9c10e51]151 ohci_batch->usb_batch = usb_batch;
[e2976bb]152
[058fd76]153 const usb_direction_t dir = usb_transfer_batch_direction(usb_batch);
[790318e]154 assert(batch_setup[usb_batch->ep->transfer_type]);
155 batch_setup[usb_batch->ep->transfer_type](ohci_batch, dir);
[90dd59dc]156
[9c10e51]157 return ohci_batch;
158#undef CHECK_NULL_DISPOSE_RET
[e2976bb]159}
160/*----------------------------------------------------------------------------*/
[28d9c95]161/** Check batch TDs' status.
162 *
[5f57929]163 * @param[in] ohci_batch Batch structure to use.
[28d9c95]164 * @return False, if there is an active TD, true otherwise.
165 *
166 * Walk all TDs (usually there is just one). Stop with false if there is an
167 * active TD. Stop with true if an error is found. Return true if the walk
168 * completes with the last TD.
169 */
[11cb0565]170bool ohci_transfer_batch_is_complete(const ohci_transfer_batch_t *ohci_batch)
[f98b8269]171{
[9c10e51]172 assert(ohci_batch);
173 assert(ohci_batch->usb_batch);
174
175 usb_log_debug("Batch %p checking %zu td(s) for completion.\n",
176 ohci_batch->usb_batch, ohci_batch->td_count);
[49a98c8]177 usb_log_debug2("ED: %08x:%08x:%08x:%08x.\n",
[9c10e51]178 ohci_batch->ed->status, ohci_batch->ed->td_head,
179 ohci_batch->ed->td_tail, ohci_batch->ed->next);
180
[d5abaf4]181 if (!ed_inactive(ohci_batch->ed) && ed_transfer_pending(ohci_batch->ed))
182 return false;
183
184 /* Now we may be sure that either the ED is inactive because of errors
185 * or all transfer descriptors completed successfully */
186
187 /* Assume all data got through */
188 ohci_batch->usb_batch->transfered_size =
189 ohci_batch->usb_batch->buffer_size;
[dab3112]190
191 /* Assume we will leave the last(unused) TD behind */
[11cb0565]192 unsigned leave_td = ohci_batch->td_count;
[d5abaf4]193
194 /* Check all TDs */
195 for (size_t i = 0; i < ohci_batch->td_count; ++i) {
[9c10e51]196 assert(ohci_batch->tds[i] != NULL);
[49a98c8]197 usb_log_debug("TD %zu: %08x:%08x:%08x:%08x.\n", i,
[9c10e51]198 ohci_batch->tds[i]->status, ohci_batch->tds[i]->cbp,
199 ohci_batch->tds[i]->next, ohci_batch->tds[i]->be);
[d5abaf4]200
201 /* If the TD got all its data through, it will report 0 bytes
202 * remain, the sole exception is INPUT with data rounding flag
203 * (short), i.e. every INPUT. Nice thing is that short packets
204 * will correctly report remaining data, thus making
205 * this computation correct (short packets need to be produced
206 * by the last TD)
207 * NOTE: This also works for CONTROL transfer as
208 * the first TD will return 0 remain.
209 * NOTE: Short packets don't break the assumption that
210 * we leave the very last(unused) TD behind.
211 */
212 ohci_batch->usb_batch->transfered_size
213 -= td_remain_size(ohci_batch->tds[i]);
214
[9c10e51]215 ohci_batch->usb_batch->error = td_error(ohci_batch->tds[i]);
216 if (ohci_batch->usb_batch->error != EOK) {
[49a98c8]217 usb_log_debug("Batch %p found error TD(%zu):%08x.\n",
[9c10e51]218 ohci_batch->usb_batch, i,
219 ohci_batch->tds[i]->status);
[d5abaf4]220
221 /* ED should be stopped because of errors */
222 assert((ohci_batch->ed->td_head & ED_TDHEAD_HALTED_FLAG) != 0);
223
224 /* Now we have a problem: we don't know what TD
225 * the head pointer points to, the retiring rules
226 * described in specs say it should be the one after
227 * the failed one so set the tail pointer accordingly.
228 * It will be the one TD we leave behind.
229 */
[11cb0565]230 leave_td = i + 1;
[d5abaf4]231
232 /* Check TD assumption */
[11cb0565]233 const uint32_t pa =
234 addr_to_phys(ohci_batch->tds[leave_td]);
235 assert((ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK)
[d5abaf4]236 == pa);
237
238 ed_set_tail_td(ohci_batch->ed,
[11cb0565]239 ohci_batch->tds[leave_td]);
[d5abaf4]240
241 /* Clear possible ED HALT */
242 ohci_batch->ed->td_head &= ~ED_TDHEAD_HALTED_FLAG;
[9a6fde4]243 break;
[f1be95c8]244 }
245 }
[d5abaf4]246 assert(ohci_batch->usb_batch->transfered_size <=
247 ohci_batch->usb_batch->buffer_size);
[e20eaed]248
[d5abaf4]249 /* Store the remaining TD */
[9c10e51]250 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ohci_batch->usb_batch->ep);
[e20eaed]251 assert(ohci_ep);
[11cb0565]252 ohci_ep->td = ohci_batch->tds[leave_td];
[dab3112]253
254 /* Make sure that we are leaving the right TD behind */
[e20eaed]255 const uint32_t pa = addr_to_phys(ohci_ep->td);
[9c10e51]256 assert(pa == (ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK));
257 assert(pa == (ohci_batch->ed->td_tail & ED_TDTAIL_PTR_MASK));
[d6522dd]258
[f1be95c8]259 return true;
[f98b8269]260}
261/*----------------------------------------------------------------------------*/
[28d9c95]262/** Starts execution of the TD list
263 *
[5f57929]264 * @param[in] ohci_batch Batch structure to use
[28d9c95]265 */
[11cb0565]266void ohci_transfer_batch_commit(const ohci_transfer_batch_t *ohci_batch)
[7013b14]267{
[9c10e51]268 assert(ohci_batch);
[9515f674]269 ed_set_tail_td(ohci_batch->ed, ohci_batch->tds[ohci_batch->td_count]);
[7013b14]270}
271/*----------------------------------------------------------------------------*/
[28d9c95]272/** Prepare generic control transfer
273 *
[5f57929]274 * @param[in] ohci_batch Batch structure to use.
[058fd76]275 * @param[in] dir Communication direction
[28d9c95]276 *
277 * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
278 * Data stage with alternating toggle and direction supplied by parameter.
279 * Status stage with toggle 1 and direction supplied by parameter.
280 */
[058fd76]281static void batch_control(ohci_transfer_batch_t *ohci_batch, usb_direction_t dir)
[7786cea]282{
[9c10e51]283 assert(ohci_batch);
284 assert(ohci_batch->usb_batch);
[058fd76]285 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
[49a98c8]286 usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.\n", ohci_batch->ed,
[9c10e51]287 ohci_batch->ed->status, ohci_batch->ed->td_tail,
288 ohci_batch->ed->td_head, ohci_batch->ed->next);
[058fd76]289 static const usb_direction_t reverse_dir[] = {
290 [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
291 [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
292 };
[9c10e51]293
[e42dd32]294 int toggle = 0;
[058fd76]295 const char* buffer = ohci_batch->device_buffer;
296 const usb_direction_t data_dir = dir;
297 const usb_direction_t status_dir = reverse_dir[dir];
[9c10e51]298
[dab3112]299 /* Setup stage */
[70d72dd]300 td_init(
301 ohci_batch->tds[0], ohci_batch->tds[1], USB_DIRECTION_BOTH,
302 buffer, ohci_batch->usb_batch->setup_size, toggle);
[49a98c8]303 usb_log_debug("Created CONTROL SETUP TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]304 ohci_batch->tds[0]->status, ohci_batch->tds[0]->cbp,
305 ohci_batch->tds[0]->next, ohci_batch->tds[0]->be);
306 buffer += ohci_batch->usb_batch->setup_size;
[e42dd32]307
[dab3112]308 /* Data stage */
[e42dd32]309 size_t td_current = 1;
[9c10e51]310 size_t remain_size = ohci_batch->usb_batch->buffer_size;
[e42dd32]311 while (remain_size > 0) {
[9c10e51]312 const size_t transfer_size =
[3f162ab]313 min(remain_size, OHCI_TD_MAX_TRANSFER);
[e42dd32]314 toggle = 1 - toggle;
315
[70d72dd]316 td_init(ohci_batch->tds[td_current],
317 ohci_batch->tds[td_current + 1],
318 data_dir, buffer, transfer_size, toggle);
[49a98c8]319 usb_log_debug("Created CONTROL DATA TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]320 ohci_batch->tds[td_current]->status,
321 ohci_batch->tds[td_current]->cbp,
322 ohci_batch->tds[td_current]->next,
323 ohci_batch->tds[td_current]->be);
[e42dd32]324
[d017cea]325 buffer += transfer_size;
[e42dd32]326 remain_size -= transfer_size;
[9c10e51]327 assert(td_current < ohci_batch->td_count - 1);
[e42dd32]328 ++td_current;
329 }
330
[dab3112]331 /* Status stage */
[9c10e51]332 assert(td_current == ohci_batch->td_count - 1);
[70d72dd]333 td_init(ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
334 status_dir, NULL, 0, 1);
[49a98c8]335 usb_log_debug("Created CONTROL STATUS TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]336 ohci_batch->tds[td_current]->status,
337 ohci_batch->tds[td_current]->cbp,
338 ohci_batch->tds[td_current]->next,
339 ohci_batch->tds[td_current]->be);
[058fd76]340 usb_log_debug2(
341 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
342 ohci_batch->usb_batch,
343 usb_str_transfer_type(ohci_batch->usb_batch->ep->transfer_type),
344 usb_str_direction(dir),
345 USB_TRANSFER_BATCH_ARGS(*ohci_batch->usb_batch));
[f98b8269]346}
347/*----------------------------------------------------------------------------*/
[28d9c95]348/** Prepare generic data transfer
349 *
[5f57929]350 * @param[in] ohci_batch Batch structure to use.
[058fd76]351 * @paramp[in] dir Communication direction.
[28d9c95]352 *
353 * Direction is supplied by the associated ep and toggle is maintained by the
354 * OHCI hw in ED.
355 */
[058fd76]356static void batch_data(ohci_transfer_batch_t *ohci_batch, usb_direction_t dir)
[c6fe469]357{
[9c10e51]358 assert(ohci_batch);
[058fd76]359 assert(ohci_batch->usb_batch);
360 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
[49a98c8]361 usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.\n", ohci_batch->ed,
[9c10e51]362 ohci_batch->ed->status, ohci_batch->ed->td_tail,
363 ohci_batch->ed->td_head, ohci_batch->ed->next);
[c6fe469]364
[aa9ccf7]365 size_t td_current = 0;
[9c10e51]366 size_t remain_size = ohci_batch->usb_batch->buffer_size;
367 char *buffer = ohci_batch->device_buffer;
[c6fe469]368 while (remain_size > 0) {
[02cacce]369 const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER
370 ? OHCI_TD_MAX_TRANSFER : remain_size;
[c6fe469]371
[70d72dd]372 td_init(
373 ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
374 dir, buffer, transfer_size, -1);
[058fd76]375
[49a98c8]376 usb_log_debug("Created DATA TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]377 ohci_batch->tds[td_current]->status,
378 ohci_batch->tds[td_current]->cbp,
379 ohci_batch->tds[td_current]->next,
380 ohci_batch->tds[td_current]->be);
[c6fe469]381
[d017cea]382 buffer += transfer_size;
[c6fe469]383 remain_size -= transfer_size;
[9c10e51]384 assert(td_current < ohci_batch->td_count);
[c6fe469]385 ++td_current;
386 }
[5f57929]387 usb_log_debug2(
388 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
389 ohci_batch->usb_batch,
[7bce1fc]390 usb_str_transfer_type(ohci_batch->usb_batch->ep->transfer_type),
[058fd76]391 usb_str_direction(dir),
[5f57929]392 USB_TRANSFER_BATCH_ARGS(*ohci_batch->usb_batch));
[7bce1fc]393}
394/*----------------------------------------------------------------------------*/
[6fa04db]395/** Transfer setup table. */
[790318e]396static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t) =
[7bce1fc]397{
[790318e]398 [USB_TRANSFER_CONTROL] = batch_control,
399 [USB_TRANSFER_BULK] = batch_data,
400 [USB_TRANSFER_INTERRUPT] = batch_data,
401 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[7bce1fc]402};
[41b96b4]403/**
404 * @}
405 */
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