source: mainline/uspace/drv/bus/usb/ohci/ohci_batch.c@ 21f36e04

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 21f36e04 was 584aa38, checked in by Jan Vesely <jano.vesely@…>, 12 years ago

ohci: Remove error checking macro

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File size: 13.8 KB
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[41b96b4]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[81dce9f]28/** @addtogroup drvusbohci
[41b96b4]29 * @{
30 */
31/** @file
32 * @brief OHCI driver USB transaction structure
33 */
[0d4b110]34
35#include <assert.h>
[41b96b4]36#include <errno.h>
[3f162ab]37#include <macros.h>
[0d4b110]38#include <mem.h>
39#include <stdbool.h>
[41b96b4]40
41#include <usb/usb.h>
42#include <usb/debug.h>
43
[ff6dd73]44#include "ohci_batch.h"
[e20eaed]45#include "ohci_endpoint.h"
[2bf8f8c]46#include "utils/malloc32.h"
[09ace19]47
[790318e]48static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t);
[76fbd9a]49
[28d9c95]50/** Safely destructs ohci_transfer_batch_t structure
51 *
52 * @param[in] ohci_batch Instance to destroy.
53 */
[9c10e51]54static void ohci_transfer_batch_dispose(ohci_transfer_batch_t *ohci_batch)
[2cc6e97]55{
[9c10e51]56 if (!ohci_batch)
[9a6fde4]57 return;
[9c10e51]58 if (ohci_batch->tds) {
[11cb0565]59 const ohci_endpoint_t *ohci_ep =
60 ohci_endpoint_get(ohci_batch->usb_batch->ep);
61 assert(ohci_ep);
[9b8958b]62 for (unsigned i = 0; i < ohci_batch->td_count; ++i) {
[11cb0565]63 if (ohci_batch->tds[i] != ohci_ep->td)
[9c10e51]64 free32(ohci_batch->tds[i]);
[9a6fde4]65 }
[9c10e51]66 free(ohci_batch->tds);
[9a6fde4]67 }
[549ff23]68 usb_transfer_batch_destroy(ohci_batch->usb_batch);
[9c10e51]69 free32(ohci_batch->device_buffer);
70 free(ohci_batch);
[2cc6e97]71}
[76fbd9a]72
[6fa04db]73/** Finishes usb_transfer_batch and destroys the structure.
74 *
75 * @param[in] uhci_batch Instance to finish and destroy.
76 */
[9c10e51]77void ohci_transfer_batch_finish_dispose(ohci_transfer_batch_t *ohci_batch)
[e2976bb]78{
[9c10e51]79 assert(ohci_batch);
80 assert(ohci_batch->usb_batch);
81 usb_transfer_batch_finish(ohci_batch->usb_batch,
[5cfcc64]82 ohci_batch->device_buffer + ohci_batch->usb_batch->setup_size);
[9c10e51]83 ohci_transfer_batch_dispose(ohci_batch);
84}
[76fbd9a]85
[6fa04db]86/** Allocate memory and initialize internal data structure.
87 *
88 * @param[in] usb_batch Pointer to generic USB batch structure.
89 * @return Valid pointer if all structures were successfully created,
90 * NULL otherwise.
91 *
92 * Determines the number of needed transfer descriptors (TDs).
93 * Prepares a transport buffer (that is accessible by the hardware).
94 * Initializes parameters needed for the transfer and callback.
95 */
[9c10e51]96ohci_transfer_batch_t * ohci_transfer_batch_get(usb_transfer_batch_t *usb_batch)
97{
98 assert(usb_batch);
[e2976bb]99
[9c10e51]100 ohci_transfer_batch_t *ohci_batch =
[8e3d17f]101 calloc(1, sizeof(ohci_transfer_batch_t));
[584aa38]102 if (!ohci_batch) {
103 usb_log_error("Failed to allocate OHCI batch data.");
104 goto dispose;
105 }
[7bce1fc]106 link_initialize(&ohci_batch->link);
[9c10e51]107 ohci_batch->td_count =
108 (usb_batch->buffer_size + OHCI_TD_MAX_TRANSFER - 1)
109 / OHCI_TD_MAX_TRANSFER;
[e2976bb]110 /* Control transfer need Setup and Status stage */
[9c10e51]111 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
112 ohci_batch->td_count += 2;
[e2976bb]113 }
114
[f974519]115 /* We need an extra place for TD that was left at ED */
[9c10e51]116 ohci_batch->tds = calloc(ohci_batch->td_count + 1, sizeof(td_t*));
[584aa38]117 if (!ohci_batch->tds) {
118 usb_log_error("Failed to allocate OHCI transfer descriptors.");
119 goto dispose;
120 }
[e2976bb]121
122 /* Add TD left over by the previous transfer */
[9c10e51]123 ohci_batch->ed = ohci_endpoint_get(usb_batch->ep)->ed;
124 ohci_batch->tds[0] = ohci_endpoint_get(usb_batch->ep)->td;
[9b8958b]125
126 for (unsigned i = 1; i <= ohci_batch->td_count; ++i) {
[9c10e51]127 ohci_batch->tds[i] = malloc32(sizeof(td_t));
[584aa38]128 if (!ohci_batch->tds[i]) {
129 usb_log_error("Failed to allocate TD %d.", i);
130 goto dispose;
131 }
[e2976bb]132 }
133
134
135 /* NOTE: OHCI is capable of handling buffer that crosses page boundaries
136 * it is, however, not capable of handling buffer that occupies more
137 * than two pages (the first page is computed using start pointer, the
138 * other using the end pointer) */
[9c10e51]139 if (usb_batch->setup_size + usb_batch->buffer_size > 0) {
140 /* Use one buffer for setup and data stage */
141 ohci_batch->device_buffer =
142 malloc32(usb_batch->setup_size + usb_batch->buffer_size);
[584aa38]143 if (!ohci_batch->device_buffer) {
144 usb_log_error("Failed to allocate device buffer");
145 goto dispose;
146 }
[f974519]147 /* Copy setup data */
[9c10e51]148 memcpy(ohci_batch->device_buffer, usb_batch->setup_buffer,
149 usb_batch->setup_size);
150 /* Copy generic data */
151 if (usb_batch->ep->direction != USB_DIRECTION_IN)
152 memcpy(
153 ohci_batch->device_buffer + usb_batch->setup_size,
154 usb_batch->buffer, usb_batch->buffer_size);
[e2976bb]155 }
[9c10e51]156 ohci_batch->usb_batch = usb_batch;
[e2976bb]157
[058fd76]158 const usb_direction_t dir = usb_transfer_batch_direction(usb_batch);
[790318e]159 assert(batch_setup[usb_batch->ep->transfer_type]);
160 batch_setup[usb_batch->ep->transfer_type](ohci_batch, dir);
[90dd59dc]161
[9c10e51]162 return ohci_batch;
[584aa38]163dispose:
164 ohci_transfer_batch_dispose(ohci_batch);
165 return NULL;
[e2976bb]166}
[76fbd9a]167
[28d9c95]168/** Check batch TDs' status.
169 *
[5f57929]170 * @param[in] ohci_batch Batch structure to use.
[28d9c95]171 * @return False, if there is an active TD, true otherwise.
172 *
173 * Walk all TDs (usually there is just one). Stop with false if there is an
174 * active TD. Stop with true if an error is found. Return true if the walk
175 * completes with the last TD.
176 */
[11cb0565]177bool ohci_transfer_batch_is_complete(const ohci_transfer_batch_t *ohci_batch)
[f98b8269]178{
[9c10e51]179 assert(ohci_batch);
180 assert(ohci_batch->usb_batch);
181
182 usb_log_debug("Batch %p checking %zu td(s) for completion.\n",
183 ohci_batch->usb_batch, ohci_batch->td_count);
[49a98c8]184 usb_log_debug2("ED: %08x:%08x:%08x:%08x.\n",
[9c10e51]185 ohci_batch->ed->status, ohci_batch->ed->td_head,
186 ohci_batch->ed->td_tail, ohci_batch->ed->next);
187
[d5abaf4]188 if (!ed_inactive(ohci_batch->ed) && ed_transfer_pending(ohci_batch->ed))
189 return false;
190
191 /* Now we may be sure that either the ED is inactive because of errors
192 * or all transfer descriptors completed successfully */
193
194 /* Assume all data got through */
195 ohci_batch->usb_batch->transfered_size =
196 ohci_batch->usb_batch->buffer_size;
[dab3112]197
198 /* Assume we will leave the last(unused) TD behind */
[11cb0565]199 unsigned leave_td = ohci_batch->td_count;
[d5abaf4]200
201 /* Check all TDs */
202 for (size_t i = 0; i < ohci_batch->td_count; ++i) {
[9c10e51]203 assert(ohci_batch->tds[i] != NULL);
[49a98c8]204 usb_log_debug("TD %zu: %08x:%08x:%08x:%08x.\n", i,
[9c10e51]205 ohci_batch->tds[i]->status, ohci_batch->tds[i]->cbp,
206 ohci_batch->tds[i]->next, ohci_batch->tds[i]->be);
[d5abaf4]207
[9c10e51]208 ohci_batch->usb_batch->error = td_error(ohci_batch->tds[i]);
[7f7e6f5]209 if (ohci_batch->usb_batch->error == EOK) {
210 /* If the TD got all its data through, it will report
211 * 0 bytes remain, the sole exception is INPUT with
212 * data rounding flag (short), i.e. every INPUT.
213 * Nice thing is that short packets will correctly
214 * report remaining data, thus making this computation
215 * correct (short packets need to be produced by the
216 * last TD)
217 * NOTE: This also works for CONTROL transfer as
218 * the first TD will return 0 remain.
219 * NOTE: Short packets don't break the assumption that
220 * we leave the very last(unused) TD behind.
221 */
222 ohci_batch->usb_batch->transfered_size
223 -= td_remain_size(ohci_batch->tds[i]);
224 } else {
[49a98c8]225 usb_log_debug("Batch %p found error TD(%zu):%08x.\n",
[9c10e51]226 ohci_batch->usb_batch, i,
227 ohci_batch->tds[i]->status);
[d5abaf4]228
229 /* ED should be stopped because of errors */
230 assert((ohci_batch->ed->td_head & ED_TDHEAD_HALTED_FLAG) != 0);
231
232 /* Now we have a problem: we don't know what TD
233 * the head pointer points to, the retiring rules
234 * described in specs say it should be the one after
235 * the failed one so set the tail pointer accordingly.
236 * It will be the one TD we leave behind.
237 */
[11cb0565]238 leave_td = i + 1;
[d5abaf4]239
240 /* Check TD assumption */
[65eac7b]241 assert(ed_head_td(ohci_batch->ed) ==
242 addr_to_phys(ohci_batch->tds[leave_td]));
[d5abaf4]243
[65eac7b]244 /* Set tail to the same TD */
[d5abaf4]245 ed_set_tail_td(ohci_batch->ed,
[11cb0565]246 ohci_batch->tds[leave_td]);
[d5abaf4]247
248 /* Clear possible ED HALT */
[65eac7b]249 ed_clear_halt(ohci_batch->ed);
[9a6fde4]250 break;
[f1be95c8]251 }
252 }
[d5abaf4]253 assert(ohci_batch->usb_batch->transfered_size <=
254 ohci_batch->usb_batch->buffer_size);
[e20eaed]255
[d5abaf4]256 /* Store the remaining TD */
[9c10e51]257 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ohci_batch->usb_batch->ep);
[e20eaed]258 assert(ohci_ep);
[11cb0565]259 ohci_ep->td = ohci_batch->tds[leave_td];
[dab3112]260
261 /* Make sure that we are leaving the right TD behind */
[65eac7b]262 assert(addr_to_phys(ohci_ep->td) == ed_head_td(ohci_batch->ed));
263 assert(addr_to_phys(ohci_ep->td) == ed_tail_td(ohci_batch->ed));
[d6522dd]264
[f1be95c8]265 return true;
[f98b8269]266}
[76fbd9a]267
[28d9c95]268/** Starts execution of the TD list
269 *
[5f57929]270 * @param[in] ohci_batch Batch structure to use
[28d9c95]271 */
[11cb0565]272void ohci_transfer_batch_commit(const ohci_transfer_batch_t *ohci_batch)
[7013b14]273{
[9c10e51]274 assert(ohci_batch);
[9515f674]275 ed_set_tail_td(ohci_batch->ed, ohci_batch->tds[ohci_batch->td_count]);
[7013b14]276}
[76fbd9a]277
[28d9c95]278/** Prepare generic control transfer
279 *
[5f57929]280 * @param[in] ohci_batch Batch structure to use.
[058fd76]281 * @param[in] dir Communication direction
[28d9c95]282 *
283 * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
284 * Data stage with alternating toggle and direction supplied by parameter.
285 * Status stage with toggle 1 and direction supplied by parameter.
286 */
[058fd76]287static void batch_control(ohci_transfer_batch_t *ohci_batch, usb_direction_t dir)
[7786cea]288{
[9c10e51]289 assert(ohci_batch);
290 assert(ohci_batch->usb_batch);
[058fd76]291 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
[49a98c8]292 usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.\n", ohci_batch->ed,
[9c10e51]293 ohci_batch->ed->status, ohci_batch->ed->td_tail,
294 ohci_batch->ed->td_head, ohci_batch->ed->next);
[058fd76]295 static const usb_direction_t reverse_dir[] = {
296 [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
297 [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
298 };
[9c10e51]299
[e42dd32]300 int toggle = 0;
[058fd76]301 const char* buffer = ohci_batch->device_buffer;
302 const usb_direction_t data_dir = dir;
303 const usb_direction_t status_dir = reverse_dir[dir];
[9c10e51]304
[dab3112]305 /* Setup stage */
[70d72dd]306 td_init(
307 ohci_batch->tds[0], ohci_batch->tds[1], USB_DIRECTION_BOTH,
308 buffer, ohci_batch->usb_batch->setup_size, toggle);
[49a98c8]309 usb_log_debug("Created CONTROL SETUP TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]310 ohci_batch->tds[0]->status, ohci_batch->tds[0]->cbp,
311 ohci_batch->tds[0]->next, ohci_batch->tds[0]->be);
312 buffer += ohci_batch->usb_batch->setup_size;
[e42dd32]313
[dab3112]314 /* Data stage */
[e42dd32]315 size_t td_current = 1;
[9c10e51]316 size_t remain_size = ohci_batch->usb_batch->buffer_size;
[e42dd32]317 while (remain_size > 0) {
[9c10e51]318 const size_t transfer_size =
[3f162ab]319 min(remain_size, OHCI_TD_MAX_TRANSFER);
[e42dd32]320 toggle = 1 - toggle;
321
[70d72dd]322 td_init(ohci_batch->tds[td_current],
323 ohci_batch->tds[td_current + 1],
324 data_dir, buffer, transfer_size, toggle);
[49a98c8]325 usb_log_debug("Created CONTROL DATA TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]326 ohci_batch->tds[td_current]->status,
327 ohci_batch->tds[td_current]->cbp,
328 ohci_batch->tds[td_current]->next,
329 ohci_batch->tds[td_current]->be);
[e42dd32]330
[d017cea]331 buffer += transfer_size;
[e42dd32]332 remain_size -= transfer_size;
[9c10e51]333 assert(td_current < ohci_batch->td_count - 1);
[e42dd32]334 ++td_current;
335 }
336
[dab3112]337 /* Status stage */
[9c10e51]338 assert(td_current == ohci_batch->td_count - 1);
[70d72dd]339 td_init(ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
340 status_dir, NULL, 0, 1);
[49a98c8]341 usb_log_debug("Created CONTROL STATUS TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]342 ohci_batch->tds[td_current]->status,
343 ohci_batch->tds[td_current]->cbp,
344 ohci_batch->tds[td_current]->next,
345 ohci_batch->tds[td_current]->be);
[058fd76]346 usb_log_debug2(
347 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
348 ohci_batch->usb_batch,
349 usb_str_transfer_type(ohci_batch->usb_batch->ep->transfer_type),
350 usb_str_direction(dir),
351 USB_TRANSFER_BATCH_ARGS(*ohci_batch->usb_batch));
[f98b8269]352}
[76fbd9a]353
[28d9c95]354/** Prepare generic data transfer
355 *
[5f57929]356 * @param[in] ohci_batch Batch structure to use.
[058fd76]357 * @paramp[in] dir Communication direction.
[28d9c95]358 *
359 * Direction is supplied by the associated ep and toggle is maintained by the
360 * OHCI hw in ED.
361 */
[058fd76]362static void batch_data(ohci_transfer_batch_t *ohci_batch, usb_direction_t dir)
[c6fe469]363{
[9c10e51]364 assert(ohci_batch);
[058fd76]365 assert(ohci_batch->usb_batch);
366 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
[49a98c8]367 usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.\n", ohci_batch->ed,
[9c10e51]368 ohci_batch->ed->status, ohci_batch->ed->td_tail,
369 ohci_batch->ed->td_head, ohci_batch->ed->next);
[c6fe469]370
[aa9ccf7]371 size_t td_current = 0;
[9c10e51]372 size_t remain_size = ohci_batch->usb_batch->buffer_size;
373 char *buffer = ohci_batch->device_buffer;
[c6fe469]374 while (remain_size > 0) {
[02cacce]375 const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER
376 ? OHCI_TD_MAX_TRANSFER : remain_size;
[c6fe469]377
[70d72dd]378 td_init(
379 ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
380 dir, buffer, transfer_size, -1);
[058fd76]381
[49a98c8]382 usb_log_debug("Created DATA TD: %08x:%08x:%08x:%08x.\n",
[9c10e51]383 ohci_batch->tds[td_current]->status,
384 ohci_batch->tds[td_current]->cbp,
385 ohci_batch->tds[td_current]->next,
386 ohci_batch->tds[td_current]->be);
[c6fe469]387
[d017cea]388 buffer += transfer_size;
[c6fe469]389 remain_size -= transfer_size;
[9c10e51]390 assert(td_current < ohci_batch->td_count);
[c6fe469]391 ++td_current;
392 }
[5f57929]393 usb_log_debug2(
394 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
395 ohci_batch->usb_batch,
[7bce1fc]396 usb_str_transfer_type(ohci_batch->usb_batch->ep->transfer_type),
[058fd76]397 usb_str_direction(dir),
[5f57929]398 USB_TRANSFER_BATCH_ARGS(*ohci_batch->usb_batch));
[7bce1fc]399}
[76fbd9a]400
[6fa04db]401/** Transfer setup table. */
[790318e]402static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t) =
[7bce1fc]403{
[790318e]404 [USB_TRANSFER_CONTROL] = batch_control,
405 [USB_TRANSFER_BULK] = batch_data,
406 [USB_TRANSFER_INTERRUPT] = batch_data,
407 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[7bce1fc]408};
[41b96b4]409/**
410 * @}
411 */
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