[41b96b4] | 1 | /*
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| 2 | * Copyright (c) 2011 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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[81dce9f] | 28 | /** @addtogroup drvusbohci
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[41b96b4] | 29 | * @{
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| 30 | */
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| 31 | /** @file
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| 32 | * @brief OHCI driver USB transaction structure
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| 33 | */
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| 34 | #include <errno.h>
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| 35 | #include <str_error.h>
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| 36 |
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| 37 | #include <usb/usb.h>
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| 38 | #include <usb/debug.h>
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| 39 |
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[ff6dd73] | 40 | #include "ohci_batch.h"
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[e20eaed] | 41 | #include "ohci_endpoint.h"
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[2bf8f8c] | 42 | #include "utils/malloc32.h"
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[09ace19] | 43 |
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[790318e] | 44 | static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t);
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[28d9c95] | 45 | /*----------------------------------------------------------------------------*/
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| 46 | /** Safely destructs ohci_transfer_batch_t structure
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| 47 | *
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| 48 | * @param[in] ohci_batch Instance to destroy.
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| 49 | */
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[9c10e51] | 50 | static void ohci_transfer_batch_dispose(ohci_transfer_batch_t *ohci_batch)
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[2cc6e97] | 51 | {
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[9c10e51] | 52 | if (!ohci_batch)
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[9a6fde4] | 53 | return;
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[9c10e51] | 54 | if (ohci_batch->tds) {
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[9b8958b] | 55 | for (unsigned i = 0; i < ohci_batch->td_count; ++i) {
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[9c10e51] | 56 | if (i != ohci_batch->leave_td)
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| 57 | free32(ohci_batch->tds[i]);
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[9a6fde4] | 58 | }
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[9c10e51] | 59 | free(ohci_batch->tds);
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[9a6fde4] | 60 | }
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[549ff23] | 61 | usb_transfer_batch_destroy(ohci_batch->usb_batch);
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[9c10e51] | 62 | free32(ohci_batch->device_buffer);
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| 63 | free(ohci_batch);
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[2cc6e97] | 64 | }
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[9a6fde4] | 65 | /*----------------------------------------------------------------------------*/
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[9c10e51] | 66 | void ohci_transfer_batch_finish_dispose(ohci_transfer_batch_t *ohci_batch)
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[e2976bb] | 67 | {
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[9c10e51] | 68 | assert(ohci_batch);
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| 69 | assert(ohci_batch->usb_batch);
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| 70 | usb_transfer_batch_finish(ohci_batch->usb_batch,
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| 71 | ohci_batch->device_buffer + ohci_batch->usb_batch->setup_size,
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| 72 | ohci_batch->usb_batch->buffer_size);
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| 73 | ohci_transfer_batch_dispose(ohci_batch);
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| 74 | }
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| 75 | /*----------------------------------------------------------------------------*/
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| 76 | ohci_transfer_batch_t * ohci_transfer_batch_get(usb_transfer_batch_t *usb_batch)
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| 77 | {
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| 78 | assert(usb_batch);
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| 79 | #define CHECK_NULL_DISPOSE_RET(ptr, message...) \
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| 80 | if (ptr == NULL) { \
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| 81 | usb_log_error(message); \
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| 82 | ohci_transfer_batch_dispose(ohci_batch); \
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| 83 | return NULL; \
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| 84 | } else (void)0
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[e2976bb] | 85 |
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[9c10e51] | 86 | ohci_transfer_batch_t *ohci_batch =
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[8e3d17f] | 87 | calloc(1, sizeof(ohci_transfer_batch_t));
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[9c10e51] | 88 | CHECK_NULL_DISPOSE_RET(ohci_batch,
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| 89 | "Failed to allocate OHCI batch data.\n");
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[7bce1fc] | 90 | link_initialize(&ohci_batch->link);
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[9c10e51] | 91 | ohci_batch->td_count =
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| 92 | (usb_batch->buffer_size + OHCI_TD_MAX_TRANSFER - 1)
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| 93 | / OHCI_TD_MAX_TRANSFER;
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[e2976bb] | 94 | /* Control transfer need Setup and Status stage */
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[9c10e51] | 95 | if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
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| 96 | ohci_batch->td_count += 2;
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[e2976bb] | 97 | }
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| 98 |
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[f974519] | 99 | /* We need an extra place for TD that was left at ED */
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[9c10e51] | 100 | ohci_batch->tds = calloc(ohci_batch->td_count + 1, sizeof(td_t*));
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| 101 | CHECK_NULL_DISPOSE_RET(ohci_batch->tds,
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| 102 | "Failed to allocate OHCI transfer descriptors.\n");
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[e2976bb] | 103 |
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| 104 | /* Add TD left over by the previous transfer */
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[9c10e51] | 105 | ohci_batch->ed = ohci_endpoint_get(usb_batch->ep)->ed;
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| 106 | ohci_batch->tds[0] = ohci_endpoint_get(usb_batch->ep)->td;
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| 107 | ohci_batch->leave_td = 0;
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[9b8958b] | 108 |
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| 109 | for (unsigned i = 1; i <= ohci_batch->td_count; ++i) {
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[9c10e51] | 110 | ohci_batch->tds[i] = malloc32(sizeof(td_t));
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| 111 | CHECK_NULL_DISPOSE_RET(ohci_batch->tds[i],
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[e2976bb] | 112 | "Failed to allocate TD %d.\n", i );
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| 113 | }
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| 114 |
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| 115 |
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| 116 | /* NOTE: OHCI is capable of handling buffer that crosses page boundaries
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| 117 | * it is, however, not capable of handling buffer that occupies more
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| 118 | * than two pages (the first page is computed using start pointer, the
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| 119 | * other using the end pointer) */
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[9c10e51] | 120 | if (usb_batch->setup_size + usb_batch->buffer_size > 0) {
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| 121 | /* Use one buffer for setup and data stage */
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| 122 | ohci_batch->device_buffer =
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| 123 | malloc32(usb_batch->setup_size + usb_batch->buffer_size);
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| 124 | CHECK_NULL_DISPOSE_RET(ohci_batch->device_buffer,
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[e2976bb] | 125 | "Failed to allocate device accessible buffer.\n");
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[f974519] | 126 | /* Copy setup data */
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[9c10e51] | 127 | memcpy(ohci_batch->device_buffer, usb_batch->setup_buffer,
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| 128 | usb_batch->setup_size);
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| 129 | /* Copy generic data */
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| 130 | if (usb_batch->ep->direction != USB_DIRECTION_IN)
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| 131 | memcpy(
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| 132 | ohci_batch->device_buffer + usb_batch->setup_size,
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| 133 | usb_batch->buffer, usb_batch->buffer_size);
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[e2976bb] | 134 | }
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[9c10e51] | 135 | ohci_batch->usb_batch = usb_batch;
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[e2976bb] | 136 |
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[058fd76] | 137 | const usb_direction_t dir = usb_transfer_batch_direction(usb_batch);
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[790318e] | 138 | assert(batch_setup[usb_batch->ep->transfer_type]);
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| 139 | batch_setup[usb_batch->ep->transfer_type](ohci_batch, dir);
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[90dd59dc] | 140 |
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[9c10e51] | 141 | return ohci_batch;
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| 142 | #undef CHECK_NULL_DISPOSE_RET
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[e2976bb] | 143 | }
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| 144 | /*----------------------------------------------------------------------------*/
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[28d9c95] | 145 | /** Check batch TDs' status.
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| 146 | *
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[5f57929] | 147 | * @param[in] ohci_batch Batch structure to use.
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[28d9c95] | 148 | * @return False, if there is an active TD, true otherwise.
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| 149 | *
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| 150 | * Walk all TDs (usually there is just one). Stop with false if there is an
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| 151 | * active TD. Stop with true if an error is found. Return true if the walk
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| 152 | * completes with the last TD.
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| 153 | */
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[9c10e51] | 154 | bool ohci_transfer_batch_is_complete(ohci_transfer_batch_t *ohci_batch)
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[f98b8269] | 155 | {
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[9c10e51] | 156 | assert(ohci_batch);
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| 157 | assert(ohci_batch->usb_batch);
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| 158 |
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| 159 | usb_log_debug("Batch %p checking %zu td(s) for completion.\n",
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| 160 | ohci_batch->usb_batch, ohci_batch->td_count);
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[49a98c8] | 161 | usb_log_debug2("ED: %08x:%08x:%08x:%08x.\n",
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[9c10e51] | 162 | ohci_batch->ed->status, ohci_batch->ed->td_head,
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| 163 | ohci_batch->ed->td_tail, ohci_batch->ed->next);
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| 164 |
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[d5abaf4] | 165 | if (!ed_inactive(ohci_batch->ed) && ed_transfer_pending(ohci_batch->ed))
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| 166 | return false;
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| 167 |
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| 168 | /* Now we may be sure that either the ED is inactive because of errors
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| 169 | * or all transfer descriptors completed successfully */
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| 170 |
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| 171 | /* Assume all data got through */
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| 172 | ohci_batch->usb_batch->transfered_size =
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| 173 | ohci_batch->usb_batch->buffer_size;
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[dab3112] | 174 |
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| 175 | /* Assume we will leave the last(unused) TD behind */
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[d5abaf4] | 176 | ohci_batch->leave_td = ohci_batch->td_count;
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| 177 |
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| 178 | /* Check all TDs */
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| 179 | for (size_t i = 0; i < ohci_batch->td_count; ++i) {
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[9c10e51] | 180 | assert(ohci_batch->tds[i] != NULL);
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[49a98c8] | 181 | usb_log_debug("TD %zu: %08x:%08x:%08x:%08x.\n", i,
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[9c10e51] | 182 | ohci_batch->tds[i]->status, ohci_batch->tds[i]->cbp,
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| 183 | ohci_batch->tds[i]->next, ohci_batch->tds[i]->be);
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[d5abaf4] | 184 |
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| 185 | /* If the TD got all its data through, it will report 0 bytes
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| 186 | * remain, the sole exception is INPUT with data rounding flag
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| 187 | * (short), i.e. every INPUT. Nice thing is that short packets
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| 188 | * will correctly report remaining data, thus making
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| 189 | * this computation correct (short packets need to be produced
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| 190 | * by the last TD)
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| 191 | * NOTE: This also works for CONTROL transfer as
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| 192 | * the first TD will return 0 remain.
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| 193 | * NOTE: Short packets don't break the assumption that
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| 194 | * we leave the very last(unused) TD behind.
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| 195 | */
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| 196 | ohci_batch->usb_batch->transfered_size
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| 197 | -= td_remain_size(ohci_batch->tds[i]);
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| 198 |
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[9c10e51] | 199 | ohci_batch->usb_batch->error = td_error(ohci_batch->tds[i]);
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| 200 | if (ohci_batch->usb_batch->error != EOK) {
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[49a98c8] | 201 | usb_log_debug("Batch %p found error TD(%zu):%08x.\n",
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[9c10e51] | 202 | ohci_batch->usb_batch, i,
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| 203 | ohci_batch->tds[i]->status);
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[d5abaf4] | 204 |
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| 205 | /* ED should be stopped because of errors */
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| 206 | assert((ohci_batch->ed->td_head & ED_TDHEAD_HALTED_FLAG) != 0);
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| 207 |
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| 208 | /* Now we have a problem: we don't know what TD
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| 209 | * the head pointer points to, the retiring rules
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| 210 | * described in specs say it should be the one after
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| 211 | * the failed one so set the tail pointer accordingly.
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| 212 | * It will be the one TD we leave behind.
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| 213 | */
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| 214 | ohci_batch->leave_td = i + 1;
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| 215 |
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| 216 | /* Check TD assumption */
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| 217 | const uint32_t pa = addr_to_phys(
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| 218 | ohci_batch->tds[ohci_batch->leave_td]);
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| 219 | assert((ohci_batch->ed->td_head & ED_TDTAIL_PTR_MASK)
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| 220 | == pa);
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| 221 |
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| 222 | ed_set_tail_td(ohci_batch->ed,
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| 223 | ohci_batch->tds[ohci_batch->leave_td]);
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| 224 |
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| 225 | /* Clear possible ED HALT */
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| 226 | ohci_batch->ed->td_head &= ~ED_TDHEAD_HALTED_FLAG;
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[9a6fde4] | 227 | break;
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[f1be95c8] | 228 | }
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| 229 | }
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[d5abaf4] | 230 | assert(ohci_batch->usb_batch->transfered_size <=
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| 231 | ohci_batch->usb_batch->buffer_size);
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[e20eaed] | 232 |
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[d5abaf4] | 233 | /* Store the remaining TD */
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[9c10e51] | 234 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ohci_batch->usb_batch->ep);
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[e20eaed] | 235 | assert(ohci_ep);
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[9c10e51] | 236 | ohci_ep->td = ohci_batch->tds[ohci_batch->leave_td];
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[dab3112] | 237 |
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| 238 | /* Make sure that we are leaving the right TD behind */
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[e20eaed] | 239 | const uint32_t pa = addr_to_phys(ohci_ep->td);
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[9c10e51] | 240 | assert(pa == (ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK));
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| 241 | assert(pa == (ohci_batch->ed->td_tail & ED_TDTAIL_PTR_MASK));
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[d6522dd] | 242 |
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[f1be95c8] | 243 | return true;
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[f98b8269] | 244 | }
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| 245 | /*----------------------------------------------------------------------------*/
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[28d9c95] | 246 | /** Starts execution of the TD list
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| 247 | *
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[5f57929] | 248 | * @param[in] ohci_batch Batch structure to use
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[28d9c95] | 249 | */
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[9c10e51] | 250 | void ohci_transfer_batch_commit(ohci_transfer_batch_t *ohci_batch)
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[7013b14] | 251 | {
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[9c10e51] | 252 | assert(ohci_batch);
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[9515f674] | 253 | ed_set_tail_td(ohci_batch->ed, ohci_batch->tds[ohci_batch->td_count]);
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[7013b14] | 254 | }
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| 255 | /*----------------------------------------------------------------------------*/
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[28d9c95] | 256 | /** Prepare generic control transfer
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| 257 | *
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[5f57929] | 258 | * @param[in] ohci_batch Batch structure to use.
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[058fd76] | 259 | * @param[in] dir Communication direction
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[28d9c95] | 260 | *
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| 261 | * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
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| 262 | * Data stage with alternating toggle and direction supplied by parameter.
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| 263 | * Status stage with toggle 1 and direction supplied by parameter.
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| 264 | */
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[058fd76] | 265 | static void batch_control(ohci_transfer_batch_t *ohci_batch, usb_direction_t dir)
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[7786cea] | 266 | {
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[9c10e51] | 267 | assert(ohci_batch);
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| 268 | assert(ohci_batch->usb_batch);
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[058fd76] | 269 | assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
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[49a98c8] | 270 | usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.\n", ohci_batch->ed,
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[9c10e51] | 271 | ohci_batch->ed->status, ohci_batch->ed->td_tail,
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| 272 | ohci_batch->ed->td_head, ohci_batch->ed->next);
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[058fd76] | 273 | static const usb_direction_t reverse_dir[] = {
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| 274 | [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
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| 275 | [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
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| 276 | };
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[9c10e51] | 277 |
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[e42dd32] | 278 | int toggle = 0;
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[058fd76] | 279 | const char* buffer = ohci_batch->device_buffer;
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| 280 | const usb_direction_t data_dir = dir;
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| 281 | const usb_direction_t status_dir = reverse_dir[dir];
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[9c10e51] | 282 |
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[dab3112] | 283 | /* Setup stage */
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[70d72dd] | 284 | td_init(
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| 285 | ohci_batch->tds[0], ohci_batch->tds[1], USB_DIRECTION_BOTH,
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| 286 | buffer, ohci_batch->usb_batch->setup_size, toggle);
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[49a98c8] | 287 | usb_log_debug("Created CONTROL SETUP TD: %08x:%08x:%08x:%08x.\n",
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[9c10e51] | 288 | ohci_batch->tds[0]->status, ohci_batch->tds[0]->cbp,
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| 289 | ohci_batch->tds[0]->next, ohci_batch->tds[0]->be);
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| 290 | buffer += ohci_batch->usb_batch->setup_size;
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[e42dd32] | 291 |
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[dab3112] | 292 | /* Data stage */
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[e42dd32] | 293 | size_t td_current = 1;
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[9c10e51] | 294 | size_t remain_size = ohci_batch->usb_batch->buffer_size;
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[e42dd32] | 295 | while (remain_size > 0) {
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[9c10e51] | 296 | const size_t transfer_size =
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| 297 | remain_size > OHCI_TD_MAX_TRANSFER ?
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[e42dd32] | 298 | OHCI_TD_MAX_TRANSFER : remain_size;
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| 299 | toggle = 1 - toggle;
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| 300 |
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[70d72dd] | 301 | td_init(ohci_batch->tds[td_current],
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| 302 | ohci_batch->tds[td_current + 1],
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| 303 | data_dir, buffer, transfer_size, toggle);
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[49a98c8] | 304 | usb_log_debug("Created CONTROL DATA TD: %08x:%08x:%08x:%08x.\n",
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[9c10e51] | 305 | ohci_batch->tds[td_current]->status,
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| 306 | ohci_batch->tds[td_current]->cbp,
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| 307 | ohci_batch->tds[td_current]->next,
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| 308 | ohci_batch->tds[td_current]->be);
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[e42dd32] | 309 |
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[d017cea] | 310 | buffer += transfer_size;
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[e42dd32] | 311 | remain_size -= transfer_size;
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[9c10e51] | 312 | assert(td_current < ohci_batch->td_count - 1);
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[e42dd32] | 313 | ++td_current;
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| 314 | }
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| 315 |
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[dab3112] | 316 | /* Status stage */
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[9c10e51] | 317 | assert(td_current == ohci_batch->td_count - 1);
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[70d72dd] | 318 | td_init(ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
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| 319 | status_dir, NULL, 0, 1);
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[49a98c8] | 320 | usb_log_debug("Created CONTROL STATUS TD: %08x:%08x:%08x:%08x.\n",
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[9c10e51] | 321 | ohci_batch->tds[td_current]->status,
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| 322 | ohci_batch->tds[td_current]->cbp,
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| 323 | ohci_batch->tds[td_current]->next,
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| 324 | ohci_batch->tds[td_current]->be);
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[058fd76] | 325 | usb_log_debug2(
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| 326 | "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
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| 327 | ohci_batch->usb_batch,
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| 328 | usb_str_transfer_type(ohci_batch->usb_batch->ep->transfer_type),
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| 329 | usb_str_direction(dir),
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| 330 | USB_TRANSFER_BATCH_ARGS(*ohci_batch->usb_batch));
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[f98b8269] | 331 | }
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| 332 | /*----------------------------------------------------------------------------*/
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[28d9c95] | 333 | /** Prepare generic data transfer
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| 334 | *
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[5f57929] | 335 | * @param[in] ohci_batch Batch structure to use.
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[058fd76] | 336 | * @paramp[in] dir Communication direction.
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[28d9c95] | 337 | *
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| 338 | * Direction is supplied by the associated ep and toggle is maintained by the
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| 339 | * OHCI hw in ED.
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| 340 | */
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[058fd76] | 341 | static void batch_data(ohci_transfer_batch_t *ohci_batch, usb_direction_t dir)
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[c6fe469] | 342 | {
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[9c10e51] | 343 | assert(ohci_batch);
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[058fd76] | 344 | assert(ohci_batch->usb_batch);
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| 345 | assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
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[49a98c8] | 346 | usb_log_debug("Using ED(%p): %08x:%08x:%08x:%08x.\n", ohci_batch->ed,
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[9c10e51] | 347 | ohci_batch->ed->status, ohci_batch->ed->td_tail,
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| 348 | ohci_batch->ed->td_head, ohci_batch->ed->next);
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[c6fe469] | 349 |
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[aa9ccf7] | 350 | size_t td_current = 0;
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[9c10e51] | 351 | size_t remain_size = ohci_batch->usb_batch->buffer_size;
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| 352 | char *buffer = ohci_batch->device_buffer;
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[c6fe469] | 353 | while (remain_size > 0) {
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[02cacce] | 354 | const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER
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| 355 | ? OHCI_TD_MAX_TRANSFER : remain_size;
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[c6fe469] | 356 |
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[70d72dd] | 357 | td_init(
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| 358 | ohci_batch->tds[td_current], ohci_batch->tds[td_current + 1],
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| 359 | dir, buffer, transfer_size, -1);
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[058fd76] | 360 |
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[49a98c8] | 361 | usb_log_debug("Created DATA TD: %08x:%08x:%08x:%08x.\n",
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[9c10e51] | 362 | ohci_batch->tds[td_current]->status,
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| 363 | ohci_batch->tds[td_current]->cbp,
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| 364 | ohci_batch->tds[td_current]->next,
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| 365 | ohci_batch->tds[td_current]->be);
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[c6fe469] | 366 |
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[d017cea] | 367 | buffer += transfer_size;
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[c6fe469] | 368 | remain_size -= transfer_size;
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[9c10e51] | 369 | assert(td_current < ohci_batch->td_count);
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[c6fe469] | 370 | ++td_current;
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| 371 | }
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[5f57929] | 372 | usb_log_debug2(
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| 373 | "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
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| 374 | ohci_batch->usb_batch,
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[7bce1fc] | 375 | usb_str_transfer_type(ohci_batch->usb_batch->ep->transfer_type),
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[058fd76] | 376 | usb_str_direction(dir),
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[5f57929] | 377 | USB_TRANSFER_BATCH_ARGS(*ohci_batch->usb_batch));
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[7bce1fc] | 378 | }
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| 379 | /*----------------------------------------------------------------------------*/
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[790318e] | 380 | static void (*const batch_setup[])(ohci_transfer_batch_t*, usb_direction_t) =
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[7bce1fc] | 381 | {
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[790318e] | 382 | [USB_TRANSFER_CONTROL] = batch_control,
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| 383 | [USB_TRANSFER_BULK] = batch_data,
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| 384 | [USB_TRANSFER_INTERRUPT] = batch_data,
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| 385 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
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[7bce1fc] | 386 | };
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[41b96b4] | 387 | /**
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| 388 | * @}
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| 389 | */
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