source: mainline/uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.h

Last change on this file was 870841cf, checked in by Jiri Svoboda <jiri@…>, 5 months ago

Style issues related to improper use of 'inline' keyword.

  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*
2 * Copyright (c) 2025 Jiri Svoboda
3 * Copyright (c) 2011 Jan Vesely
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup drvusbohci
31 * @{
32 */
33/** @file
34 * @brief OHCI driver
35 */
36
37#ifndef DRV_OHCI_HW_STRUCT_TRANSFER_DESCRIPTOR_H
38#define DRV_OHCI_HW_STRUCT_TRANSFER_DESCRIPTOR_H
39
40#include <assert.h>
41#include <stdbool.h>
42#include <stdint.h>
43
44#include "mem_access.h"
45#include "completion_codes.h"
46
47/*
48 * OHCI TDs can handle up to 8KB buffers, however, it can use max 2 pages.
49 * Using 4KB buffers guarantees the page count condition.
50 * (OHCI assumes 4KB pages)
51 */
52#define OHCI_TD_MAX_TRANSFER (4 * 1024)
53
54/**
55 * Transfer Descriptor representation.
56 *
57 * See OHCI spec chapter 4.3.1 General Transfer Descriptor on page 19
58 * (pdf page 33) for details.
59 */
60typedef struct td {
61 /** Status field. Do not touch on active TDs. */
62 volatile uint32_t status;
63#define TD_STATUS_ROUND_FLAG (1 << 18)
64#define TD_STATUS_DP_MASK (0x3) /* Direction/PID */
65#define TD_STATUS_DP_SHIFT (19)
66#define TD_STATUS_DP_SETUP (0x0)
67#define TD_STATUS_DP_OUT (0x1)
68#define TD_STATUS_DP_IN (0x2)
69#define TD_STATUS_DI_MASK (0x7) /* Delay interrupt, wait n frames before irq */
70#define TD_STATUS_DI_SHIFT (21)
71#define TD_STATUS_DI_NO_INTERRUPT (0x7)
72#define TD_STATUS_T_FLAG (1 << 24) /* Explicit toggle bit value for this TD */
73#define TD_STATUS_T_USE_TD_FLAG (1 << 25) /* 1 = use bit 24 as toggle bit */
74#define TD_STATUS_EC_MASK (0x3) /* Error count */
75#define TD_STATUS_EC_SHIFT (26)
76#define TD_STATUS_CC_MASK (0xf) /* Condition code */
77#define TD_STATUS_CC_SHIFT (28)
78
79 /**
80 * Current buffer pointer.
81 * Phys address of the first byte to be transferred.
82 */
83 volatile uint32_t cbp;
84
85 /** Pointer to the next TD in chain. 16-byte aligned. */
86 volatile uint32_t next;
87#define TD_NEXT_PTR_MASK (0xfffffff0)
88#define TD_NEXT_PTR_SHIFT (0)
89
90 /**
91 * Buffer end.
92 * Phys address of the last byte of the transfer.
93 * @note this does not have to be on the same page as cbp.
94 */
95 volatile uint32_t be;
96} __attribute__((packed, aligned(32))) td_t;
97
98void td_init(td_t *, const td_t *, usb_direction_t, const void *, size_t, int);
99void td_set_next(td_t *, const td_t *);
100
101/**
102 * Check TD for completion.
103 * @param instance TD structure.
104 * @return true if the TD was accessed and processed by hw, false otherwise.
105 */
106static inline bool td_is_finished(const td_t *instance)
107{
108 assert(instance);
109 const int cc = (OHCI_MEM32_RD(instance->status) >> TD_STATUS_CC_SHIFT) &
110 TD_STATUS_CC_MASK;
111 /*
112 * This value is changed on transfer completion,
113 * either to CC_NOERROR or and error code.
114 * See OHCI spec 4.3.1.3.5 p. 23 (pdf 37)
115 */
116 if (cc != CC_NOACCESS1 && cc != CC_NOACCESS2) {
117 return true;
118 }
119 return false;
120}
121
122/**
123 * Get error code that indicates transfer status.
124 * @param instance TD structure.
125 * @return Error code.
126 */
127static inline errno_t td_error(const td_t *instance)
128{
129 assert(instance);
130 const int cc = (OHCI_MEM32_RD(instance->status) >>
131 TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;
132 return cc_to_rc(cc);
133}
134
135/**
136 * Get remaining portion of buffer to be read/written
137 * @param instance TD structure
138 * @return size of remaining buffer.
139 */
140static inline size_t td_remain_size(td_t *instance)
141{
142 assert(instance);
143 /* Current buffer pointer is cleared on successful transfer */
144 if (instance->cbp == 0)
145 return 0;
146 /* Buffer end points to the last byte of transfer buffer, so add 1 */
147 return OHCI_MEM32_RD(instance->be) - OHCI_MEM32_RD(instance->cbp) + 1;
148}
149
150#endif
151
152/**
153 * @}
154 */
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