1 | /*
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2 | * Copyright (c) 2011 Jan Vesely
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup drvusbohci
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30 | * @{
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31 | */
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32 | /** @file
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33 | * @brief OHCI driver
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34 | */
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35 |
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36 | #ifndef DRV_OHCI_HW_STRUCT_HCCA_H
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37 | #define DRV_OHCI_HW_STRUCT_HCCA_H
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38 |
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39 | #include <malloc.h>
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40 | #include <sys/types.h>
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41 | #include <macros.h>
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42 | #include <assert.h>
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43 |
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44 | #include "mem_access.h"
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45 |
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46 | #define HCCA_INT_EP_COUNT 32
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47 |
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48 | /** Host controller communication area.
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49 | * Shared memory used for communication between the controller and the driver.
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50 | */
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51 | typedef struct hcca {
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52 | /** Interrupt endpoints */
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53 | uint32_t int_ep[HCCA_INT_EP_COUNT];
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54 | /** Frame number. */
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55 | uint16_t frame_number;
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56 | PADD16;
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57 | /** Pointer to the last completed TD. (useless) */
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58 | uint32_t done_head;
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59 | /** Padding to make the size 256B */
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60 | PADD32[30];
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61 | } hcca_t;
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62 |
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63 | static_assert(sizeof(hcca_t) == 256);
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64 |
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65 | /** Allocate properly aligned structure.
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66 | *
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67 | * The returned structure is zeroed upon allocation.
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68 | *
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69 | * @return Usable HCCA memory structure.
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70 | */
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71 | static inline hcca_t * hcca_get(void)
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72 | {
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73 | hcca_t *hcca = memalign(sizeof(hcca_t), sizeof(hcca_t));
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74 | if (hcca)
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75 | memset(hcca, 0, sizeof(hcca_t));
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76 | return hcca;
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77 | }
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78 |
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79 | /** Set HCCA interrupt endpoint pointer table entry.
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80 | * @param hcca HCCA memory structure.
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81 | * @param index table index.
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82 | * @param pa Physical address.
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83 | */
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84 | static inline void hcca_set_int_ep(hcca_t *hcca, unsigned index, uintptr_t pa)
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85 | {
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86 | assert(hcca);
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87 | assert(index < ARRAY_SIZE(hcca->int_ep));
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88 | OHCI_MEM32_WR(hcca->int_ep[index], pa);
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89 | }
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90 |
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91 | #endif
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92 |
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93 | /**
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94 | * @}
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95 | */
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96 |
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