source: mainline/uspace/drv/bus/usb/ohci/hc.h@ ba4a03a5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ba4a03a5 was ba4a03a5, checked in by Jan Vesely <jano.vesely@…>, 11 years ago

usb host: Use all hw resources when generating irq code.

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File size: 3.1 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohci
29 * @{
30 */
31/** @file
32 * @brief OHCI host controller driver structure
33 */
34#ifndef DRV_OHCI_HC_H
35#define DRV_OHCI_HC_H
36
37#include <adt/list.h>
38#include <ddi.h>
39#include <ddf/driver.h>
40#include <device/hw_res_parsed.h>
41#include <fibril.h>
42#include <fibril_synch.h>
43#include <stdbool.h>
44#include <sys/types.h>
45
46#include <usb/host/hcd.h>
47#include <usb/host/endpoint.h>
48#include <usb/host/usb_transfer_batch.h>
49
50#include "ohci_regs.h"
51#include "ohci_rh.h"
52#include "endpoint_list.h"
53#include "hw_struct/hcca.h"
54
55/** Main OHCI driver structure */
56typedef struct hc {
57 /** Memory mapped I/O registers area */
58 ohci_regs_t *registers;
59 /** Host controller communication area structure */
60 hcca_t *hcca;
61
62 /** Transfer schedules */
63 endpoint_list_t lists[4];
64 /** List of active transfers */
65 list_t pending_batches;
66
67 /** Fibril for periodic checks if interrupts can't be used */
68 fid_t interrupt_emulator;
69
70 /** Guards schedule and endpoint manipulation */
71 fibril_mutex_t guard;
72
73 /** USB hub emulation structure */
74 ohci_rh_t rh;
75} hc_t;
76
77int hc_gen_irq_code(irq_code_t *code, const hw_res_list_parsed_t *hw_res);
78int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun);
79int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts);
80
81/** Safely dispose host controller internal structures
82 *
83 * @param[in] instance Host controller structure to use.
84 */
85static inline void hc_fini(hc_t *instance) { /* TODO: implement*/ };
86
87void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep);
88void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep);
89int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
90
91void hc_interrupt(hc_t *instance, uint32_t status);
92#endif
93/**
94 * @}
95 */
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