[41b96b4] | 1 | /*
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[9dfb034] | 2 | * Copyright (c) 2025 Jiri Svoboda
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[41b96b4] | 3 | * Copyright (c) 2011 Jan Vesely
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[e0a5d4c] | 4 | * Copyright (c) 2018 Ondrej Hlavaty
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[41b96b4] | 5 | * All rights reserved.
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| 6 | *
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| 7 | * Redistribution and use in source and binary forms, with or without
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| 8 | * modification, are permitted provided that the following conditions
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| 9 | * are met:
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| 10 | *
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| 11 | * - Redistributions of source code must retain the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer.
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| 13 | * - Redistributions in binary form must reproduce the above copyright
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| 14 | * notice, this list of conditions and the following disclaimer in the
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| 15 | * documentation and/or other materials provided with the distribution.
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| 16 | * - The name of the author may not be used to endorse or promote products
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| 17 | * derived from this software without specific prior written permission.
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| 18 | *
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| 19 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 20 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 21 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 22 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 23 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 24 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 25 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 26 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 28 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 29 | */
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[58563585] | 30 |
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[bab71635] | 31 | /** @addtogroup drvusbohci
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[41b96b4] | 32 | * @{
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| 33 | */
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| 34 | /** @file
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| 35 | * @brief OHCI host controller driver structure
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| 36 | */
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[58563585] | 37 |
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[bab71635] | 38 | #ifndef DRV_OHCI_HC_H
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| 39 | #define DRV_OHCI_HC_H
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[41b96b4] | 40 |
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| 41 | #include <adt/list.h>
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| 42 | #include <ddi.h>
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[0d4b110] | 43 | #include <ddf/driver.h>
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| 44 | #include <device/hw_res_parsed.h>
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| 45 | #include <fibril.h>
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| 46 | #include <fibril_synch.h>
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| 47 | #include <stdbool.h>
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[8d2dd7f2] | 48 | #include <stdint.h>
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[41b96b4] | 49 |
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[e2976bb] | 50 | #include <usb/host/hcd.h>
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[0d4b110] | 51 | #include <usb/host/endpoint.h>
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| 52 | #include <usb/host/usb_transfer_batch.h>
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[41b96b4] | 53 |
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[42dbb26] | 54 | #include "ohci_regs.h"
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[171e668] | 55 | #include "ohci_rh.h"
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[e6b9182] | 56 | #include "ohci_bus.h"
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[5a2c42b] | 57 | #include "endpoint_list.h"
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[fc9f88d] | 58 | #include "hw_struct/hcca.h"
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[41b96b4] | 59 |
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[1f6eb7d] | 60 | /** Main OHCI driver structure */
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[bab71635] | 61 | typedef struct hc {
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[32fb6bce] | 62 | /** Common hcd header */
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| 63 | hc_device_t base;
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| 64 |
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[02cacce] | 65 | /** Memory mapped I/O registers area */
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[42dbb26] | 66 | ohci_regs_t *registers;
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[a35b458] | 67 |
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[02cacce] | 68 | /** Host controller communication area structure */
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[7013b14] | 69 | hcca_t *hcca;
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| 70 |
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[02cacce] | 71 | /** Transfer schedules */
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[5a2c42b] | 72 | endpoint_list_t lists[4];
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[9876e34] | 73 |
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[d60115a] | 74 | /** List of active endpoints */
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| 75 | list_t pending_endpoints;
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[6b6e3ed3] | 76 |
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[02cacce] | 77 | /** Guards schedule and endpoint manipulation */
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[aa9ccf7] | 78 | fibril_mutex_t guard;
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[561112f] | 79 |
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[02cacce] | 80 | /** USB hub emulation structure */
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[171e668] | 81 | ohci_rh_t rh;
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[e6b9182] | 82 |
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| 83 | /** USB bookkeeping */
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| 84 | ohci_bus_t bus;
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[bab71635] | 85 | } hc_t;
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[41b96b4] | 86 |
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[ae3a941] | 87 | static inline hc_t *hcd_to_hc(hc_device_t *hcd)
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[32fb6bce] | 88 | {
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| 89 | assert(hcd);
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| 90 | return (hc_t *) hcd;
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| 91 | }
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| 92 |
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[5a6cc679] | 93 | extern errno_t hc_add(hc_device_t *, const hw_res_list_parsed_t *);
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[ae3a941] | 94 | extern errno_t hc_gen_irq_code(irq_code_t *, hc_device_t *,
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| 95 | const hw_res_list_parsed_t *, int *);
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[5a6cc679] | 96 | extern errno_t hc_gain_control(hc_device_t *);
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| 97 | extern errno_t hc_start(hc_device_t *);
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| 98 | extern errno_t hc_setup_roothub(hc_device_t *);
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| 99 | extern errno_t hc_gone(hc_device_t *);
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[9dfb034] | 100 | extern errno_t hc_quiesce(hc_device_t *);
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[41b96b4] | 101 |
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[58563585] | 102 | extern void hc_enqueue_endpoint(hc_t *, const endpoint_t *);
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| 103 | extern void hc_dequeue_endpoint(hc_t *, const endpoint_t *);
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[620c710] | 104 |
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[5a6cc679] | 105 | extern errno_t ohci_hc_schedule(usb_transfer_batch_t *);
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| 106 | extern errno_t ohci_hc_status(bus_t *, uint32_t *);
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[32fb6bce] | 107 | extern void ohci_hc_interrupt(bus_t *, uint32_t);
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[58563585] | 108 |
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[41b96b4] | 109 | #endif
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[58563585] | 110 |
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[41b96b4] | 111 | /**
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| 112 | * @}
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| 113 | */
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