source: mainline/uspace/drv/bus/usb/ohci/hc.c@ e2976bb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e2976bb was e2976bb, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

OHCI: Begin move to new hcd arch, plug in batch init hook.
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File size: 21.2 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "hcd_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63
64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
95 if (ret != EOK)
96 return ret;
97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
117/*----------------------------------------------------------------------------*/
118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
129 const usb_address_t hub_address =
130 device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
131 if (hub_address <= 0) {
132 usb_log_error("Failed to get OHCI root hub address: %s\n",
133 str_error(hub_address));
134 return hub_address;
135 }
136 instance->rh.address = hub_address;
137 usb_device_keeper_bind(
138 &instance->manager, hub_address, hub_fun->handle);
139
140#define CHECK_RET_RELEASE(ret, message...) \
141if (ret != EOK) { \
142 usb_log_error(message); \
143 hc_remove_endpoint(instance, hub_address, 0, USB_DIRECTION_BOTH); \
144 usb_device_keeper_release(&instance->manager, hub_address); \
145 return ret; \
146} else (void)0
147
148 int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
149 USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
150 CHECK_RET_RELEASE(ret,
151 "Failed to add OHCI root hub endpoint 0: %s.\n", str_error(ret));
152
153 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
154 CHECK_RET_RELEASE(ret,
155 "Failed to add root hub match-id: %s.\n", str_error(ret));
156
157 ret = ddf_fun_bind(hub_fun);
158 CHECK_RET_RELEASE(ret,
159 "Failed to bind root hub function: %s.\n", str_error(ret));
160
161 return EOK;
162#undef CHECK_RET_RELEASE
163}
164/*----------------------------------------------------------------------------*/
165/** Initialize OHCI hc driver structure
166 *
167 * @param[in] instance Memory place for the structure.
168 * @param[in] regs Address of the memory mapped I/O registers.
169 * @param[in] reg_size Size of the memory mapped area.
170 * @param[in] interrupts True if w interrupts should be used
171 * @return Error code
172 */
173int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
174{
175 assert(instance);
176
177#define CHECK_RET_RETURN(ret, message...) \
178if (ret != EOK) { \
179 usb_log_error(message); \
180 return ret; \
181} else (void)0
182
183 int ret =
184 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
185 CHECK_RET_RETURN(ret,
186 "Failed to gain access to device registers: %s.\n", str_error(ret));
187
188 list_initialize(&instance->pending_batches);
189 usb_device_keeper_init(&instance->manager);
190
191 ret = usb_endpoint_manager_init(&instance->ep_manager,
192 BANDWIDTH_AVAILABLE_USB11);
193 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
194 str_error(ret));
195
196 ret = hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11);
197 instance->generic.schedule = NULL;
198 instance->generic.batch_init_hook = batch_init_ohci;
199 instance->generic.ep_add_hook = NULL;
200
201 ret = hc_init_memory(instance);
202 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
203 str_error(ret));
204#undef CHECK_RET_RETURN
205
206 fibril_mutex_initialize(&instance->guard);
207
208 hc_gain_control(instance);
209
210 if (!interrupts) {
211 instance->interrupt_emulator =
212 fibril_create((int(*)(void*))interrupt_emulator, instance);
213 fibril_add_ready(instance->interrupt_emulator);
214 }
215
216 rh_init(&instance->rh, instance->registers);
217 hc_start(instance);
218
219 return EOK;
220}
221/*----------------------------------------------------------------------------*/
222/** Create and register endpoint structures.
223 *
224 * @param[in] instance OHCI driver structure.
225 * @param[in] address USB address of the device.
226 * @param[in] endpoint USB endpoint number.
227 * @param[in] speed Communication speeed of the device.
228 * @param[in] type Endpoint's transfer type.
229 * @param[in] direction Endpoint's direction.
230 * @param[in] mps Maximum packet size the endpoint accepts.
231 * @param[in] size Maximum allowed buffer size.
232 * @param[in] interval Time between transfers(interrupt transfers only).
233 * @return Error code
234 */
235int hc_add_endpoint(
236 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
237 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
238 size_t mps, size_t size, unsigned interval)
239{
240 endpoint_t *ep =
241 endpoint_get(address, endpoint, direction, type, speed, mps);
242 if (ep == NULL)
243 return ENOMEM;
244
245 int ret = hcd_endpoint_assign(ep);
246 if (ret != EOK) {
247 endpoint_destroy(ep);
248 return ret;
249 }
250
251 ret = usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
252 if (ret != EOK) {
253 endpoint_destroy(ep);
254 return ret;
255 }
256
257 /* Enqueue hcd_ep */
258 switch (ep->transfer_type) {
259 case USB_TRANSFER_CONTROL:
260 instance->registers->control &= ~C_CLE;
261 endpoint_list_add_ep(
262 &instance->lists[ep->transfer_type], hcd_endpoint_get(ep));
263 instance->registers->control_current = 0;
264 instance->registers->control |= C_CLE;
265 break;
266 case USB_TRANSFER_BULK:
267 instance->registers->control &= ~C_BLE;
268 endpoint_list_add_ep(
269 &instance->lists[ep->transfer_type], hcd_endpoint_get(ep));
270 instance->registers->control |= C_BLE;
271 break;
272 case USB_TRANSFER_ISOCHRONOUS:
273 case USB_TRANSFER_INTERRUPT:
274 instance->registers->control &= (~C_PLE & ~C_IE);
275 endpoint_list_add_ep(
276 &instance->lists[ep->transfer_type], hcd_endpoint_get(ep));
277 instance->registers->control |= C_PLE | C_IE;
278 break;
279 }
280
281 return EOK;
282}
283/*----------------------------------------------------------------------------*/
284/** Dequeue and delete endpoint structures
285 *
286 * @param[in] instance OHCI hc driver structure.
287 * @param[in] address USB address of the device.
288 * @param[in] endpoint USB endpoint number.
289 * @param[in] direction Direction of the endpoint.
290 * @return Error code
291 */
292int hc_remove_endpoint(hc_t *instance, usb_address_t address,
293 usb_endpoint_t endpoint, usb_direction_t direction)
294{
295 assert(instance);
296 fibril_mutex_lock(&instance->guard);
297 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
298 address, endpoint, direction, NULL);
299 if (ep == NULL) {
300 usb_log_error("Endpoint unregister failed: No such EP.\n");
301 fibril_mutex_unlock(&instance->guard);
302 return ENOENT;
303 }
304
305 hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);
306 if (hcd_ep) {
307 /* Dequeue hcd_ep */
308 switch (ep->transfer_type) {
309 case USB_TRANSFER_CONTROL:
310 instance->registers->control &= ~C_CLE;
311 endpoint_list_remove_ep(
312 &instance->lists[ep->transfer_type], hcd_ep);
313 instance->registers->control_current = 0;
314 instance->registers->control |= C_CLE;
315 break;
316 case USB_TRANSFER_BULK:
317 instance->registers->control &= ~C_BLE;
318 endpoint_list_remove_ep(
319 &instance->lists[ep->transfer_type], hcd_ep);
320 instance->registers->control |= C_BLE;
321 break;
322 case USB_TRANSFER_ISOCHRONOUS:
323 case USB_TRANSFER_INTERRUPT:
324 instance->registers->control &= (~C_PLE & ~C_IE);
325 endpoint_list_remove_ep(
326 &instance->lists[ep->transfer_type], hcd_ep);
327 instance->registers->control |= C_PLE | C_IE;
328 break;
329 default:
330 break;
331 }
332 } else {
333 usb_log_warning("Endpoint without hcd equivalent structure.\n");
334 }
335 int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
336 address, endpoint, direction);
337 fibril_mutex_unlock(&instance->guard);
338 return ret;
339}
340/*----------------------------------------------------------------------------*/
341/** Get access to endpoint structures
342 *
343 * @param[in] instance OHCI hc driver structure.
344 * @param[in] address USB address of the device.
345 * @param[in] endpoint USB endpoint number.
346 * @param[in] direction Direction of the endpoint.
347 * @param[out] bw Reserved bandwidth.
348 * @return Error code
349 */
350endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
351 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
352{
353 assert(instance);
354 fibril_mutex_lock(&instance->guard);
355 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
356 address, endpoint, direction, bw);
357 fibril_mutex_unlock(&instance->guard);
358 return ep;
359}
360/*----------------------------------------------------------------------------*/
361/** Add USB transfer to the schedule.
362 *
363 * @param[in] instance OHCI hc driver structure.
364 * @param[in] batch Batch representing the transfer.
365 * @return Error code.
366 */
367int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
368{
369 assert(instance);
370 assert(batch);
371 assert(batch->ep);
372
373 /* Check for root hub communication */
374 if (batch->ep->address == instance->rh.address) {
375 rh_request(&instance->rh, batch);
376 return EOK;
377 }
378
379 fibril_mutex_lock(&instance->guard);
380 list_append(&batch->link, &instance->pending_batches);
381 batch_commit(batch);
382
383 /* Control and bulk schedules need a kick to start working */
384 switch (batch->ep->transfer_type)
385 {
386 case USB_TRANSFER_CONTROL:
387 instance->registers->command_status |= CS_CLF;
388 break;
389 case USB_TRANSFER_BULK:
390 instance->registers->command_status |= CS_BLF;
391 break;
392 default:
393 break;
394 }
395 fibril_mutex_unlock(&instance->guard);
396 return EOK;
397}
398/*----------------------------------------------------------------------------*/
399/** Interrupt handling routine
400 *
401 * @param[in] instance OHCI hc driver structure.
402 * @param[in] status Value of the status register at the time of interrupt.
403 */
404void hc_interrupt(hc_t *instance, uint32_t status)
405{
406 assert(instance);
407 if ((status & ~I_SF) == 0) /* ignore sof status */
408 return;
409 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
410 if (status & I_RHSC)
411 rh_interrupt(&instance->rh);
412
413 if (status & I_WDH) {
414 fibril_mutex_lock(&instance->guard);
415 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
416 instance->registers->hcca,
417 (void *) addr_to_phys(instance->hcca));
418 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
419 instance->registers->periodic_current);
420
421 link_t *current = instance->pending_batches.head.next;
422 while (current != &instance->pending_batches.head) {
423 link_t *next = current->next;
424 usb_transfer_batch_t *batch =
425 usb_transfer_batch_from_link(current);
426
427 if (batch_is_complete(batch)) {
428 list_remove(current);
429 usb_transfer_batch_finish(batch);
430 }
431
432 current = next;
433 }
434 fibril_mutex_unlock(&instance->guard);
435 }
436
437 if (status & I_UE) {
438 hc_start(instance);
439 }
440
441}
442/*----------------------------------------------------------------------------*/
443/** Check status register regularly
444 *
445 * @param[in] instance OHCI hc driver structure.
446 * @return Error code
447 */
448int interrupt_emulator(hc_t *instance)
449{
450 assert(instance);
451 usb_log_info("Started interrupt emulator.\n");
452 while (1) {
453 const uint32_t status = instance->registers->interrupt_status;
454 instance->registers->interrupt_status = status;
455 hc_interrupt(instance, status);
456 async_usleep(10000);
457 }
458 return EOK;
459}
460/*----------------------------------------------------------------------------*/
461/** Turn off any (BIOS)driver that might be in control of the device.
462 *
463 * This function implements routines described in chapter 5.1.1.3 of the OHCI
464 * specification (page 40, pdf page 54).
465 *
466 * @param[in] instance OHCI hc driver structure.
467 */
468void hc_gain_control(hc_t *instance)
469{
470 assert(instance);
471
472 usb_log_debug("Requesting OHCI control.\n");
473 if (instance->registers->revision & R_LEGACY_FLAG) {
474 /* Turn off legacy emulation, it should be enough to zero
475 * the lowest bit, but it caused problems. Thus clear all
476 * except GateA20 (causes restart on some hw).
477 * See page 145 of the specs for details.
478 */
479 volatile uint32_t *ohci_emulation_reg =
480 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
481 usb_log_debug("OHCI legacy register %p: %x.\n",
482 ohci_emulation_reg, *ohci_emulation_reg);
483 /* Zero everything but A20State */
484 *ohci_emulation_reg &= 0x100;
485 usb_log_debug(
486 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
487 ohci_emulation_reg, *ohci_emulation_reg);
488 }
489
490 /* Interrupt routing enabled => smm driver is active */
491 if (instance->registers->control & C_IR) {
492 usb_log_debug("SMM driver: request ownership change.\n");
493 instance->registers->command_status |= CS_OCR;
494 /* Hope that SMM actually knows its stuff or we can hang here */
495 while (instance->registers->control & C_IR) {
496 async_usleep(1000);
497 }
498 usb_log_info("SMM driver: Ownership taken.\n");
499 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
500 async_usleep(50000);
501 return;
502 }
503
504 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
505 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
506 if (hc_status != C_HCFS_RESET) {
507 usb_log_debug("BIOS driver found.\n");
508 if (hc_status == C_HCFS_OPERATIONAL) {
509 usb_log_info("BIOS driver: HC operational.\n");
510 return;
511 }
512 /* HC is suspended assert resume for 20ms, */
513 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
514 async_usleep(20000);
515 usb_log_info("BIOS driver: HC resumed.\n");
516 return;
517 }
518
519 /* HC is in reset (hw startup) => no other driver
520 * maintain reset for at least the time specified in USB spec (50 ms)*/
521 usb_log_debug("Host controller found in reset state.\n");
522 async_usleep(50000);
523}
524/*----------------------------------------------------------------------------*/
525/** OHCI hw initialization routine.
526 *
527 * @param[in] instance OHCI hc driver structure.
528 */
529void hc_start(hc_t *instance)
530{
531 /* OHCI guide page 42 */
532 assert(instance);
533 usb_log_debug2("Started hc initialization routine.\n");
534
535 /* Save contents of fm_interval register */
536 const uint32_t fm_interval = instance->registers->fm_interval;
537 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
538
539 /* Reset hc */
540 usb_log_debug2("HC reset.\n");
541 size_t time = 0;
542 instance->registers->command_status = CS_HCR;
543 while (instance->registers->command_status & CS_HCR) {
544 async_usleep(10);
545 time += 10;
546 }
547 usb_log_debug2("HC reset complete in %zu us.\n", time);
548
549 /* Restore fm_interval */
550 instance->registers->fm_interval = fm_interval;
551 assert((instance->registers->command_status & CS_HCR) == 0);
552
553 /* hc is now in suspend state */
554 usb_log_debug2("HC should be in suspend state(%x).\n",
555 instance->registers->control);
556
557 /* Use HCCA */
558 instance->registers->hcca = addr_to_phys(instance->hcca);
559
560 /* Use queues */
561 instance->registers->bulk_head =
562 instance->lists[USB_TRANSFER_BULK].list_head_pa;
563 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
564 instance->lists[USB_TRANSFER_BULK].list_head,
565 instance->lists[USB_TRANSFER_BULK].list_head_pa);
566
567 instance->registers->control_head =
568 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
569 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
570 instance->lists[USB_TRANSFER_CONTROL].list_head,
571 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
572
573 /* Enable queues */
574 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
575 usb_log_debug2("All queues enabled(%x).\n",
576 instance->registers->control);
577
578 /* Enable interrupts */
579 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
580 usb_log_debug2("Enabled interrupts: %x.\n",
581 instance->registers->interrupt_enable);
582 instance->registers->interrupt_enable = I_MI;
583
584 /* Set periodic start to 90% */
585 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
586 instance->registers->periodic_start = (frame_length / 10) * 9;
587 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
588 instance->registers->periodic_start,
589 instance->registers->periodic_start, frame_length);
590
591 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
592 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
593 instance->registers->control);
594}
595/*----------------------------------------------------------------------------*/
596/** Initialize schedule queues
597 *
598 * @param[in] instance OHCI hc driver structure
599 * @return Error code
600 */
601int hc_init_transfer_lists(hc_t *instance)
602{
603 assert(instance);
604#define SETUP_ENDPOINT_LIST(type) \
605do { \
606 const char *name = usb_str_transfer_type(type); \
607 int ret = endpoint_list_init(&instance->lists[type], name); \
608 if (ret != EOK) { \
609 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
610 name, str_error(ret)); \
611 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
612 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
613 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
614 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
615 return ret; \
616 } \
617} while (0)
618
619 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
620 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
621 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
622 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
623#undef SETUP_ENDPOINT_LIST
624 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
625 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
626
627 return EOK;
628}
629/*----------------------------------------------------------------------------*/
630/** Initialize memory structures used by the OHCI hcd.
631 *
632 * @param[in] instance OHCI hc driver structure.
633 * @return Error code.
634 */
635int hc_init_memory(hc_t *instance)
636{
637 assert(instance);
638
639 bzero(&instance->rh, sizeof(instance->rh));
640 /* Init queues */
641 const int ret = hc_init_transfer_lists(instance);
642 if (ret != EOK) {
643 return ret;
644 }
645
646 /*Init HCCA */
647 instance->hcca = malloc32(sizeof(hcca_t));
648 if (instance->hcca == NULL)
649 return ENOMEM;
650 bzero(instance->hcca, sizeof(hcca_t));
651 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
652
653 unsigned i = 0;
654 for (; i < 32; ++i) {
655 instance->hcca->int_ep[i] =
656 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
657 }
658 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
659 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
660 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
661
662 return EOK;
663}
664
665/**
666 * @}
667 */
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