source: mainline/uspace/drv/bus/usb/ohci/hc.c@ defaab2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since defaab2 was 129b821f, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

usbhub: be aware of its own speed

This resulted in a bunch of changes just because the roothubs in older
HC's are virtual, and need to be aware of their own speed too.
  • Property mode set to 100644
File size: 17.7 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbohcihc
30 * @{
31 */
32/** @file
33 * @brief OHCI Host controller driver routines
34 */
35
36#include <assert.h>
37#include <async.h>
38#include <errno.h>
39#include <macros.h>
40#include <mem.h>
41#include <stdlib.h>
42#include <str_error.h>
43#include <stddef.h>
44#include <stdint.h>
45
46#include <usb/debug.h>
47#include <usb/host/utility.h>
48#include <usb/usb.h>
49
50#include "ohci_bus.h"
51#include "ohci_batch.h"
52
53#include "hc.h"
54
55#define OHCI_USED_INTERRUPTS \
56 (I_SO | I_WDH | I_UE | I_RHSC)
57
58static const irq_pio_range_t ohci_pio_ranges[] = {
59 {
60 .base = 0,
61 .size = sizeof(ohci_regs_t)
62 }
63};
64
65static const irq_cmd_t ohci_irq_commands[] = {
66 {
67 .cmd = CMD_PIO_READ_32,
68 .dstarg = 1,
69 .addr = NULL
70 },
71 {
72 .cmd = CMD_AND,
73 .srcarg = 1,
74 .dstarg = 2,
75 .value = 0
76 },
77 {
78 .cmd = CMD_PREDICATE,
79 .srcarg = 2,
80 .value = 2
81 },
82 {
83 .cmd = CMD_PIO_WRITE_A_32,
84 .srcarg = 1,
85 .addr = NULL
86 },
87 {
88 .cmd = CMD_ACCEPT
89 }
90};
91
92static int hc_init_transfer_lists(hc_t *instance);
93static int hc_init_memory(hc_t *instance);
94
95/** Generate IRQ code.
96 * @param[out] ranges PIO ranges buffer.
97 * @param[in] ranges_size Size of the ranges buffer (bytes).
98 * @param[out] cmds Commands buffer.
99 * @param[in] cmds_size Size of the commands buffer (bytes).
100 * @param[in] hw_res Device's resources.
101 *
102 * @return Error code.
103 */
104int hc_gen_irq_code(irq_code_t *code, hc_device_t *hcd, const hw_res_list_parsed_t *hw_res)
105{
106 assert(code);
107 assert(hw_res);
108
109 if (hw_res->irqs.count != 1 || hw_res->mem_ranges.count != 1)
110 return EINVAL;
111
112 const addr_range_t regs = hw_res->mem_ranges.ranges[0];
113
114 if (RNGSZ(regs) < sizeof(ohci_regs_t))
115 return EOVERFLOW;
116
117 code->ranges = malloc(sizeof(ohci_pio_ranges));
118 if (code->ranges == NULL)
119 return ENOMEM;
120
121 code->cmds = malloc(sizeof(ohci_irq_commands));
122 if (code->cmds == NULL) {
123 free(code->ranges);
124 return ENOMEM;
125 }
126
127 code->rangecount = ARRAY_SIZE(ohci_pio_ranges);
128 code->cmdcount = ARRAY_SIZE(ohci_irq_commands);
129
130 memcpy(code->ranges, ohci_pio_ranges, sizeof(ohci_pio_ranges));
131 code->ranges[0].base = RNGABS(regs);
132
133 memcpy(code->cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
134 ohci_regs_t *registers = (ohci_regs_t *) RNGABSPTR(regs);
135 code->cmds[0].addr = (void *) &registers->interrupt_status;
136 code->cmds[3].addr = (void *) &registers->interrupt_status;
137 OHCI_WR(code->cmds[1].value, OHCI_USED_INTERRUPTS);
138
139 usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.",
140 RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]);
141
142 return hw_res->irqs.irqs[0];
143}
144
145/** Initialize OHCI hc driver structure
146 *
147 * @param[in] instance Memory place for the structure.
148 * @param[in] regs Device's resources
149 * @param[in] interrupts True if w interrupts should be used
150 * @return Error code
151 */
152int hc_add(hc_device_t *hcd, const hw_res_list_parsed_t *hw_res)
153{
154 hc_t *instance = hcd_to_hc(hcd);
155 assert(hw_res);
156 if (hw_res->mem_ranges.count != 1 ||
157 hw_res->mem_ranges.ranges[0].size < sizeof(ohci_regs_t))
158 return EINVAL;
159
160 int ret = pio_enable_range(&hw_res->mem_ranges.ranges[0],
161 (void **) &instance->registers);
162 if (ret != EOK) {
163 usb_log_error("Failed to gain access to registers: %s.",
164 str_error(ret));
165 return ret;
166 }
167 usb_log_debug("Device registers at %" PRIx64 " (%zuB) accessible.",
168 hw_res->mem_ranges.ranges[0].address.absolute,
169 hw_res->mem_ranges.ranges[0].size);
170
171 list_initialize(&instance->pending_endpoints);
172 fibril_mutex_initialize(&instance->guard);
173
174 ret = hc_init_memory(instance);
175 if (ret != EOK) {
176 usb_log_error("Failed to create OHCI memory structures: %s.",
177 str_error(ret));
178 // TODO: We should disable pio access here
179 return ret;
180 }
181
182 return EOK;
183}
184
185/** Safely dispose host controller internal structures
186 *
187 * @param[in] instance Host controller structure to use.
188 */
189int hc_gone(hc_device_t *instance)
190{
191 assert(instance);
192 /* TODO: implement*/
193 return ENOTSUP;
194}
195
196void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
197{
198 assert(instance);
199 assert(ep);
200
201 endpoint_list_t *list = &instance->lists[ep->transfer_type];
202 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
203 assert(list);
204 assert(ohci_ep);
205
206 /* Enqueue ep */
207 switch (ep->transfer_type) {
208 case USB_TRANSFER_CONTROL:
209 OHCI_CLR(instance->registers->control, C_CLE);
210 endpoint_list_add_ep(list, ohci_ep);
211 OHCI_WR(instance->registers->control_current, 0);
212 OHCI_SET(instance->registers->control, C_CLE);
213 break;
214 case USB_TRANSFER_BULK:
215 OHCI_CLR(instance->registers->control, C_BLE);
216 endpoint_list_add_ep(list, ohci_ep);
217 OHCI_WR(instance->registers->bulk_current, 0);
218 OHCI_SET(instance->registers->control, C_BLE);
219 break;
220 case USB_TRANSFER_ISOCHRONOUS:
221 case USB_TRANSFER_INTERRUPT:
222 OHCI_CLR(instance->registers->control, C_PLE | C_IE);
223 endpoint_list_add_ep(list, ohci_ep);
224 OHCI_SET(instance->registers->control, C_PLE | C_IE);
225 break;
226 }
227}
228
229void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
230{
231 assert(instance);
232 assert(ep);
233
234 /* Dequeue ep */
235 endpoint_list_t *list = &instance->lists[ep->transfer_type];
236 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
237
238 assert(list);
239 assert(ohci_ep);
240 switch (ep->transfer_type) {
241 case USB_TRANSFER_CONTROL:
242 OHCI_CLR(instance->registers->control, C_CLE);
243 endpoint_list_remove_ep(list, ohci_ep);
244 OHCI_WR(instance->registers->control_current, 0);
245 OHCI_SET(instance->registers->control, C_CLE);
246 break;
247 case USB_TRANSFER_BULK:
248 OHCI_CLR(instance->registers->control, C_BLE);
249 endpoint_list_remove_ep(list, ohci_ep);
250 OHCI_WR(instance->registers->bulk_current, 0);
251 OHCI_SET(instance->registers->control, C_BLE);
252 break;
253 case USB_TRANSFER_ISOCHRONOUS:
254 case USB_TRANSFER_INTERRUPT:
255 OHCI_CLR(instance->registers->control, C_PLE | C_IE);
256 endpoint_list_remove_ep(list, ohci_ep);
257 OHCI_SET(instance->registers->control, C_PLE | C_IE);
258 break;
259 default:
260 break;
261 }
262}
263
264int ohci_hc_status(bus_t *bus_base, uint32_t *status)
265{
266 assert(bus_base);
267 assert(status);
268
269 ohci_bus_t *bus = (ohci_bus_t *) bus_base;
270 hc_t *hc = bus->hc;
271 assert(hc);
272
273 if (hc->registers){
274 *status = OHCI_RD(hc->registers->interrupt_status);
275 OHCI_WR(hc->registers->interrupt_status, *status);
276 }
277 return EOK;
278}
279
280/** Add USB transfer to the schedule.
281 *
282 * @param[in] hcd HCD driver structure.
283 * @param[in] batch Batch representing the transfer.
284 * @return Error code.
285 */
286int ohci_hc_schedule(usb_transfer_batch_t *batch)
287{
288 assert(batch);
289
290 ohci_bus_t *bus = (ohci_bus_t *) endpoint_get_bus(batch->ep);
291 hc_t *hc = bus->hc;
292 assert(hc);
293
294 /* Check for root hub communication */
295 if (batch->target.address == ohci_rh_get_address(&hc->rh)) {
296 usb_log_debug("OHCI root hub request.");
297 return ohci_rh_schedule(&hc->rh, batch);
298 }
299 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
300 if (!ohci_batch)
301 return ENOMEM;
302
303 const int err = ohci_transfer_batch_prepare(ohci_batch);
304 if (err)
305 return err;
306
307 endpoint_t *ep = batch->ep;
308 ohci_endpoint_t * const ohci_ep = ohci_endpoint_get(ep);
309
310 /* creating local reference */
311 endpoint_add_ref(ep);
312
313 fibril_mutex_lock(&ep->guard);
314 endpoint_activate_locked(ep, batch);
315 ohci_transfer_batch_commit(ohci_batch);
316 fibril_mutex_unlock(&ep->guard);
317
318 /* Control and bulk schedules need a kick to start working */
319 switch (batch->ep->transfer_type)
320 {
321 case USB_TRANSFER_CONTROL:
322 OHCI_SET(hc->registers->command_status, CS_CLF);
323 break;
324 case USB_TRANSFER_BULK:
325 OHCI_SET(hc->registers->command_status, CS_BLF);
326 break;
327 default:
328 break;
329 }
330
331 fibril_mutex_lock(&hc->guard);
332 list_append(&ohci_ep->pending_link, &hc->pending_endpoints);
333 fibril_mutex_unlock(&hc->guard);
334
335 return EOK;
336}
337
338/** Interrupt handling routine
339 *
340 * @param[in] hcd HCD driver structure.
341 * @param[in] status Value of the status register at the time of interrupt.
342 */
343void ohci_hc_interrupt(bus_t *bus_base, uint32_t status)
344{
345 assert(bus_base);
346
347 ohci_bus_t *bus = (ohci_bus_t *) bus_base;
348 hc_t *hc = bus->hc;
349 assert(hc);
350
351 status = OHCI_RD(status);
352 assert(hc);
353 if ((status & ~I_SF) == 0) /* ignore sof status */
354 return;
355 usb_log_debug2("OHCI(%p) interrupt: %x.", hc, status);
356 if (status & I_RHSC)
357 ohci_rh_interrupt(&hc->rh);
358
359 if (status & I_WDH) {
360 fibril_mutex_lock(&hc->guard);
361 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).", hc->hcca,
362 OHCI_RD(hc->registers->hcca),
363 (void *) addr_to_phys(hc->hcca));
364 usb_log_debug2("Periodic current: %#" PRIx32 ".",
365 OHCI_RD(hc->registers->periodic_current));
366
367 list_foreach_safe(hc->pending_endpoints, current, next) {
368 ohci_endpoint_t *ep
369 = list_get_instance(current, ohci_endpoint_t, pending_link);
370
371 fibril_mutex_lock(&ep->base.guard);
372 ohci_transfer_batch_t *batch
373 = ohci_transfer_batch_get(ep->base.active_batch);
374 assert(batch);
375
376 if (ohci_transfer_batch_check_completed(batch)) {
377 endpoint_deactivate_locked(&ep->base);
378 list_remove(current);
379 endpoint_del_ref(&ep->base);
380 hc_reset_toggles(&batch->base, &ohci_ep_toggle_reset);
381 usb_transfer_batch_finish(&batch->base);
382 }
383 fibril_mutex_unlock(&ep->base.guard);
384 }
385 fibril_mutex_unlock(&hc->guard);
386 }
387
388 if (status & I_UE) {
389 usb_log_fatal("Error like no other!");
390 hc_start(&hc->base);
391 }
392
393}
394
395/** Turn off any (BIOS)driver that might be in control of the device.
396 *
397 * This function implements routines described in chapter 5.1.1.3 of the OHCI
398 * specification (page 40, pdf page 54).
399 *
400 * @param[in] instance OHCI hc driver structure.
401 */
402int hc_gain_control(hc_device_t *hcd)
403{
404 hc_t *instance = hcd_to_hc(hcd);
405
406 usb_log_debug("Requesting OHCI control.");
407 if (OHCI_RD(instance->registers->revision) & R_LEGACY_FLAG) {
408 /* Turn off legacy emulation, it should be enough to zero
409 * the lowest bit, but it caused problems. Thus clear all
410 * except GateA20 (causes restart on some hw).
411 * See page 145 of the specs for details.
412 */
413 volatile uint32_t *ohci_emulation_reg =
414 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
415 usb_log_debug("OHCI legacy register %p: %x.",
416 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));
417 /* Zero everything but A20State */
418 // TODO: should we ack interrupts before doing this?
419 OHCI_CLR(*ohci_emulation_reg, ~0x100);
420 usb_log_debug(
421 "OHCI legacy register (should be 0 or 0x100) %p: %x.",
422 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));
423 }
424
425 /* Interrupt routing enabled => smm driver is active */
426 if (OHCI_RD(instance->registers->control) & C_IR) {
427 usb_log_debug("SMM driver: request ownership change.");
428 // TODO: should we ack interrupts before doing this?
429 OHCI_SET(instance->registers->command_status, CS_OCR);
430 /* Hope that SMM actually knows its stuff or we can hang here */
431 while (OHCI_RD(instance->registers->control) & C_IR) {
432 async_usleep(1000);
433 }
434 usb_log_info("SMM driver: Ownership taken.");
435 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
436 async_usleep(50000);
437 return EOK;
438 }
439
440 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
441 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
442 if (hc_status != C_HCFS_RESET) {
443 usb_log_debug("BIOS driver found.");
444 if (hc_status == C_HCFS_OPERATIONAL) {
445 usb_log_info("BIOS driver: HC operational.");
446 return EOK;
447 }
448 /* HC is suspended assert resume for 20ms */
449 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
450 async_usleep(20000);
451 usb_log_info("BIOS driver: HC resumed.");
452 return EOK;
453 }
454
455 /* HC is in reset (hw startup) => no other driver
456 * maintain reset for at least the time specified in USB spec (50 ms)*/
457 usb_log_debug("Host controller found in reset state.");
458 async_usleep(50000);
459 return EOK;
460}
461
462/** OHCI hw initialization routine.
463 *
464 * @param[in] instance OHCI hc driver structure.
465 */
466int hc_start(hc_device_t *hcd)
467{
468 hc_t *instance = hcd_to_hc(hcd);
469 ohci_rh_init(&instance->rh, instance->registers, "ohci rh");
470
471 /* OHCI guide page 42 */
472 assert(instance);
473 usb_log_debug2("Started hc initialization routine.");
474
475 /* Save contents of fm_interval register */
476 const uint32_t fm_interval = OHCI_RD(instance->registers->fm_interval);
477 usb_log_debug2("Old value of HcFmInterval: %x.", fm_interval);
478
479 /* Reset hc */
480 usb_log_debug2("HC reset.");
481 size_t time = 0;
482 OHCI_WR(instance->registers->command_status, CS_HCR);
483 while (OHCI_RD(instance->registers->command_status) & CS_HCR) {
484 async_usleep(10);
485 time += 10;
486 }
487 usb_log_debug2("HC reset complete in %zu us.", time);
488
489 /* Restore fm_interval */
490 OHCI_WR(instance->registers->fm_interval, fm_interval);
491 assert((OHCI_RD(instance->registers->command_status) & CS_HCR) == 0);
492
493 /* hc is now in suspend state */
494 usb_log_debug2("HC should be in suspend state(%x).",
495 OHCI_RD(instance->registers->control));
496
497 /* Use HCCA */
498 OHCI_WR(instance->registers->hcca, addr_to_phys(instance->hcca));
499
500 /* Use queues */
501 OHCI_WR(instance->registers->bulk_head,
502 instance->lists[USB_TRANSFER_BULK].list_head_pa);
503 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").",
504 instance->lists[USB_TRANSFER_BULK].list_head,
505 instance->lists[USB_TRANSFER_BULK].list_head_pa);
506
507 OHCI_WR(instance->registers->control_head,
508 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
509 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").",
510 instance->lists[USB_TRANSFER_CONTROL].list_head,
511 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
512
513 /* Enable queues */
514 OHCI_SET(instance->registers->control, (C_PLE | C_IE | C_CLE | C_BLE));
515 usb_log_debug("Queues enabled(%x).",
516 OHCI_RD(instance->registers->control));
517
518 /* Enable interrupts */
519 if (instance->base.irq_cap >= 0) {
520 OHCI_WR(instance->registers->interrupt_enable,
521 OHCI_USED_INTERRUPTS);
522 usb_log_debug("Enabled interrupts: %x.",
523 OHCI_RD(instance->registers->interrupt_enable));
524 OHCI_WR(instance->registers->interrupt_enable, I_MI);
525 }
526
527 /* Set periodic start to 90% */
528 const uint32_t frame_length =
529 (fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK;
530 OHCI_WR(instance->registers->periodic_start,
531 ((frame_length / 10) * 9) & PS_MASK << PS_SHIFT);
532 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).",
533 OHCI_RD(instance->registers->periodic_start),
534 OHCI_RD(instance->registers->periodic_start), frame_length);
535 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
536 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).",
537 OHCI_RD(instance->registers->control));
538
539 return EOK;
540}
541
542/**
543 * Setup roothub as a virtual hub.
544 */
545int hc_setup_roothub(hc_device_t *hcd)
546{
547 return hc_setup_virtual_root_hub(hcd, USB_SPEED_FULL);
548}
549
550/** Initialize schedule queues
551 *
552 * @param[in] instance OHCI hc driver structure
553 * @return Error code
554 */
555int hc_init_transfer_lists(hc_t *instance)
556{
557 assert(instance);
558#define SETUP_ENDPOINT_LIST(type) \
559do { \
560 const char *name = usb_str_transfer_type(type); \
561 const int ret = endpoint_list_init(&instance->lists[type], name); \
562 if (ret != EOK) { \
563 usb_log_error("Failed to setup %s endpoint list: %s.", \
564 name, str_error(ret)); \
565 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
566 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
567 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
568 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
569 return ret; \
570 } \
571} while (0)
572
573 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
574 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
575 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
576 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
577#undef SETUP_ENDPOINT_LIST
578 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
579 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
580
581 return EOK;
582}
583
584/** Initialize memory structures used by the OHCI hcd.
585 *
586 * @param[in] instance OHCI hc driver structure.
587 * @return Error code.
588 */
589int hc_init_memory(hc_t *instance)
590{
591 assert(instance);
592
593 memset(&instance->rh, 0, sizeof(instance->rh));
594 /* Init queues */
595 int ret = hc_init_transfer_lists(instance);
596 if (ret != EOK) {
597 return ret;
598 }
599
600 /*Init HCCA */
601 instance->hcca = hcca_get();
602 if (instance->hcca == NULL)
603 return ENOMEM;
604 usb_log_debug2("OHCI HCCA initialized at %p.", instance->hcca);
605
606 for (unsigned i = 0; i < HCCA_INT_EP_COUNT; ++i) {
607 hcca_set_int_ep(instance->hcca, i,
608 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
609 }
610 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").",
611 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
612 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
613
614 if ((ret = ohci_bus_init(&instance->bus, instance))) {
615 usb_log_error("HC(%p): Failed to setup bus : %s",
616 instance, str_error(ret));
617 return ret;
618 }
619
620 hc_device_setup(&instance->base, (bus_t *) &instance->bus);
621
622 return EOK;
623}
624
625/**
626 * @}
627 */
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