source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 96e01fbc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 96e01fbc was 56fd7cf, checked in by Jiri Svoboda <jiri@…>, 13 years ago

Make ddf_dev_t and ddf_fun_t opaque. This further tighthens the DDF interface.
  • Property mode set to 100644
File size: 18.5 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbohcihc
30 * @{
31 */
32/** @file
33 * @brief OHCI Host controller driver routines
34 */
35
36#include <errno.h>
37#include <str_error.h>
38#include <adt/list.h>
39#include <libarch/ddi.h>
40
41#include <usb/debug.h>
42#include <usb/usb.h>
43#include <usb/ddfiface.h>
44
45#include "hc.h"
46#include "ohci_endpoint.h"
47
48#define OHCI_USED_INTERRUPTS \
49 (I_SO | I_WDH | I_UE | I_RHSC)
50
51static const irq_pio_range_t ohci_pio_ranges[] = {
52 {
53 .base = 0,
54 .size = sizeof(ohci_regs_t)
55 }
56};
57
58static const irq_cmd_t ohci_irq_commands[] = {
59 {
60 .cmd = CMD_PIO_READ_32,
61 .dstarg = 1,
62 .addr = NULL
63 },
64 {
65 .cmd = CMD_AND,
66 .srcarg = 1,
67 .dstarg = 2,
68 .value = 0
69 },
70 {
71 .cmd = CMD_PREDICATE,
72 .srcarg = 2,
73 .value = 2
74 },
75 {
76 .cmd = CMD_PIO_WRITE_A_32,
77 .srcarg = 1,
78 .addr = NULL
79 },
80 {
81 .cmd = CMD_ACCEPT
82 }
83};
84
85static void hc_gain_control(hc_t *instance);
86static void hc_start(hc_t *instance);
87static int hc_init_transfer_lists(hc_t *instance);
88static int hc_init_memory(hc_t *instance);
89static int interrupt_emulator(hc_t *instance);
90static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
91
92/** Get number of PIO ranges used in IRQ code.
93 * @return Number of ranges.
94 */
95size_t hc_irq_pio_range_count(void)
96{
97 return sizeof(ohci_pio_ranges) / sizeof(irq_pio_range_t);
98}
99
100/** Get number of commands used in IRQ code.
101 * @return Number of commands.
102 */
103size_t hc_irq_cmd_count(void)
104{
105 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
106}
107
108/** Generate IRQ code.
109 * @param[out] ranges PIO ranges buffer.
110 * @param[in] ranges_size Size of the ranges buffer (bytes).
111 * @param[out] cmds Commands buffer.
112 * @param[in] cmds_size Size of the commands buffer (bytes).
113 * @param[in] regs Physical address of device's registers.
114 * @param[in] reg_size Size of the register area (bytes).
115 *
116 * @return Error code.
117 */
118int
119hc_get_irq_code(irq_pio_range_t ranges[], size_t ranges_size, irq_cmd_t cmds[],
120 size_t cmds_size, uintptr_t regs, size_t reg_size)
121{
122 if ((ranges_size < sizeof(ohci_pio_ranges)) ||
123 (cmds_size < sizeof(ohci_irq_commands)) ||
124 (reg_size < sizeof(ohci_regs_t)))
125 return EOVERFLOW;
126
127 memcpy(ranges, ohci_pio_ranges, sizeof(ohci_pio_ranges));
128 ranges[0].base = regs;
129
130 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
131 ohci_regs_t *registers = (ohci_regs_t *) regs;
132 cmds[0].addr = (void *) &registers->interrupt_status;
133 cmds[3].addr = (void *) &registers->interrupt_status;
134 OHCI_WR(cmds[1].value, OHCI_USED_INTERRUPTS);
135
136 return EOK;
137}
138
139/** Announce OHCI root hub to the DDF
140 *
141 * @param[in] instance OHCI driver intance
142 * @param[in] hub_fun DDF fuction representing OHCI root hub
143 * @return Error code
144 */
145int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
146{
147 assert(instance);
148 assert(hub_fun);
149
150 /* Try to get address 1 for root hub. */
151 instance->rh.address = 1;
152 int ret = usb_device_manager_request_address(
153 &instance->generic.dev_manager, &instance->rh.address, false,
154 USB_SPEED_FULL);
155 if (ret != EOK) {
156 usb_log_error("Failed to get OHCI root hub address: %s\n",
157 str_error(ret));
158 return ret;
159 }
160
161#define CHECK_RET_UNREG_RETURN(ret, message...) \
162if (ret != EOK) { \
163 usb_log_error(message); \
164 usb_endpoint_manager_remove_ep( \
165 &instance->generic.ep_manager, instance->rh.address, 0, \
166 USB_DIRECTION_BOTH, NULL, NULL); \
167 usb_device_manager_release_address( \
168 &instance->generic.dev_manager, instance->rh.address); \
169 return ret; \
170} else (void)0
171
172 ret = usb_endpoint_manager_add_ep(
173 &instance->generic.ep_manager, instance->rh.address, 0,
174 USB_DIRECTION_BOTH, USB_TRANSFER_CONTROL, USB_SPEED_FULL, 64,
175 0, NULL, NULL);
176 CHECK_RET_UNREG_RETURN(ret,
177 "Failed to register root hub control endpoint: %s.\n",
178 str_error(ret));
179
180 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
181 CHECK_RET_UNREG_RETURN(ret,
182 "Failed to add root hub match-id: %s.\n", str_error(ret));
183
184 ret = ddf_fun_bind(hub_fun);
185 CHECK_RET_UNREG_RETURN(ret,
186 "Failed to bind root hub function: %s.\n", str_error(ret));
187
188 ret = usb_device_manager_bind_address(&instance->generic.dev_manager,
189 instance->rh.address, ddf_fun_get_handle(hub_fun));
190 if (ret != EOK)
191 usb_log_warning("Failed to bind root hub address: %s.\n",
192 str_error(ret));
193
194 return EOK;
195#undef CHECK_RET_RELEASE
196}
197
198/** Initialize OHCI hc driver structure
199 *
200 * @param[in] instance Memory place for the structure.
201 * @param[in] regs Address of the memory mapped I/O registers.
202 * @param[in] reg_size Size of the memory mapped area.
203 * @param[in] interrupts True if w interrupts should be used
204 * @return Error code
205 */
206int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
207{
208 assert(instance);
209
210#define CHECK_RET_RETURN(ret, message...) \
211if (ret != EOK) { \
212 usb_log_error(message); \
213 return ret; \
214} else (void)0
215
216 int ret =
217 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
218 CHECK_RET_RETURN(ret,
219 "Failed to gain access to device registers: %s.\n", str_error(ret));
220
221 list_initialize(&instance->pending_batches);
222
223 hcd_init(&instance->generic, USB_SPEED_FULL,
224 BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11);
225 instance->generic.private_data = instance;
226 instance->generic.schedule = hc_schedule;
227 instance->generic.ep_add_hook = ohci_endpoint_init;
228 instance->generic.ep_remove_hook = ohci_endpoint_fini;
229
230 ret = hc_init_memory(instance);
231 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
232 str_error(ret));
233#undef CHECK_RET_RETURN
234
235 fibril_mutex_initialize(&instance->guard);
236
237 hc_gain_control(instance);
238
239 if (!interrupts) {
240 instance->interrupt_emulator =
241 fibril_create((int(*)(void*))interrupt_emulator, instance);
242 fibril_add_ready(instance->interrupt_emulator);
243 }
244
245 rh_init(&instance->rh, instance->registers);
246 hc_start(instance);
247
248 return EOK;
249}
250
251void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
252{
253 assert(instance);
254 assert(ep);
255
256 endpoint_list_t *list = &instance->lists[ep->transfer_type];
257 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
258 assert(list);
259 assert(ohci_ep);
260
261 /* Enqueue ep */
262 switch (ep->transfer_type) {
263 case USB_TRANSFER_CONTROL:
264 OHCI_CLR(instance->registers->control, C_CLE);
265 endpoint_list_add_ep(list, ohci_ep);
266 OHCI_WR(instance->registers->control_current, 0);
267 OHCI_SET(instance->registers->control, C_CLE);
268 break;
269 case USB_TRANSFER_BULK:
270 OHCI_CLR(instance->registers->control, C_BLE);
271 endpoint_list_add_ep(list, ohci_ep);
272 OHCI_WR(instance->registers->bulk_current, 0);
273 OHCI_SET(instance->registers->control, C_BLE);
274 break;
275 case USB_TRANSFER_ISOCHRONOUS:
276 case USB_TRANSFER_INTERRUPT:
277 OHCI_CLR(instance->registers->control, C_PLE | C_IE);
278 endpoint_list_add_ep(list, ohci_ep);
279 OHCI_SET(instance->registers->control, C_PLE | C_IE);
280 break;
281 }
282}
283
284void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
285{
286 assert(instance);
287 assert(ep);
288
289 /* Dequeue ep */
290 endpoint_list_t *list = &instance->lists[ep->transfer_type];
291 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
292
293 assert(list);
294 assert(ohci_ep);
295 switch (ep->transfer_type) {
296 case USB_TRANSFER_CONTROL:
297 OHCI_CLR(instance->registers->control, C_CLE);
298 endpoint_list_remove_ep(list, ohci_ep);
299 OHCI_WR(instance->registers->control_current, 0);
300 OHCI_SET(instance->registers->control, C_CLE);
301 break;
302 case USB_TRANSFER_BULK:
303 OHCI_CLR(instance->registers->control, C_BLE);
304 endpoint_list_remove_ep(list, ohci_ep);
305 OHCI_WR(instance->registers->bulk_current, 0);
306 OHCI_SET(instance->registers->control, C_BLE);
307 break;
308 case USB_TRANSFER_ISOCHRONOUS:
309 case USB_TRANSFER_INTERRUPT:
310 OHCI_CLR(instance->registers->control, C_PLE | C_IE);
311 endpoint_list_remove_ep(list, ohci_ep);
312 OHCI_SET(instance->registers->control, C_PLE | C_IE);
313 break;
314 default:
315 break;
316 }
317}
318
319/** Add USB transfer to the schedule.
320 *
321 * @param[in] instance OHCI hc driver structure.
322 * @param[in] batch Batch representing the transfer.
323 * @return Error code.
324 */
325int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
326{
327 assert(hcd);
328 hc_t *instance = hcd->private_data;
329 assert(instance);
330
331 /* Check for root hub communication */
332 if (batch->ep->address == instance->rh.address) {
333 usb_log_debug("OHCI root hub request.\n");
334 rh_request(&instance->rh, batch);
335 return EOK;
336 }
337 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
338 if (!ohci_batch)
339 return ENOMEM;
340
341 fibril_mutex_lock(&instance->guard);
342 list_append(&ohci_batch->link, &instance->pending_batches);
343 ohci_transfer_batch_commit(ohci_batch);
344
345 /* Control and bulk schedules need a kick to start working */
346 switch (batch->ep->transfer_type)
347 {
348 case USB_TRANSFER_CONTROL:
349 OHCI_SET(instance->registers->command_status, CS_CLF);
350 break;
351 case USB_TRANSFER_BULK:
352 OHCI_SET(instance->registers->command_status, CS_BLF);
353 break;
354 default:
355 break;
356 }
357 fibril_mutex_unlock(&instance->guard);
358 return EOK;
359}
360
361/** Interrupt handling routine
362 *
363 * @param[in] instance OHCI hc driver structure.
364 * @param[in] status Value of the status register at the time of interrupt.
365 */
366void hc_interrupt(hc_t *instance, uint32_t status)
367{
368 status = OHCI_RD(status);
369 assert(instance);
370 if ((status & ~I_SF) == 0) /* ignore sof status */
371 return;
372 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
373 if (status & I_RHSC)
374 rh_interrupt(&instance->rh);
375
376 if (status & I_WDH) {
377 fibril_mutex_lock(&instance->guard);
378 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
379 OHCI_RD(instance->registers->hcca),
380 (void *) addr_to_phys(instance->hcca));
381 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
382 OHCI_RD(instance->registers->periodic_current));
383
384 link_t *current = list_first(&instance->pending_batches);
385 while (current && current != &instance->pending_batches.head) {
386 link_t *next = current->next;
387 ohci_transfer_batch_t *batch =
388 ohci_transfer_batch_from_link(current);
389
390 if (ohci_transfer_batch_is_complete(batch)) {
391 list_remove(current);
392 ohci_transfer_batch_finish_dispose(batch);
393 }
394
395 current = next;
396 }
397 fibril_mutex_unlock(&instance->guard);
398 }
399
400 if (status & I_UE) {
401 usb_log_fatal("Error like no other!\n");
402 hc_start(instance);
403 }
404
405}
406
407/** Check status register regularly
408 *
409 * @param[in] instance OHCI hc driver structure.
410 * @return Error code
411 */
412int interrupt_emulator(hc_t *instance)
413{
414 assert(instance);
415 usb_log_info("Started interrupt emulator.\n");
416 while (1) {
417 const uint32_t status = instance->registers->interrupt_status;
418 instance->registers->interrupt_status = status;
419 hc_interrupt(instance, status);
420 async_usleep(10000);
421 }
422 return EOK;
423}
424
425/** Turn off any (BIOS)driver that might be in control of the device.
426 *
427 * This function implements routines described in chapter 5.1.1.3 of the OHCI
428 * specification (page 40, pdf page 54).
429 *
430 * @param[in] instance OHCI hc driver structure.
431 */
432void hc_gain_control(hc_t *instance)
433{
434 assert(instance);
435
436 usb_log_debug("Requesting OHCI control.\n");
437 if (OHCI_RD(instance->registers->revision) & R_LEGACY_FLAG) {
438 /* Turn off legacy emulation, it should be enough to zero
439 * the lowest bit, but it caused problems. Thus clear all
440 * except GateA20 (causes restart on some hw).
441 * See page 145 of the specs for details.
442 */
443 volatile uint32_t *ohci_emulation_reg =
444 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
445 usb_log_debug("OHCI legacy register %p: %x.\n",
446 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));
447 /* Zero everything but A20State */
448 OHCI_CLR(*ohci_emulation_reg, ~0x100);
449 usb_log_debug(
450 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
451 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));
452 }
453
454 /* Interrupt routing enabled => smm driver is active */
455 if (OHCI_RD(instance->registers->control) & C_IR) {
456 usb_log_debug("SMM driver: request ownership change.\n");
457 OHCI_SET(instance->registers->command_status, CS_OCR);
458 /* Hope that SMM actually knows its stuff or we can hang here */
459 while (OHCI_RD(instance->registers->control & C_IR)) {
460 async_usleep(1000);
461 }
462 usb_log_info("SMM driver: Ownership taken.\n");
463 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
464 async_usleep(50000);
465 return;
466 }
467
468 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
469 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
470 if (hc_status != C_HCFS_RESET) {
471 usb_log_debug("BIOS driver found.\n");
472 if (hc_status == C_HCFS_OPERATIONAL) {
473 usb_log_info("BIOS driver: HC operational.\n");
474 return;
475 }
476 /* HC is suspended assert resume for 20ms */
477 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
478 async_usleep(20000);
479 usb_log_info("BIOS driver: HC resumed.\n");
480 return;
481 }
482
483 /* HC is in reset (hw startup) => no other driver
484 * maintain reset for at least the time specified in USB spec (50 ms)*/
485 usb_log_debug("Host controller found in reset state.\n");
486 async_usleep(50000);
487}
488
489/** OHCI hw initialization routine.
490 *
491 * @param[in] instance OHCI hc driver structure.
492 */
493void hc_start(hc_t *instance)
494{
495 /* OHCI guide page 42 */
496 assert(instance);
497 usb_log_debug2("Started hc initialization routine.\n");
498
499 /* Save contents of fm_interval register */
500 const uint32_t fm_interval = OHCI_RD(instance->registers->fm_interval);
501 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
502
503 /* Reset hc */
504 usb_log_debug2("HC reset.\n");
505 size_t time = 0;
506 OHCI_WR(instance->registers->command_status, CS_HCR);
507 while (OHCI_RD(instance->registers->command_status) & CS_HCR) {
508 async_usleep(10);
509 time += 10;
510 }
511 usb_log_debug2("HC reset complete in %zu us.\n", time);
512
513 /* Restore fm_interval */
514 OHCI_WR(instance->registers->fm_interval, fm_interval);
515 assert((OHCI_RD(instance->registers->command_status) & CS_HCR) == 0);
516
517 /* hc is now in suspend state */
518 usb_log_debug2("HC should be in suspend state(%x).\n",
519 OHCI_RD(instance->registers->control));
520
521 /* Use HCCA */
522 OHCI_WR(instance->registers->hcca, addr_to_phys(instance->hcca));
523
524 /* Use queues */
525 OHCI_WR(instance->registers->bulk_head,
526 instance->lists[USB_TRANSFER_BULK].list_head_pa);
527 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
528 instance->lists[USB_TRANSFER_BULK].list_head,
529 instance->lists[USB_TRANSFER_BULK].list_head_pa);
530
531 OHCI_WR(instance->registers->control_head,
532 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
533 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
534 instance->lists[USB_TRANSFER_CONTROL].list_head,
535 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
536
537 /* Enable queues */
538 OHCI_SET(instance->registers->control, (C_PLE | C_IE | C_CLE | C_BLE));
539 usb_log_debug("Queues enabled(%x).\n",
540 OHCI_RD(instance->registers->control));
541
542 /* Enable interrupts */
543 OHCI_WR(instance->registers->interrupt_enable, OHCI_USED_INTERRUPTS);
544 usb_log_debug("Enabled interrupts: %x.\n",
545 OHCI_RD(instance->registers->interrupt_enable));
546 OHCI_WR(instance->registers->interrupt_enable, I_MI);
547
548 /* Set periodic start to 90% */
549 const uint32_t frame_length =
550 (fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK;
551 OHCI_WR(instance->registers->periodic_start,
552 ((frame_length / 10) * 9) & PS_MASK << PS_SHIFT);
553 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
554 OHCI_RD(instance->registers->periodic_start),
555 OHCI_RD(instance->registers->periodic_start), frame_length);
556 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
557 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
558 OHCI_RD(instance->registers->control));
559}
560
561/** Initialize schedule queues
562 *
563 * @param[in] instance OHCI hc driver structure
564 * @return Error code
565 */
566int hc_init_transfer_lists(hc_t *instance)
567{
568 assert(instance);
569#define SETUP_ENDPOINT_LIST(type) \
570do { \
571 const char *name = usb_str_transfer_type(type); \
572 int ret = endpoint_list_init(&instance->lists[type], name); \
573 if (ret != EOK) { \
574 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
575 name, str_error(ret)); \
576 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
577 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
578 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
579 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
580 return ret; \
581 } \
582} while (0)
583
584 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
585 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
586 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
587 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
588#undef SETUP_ENDPOINT_LIST
589 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
590 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
591
592 return EOK;
593}
594
595/** Initialize memory structures used by the OHCI hcd.
596 *
597 * @param[in] instance OHCI hc driver structure.
598 * @return Error code.
599 */
600int hc_init_memory(hc_t *instance)
601{
602 assert(instance);
603
604 bzero(&instance->rh, sizeof(instance->rh));
605 /* Init queues */
606 const int ret = hc_init_transfer_lists(instance);
607 if (ret != EOK) {
608 return ret;
609 }
610
611 /*Init HCCA */
612 instance->hcca = hcca_get();
613 if (instance->hcca == NULL)
614 return ENOMEM;
615 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
616
617 for (unsigned i = 0; i < HCCA_INT_EP_COUNT; ++i) {
618 hcca_set_int_ep(instance->hcca, i,
619 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
620 }
621 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
622 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
623 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
624
625 return EOK;
626}
627
628/**
629 * @}
630 */
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