source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 933b0d7

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 933b0d7 was 933b0d7, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

USB: make bandwidth count function changeable

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File size: 18.6 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "ohci_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63static int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch);
64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
95 if (ret != EOK)
96 return ret;
97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
117/*----------------------------------------------------------------------------*/
118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
129 const usb_address_t hub_address =
130 device_keeper_get_free_address(
131 &instance->generic.dev_manager, USB_SPEED_FULL);
132 if (hub_address <= 0) {
133 usb_log_error("Failed to get OHCI root hub address: %s\n",
134 str_error(hub_address));
135 return hub_address;
136 }
137 instance->rh.address = hub_address;
138 usb_device_keeper_bind(
139 &instance->generic.dev_manager, hub_address, hub_fun->handle);
140
141#define CHECK_RET_RETURN(ret, message...) \
142if (ret != EOK) { \
143 usb_log_error(message); \
144 return ret; \
145} else (void)0
146 int ret = usb_endpoint_manager_add_ep(
147 &instance->generic.ep_manager, hub_address, 0, USB_DIRECTION_BOTH,
148 USB_TRANSFER_CONTROL, USB_SPEED_FULL, 64, 0);
149 CHECK_RET_RETURN(ret,
150 "Failed to register root hub control endpoint: %s.\n",
151 str_error(ret));
152
153 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
154 CHECK_RET_RETURN(ret,
155 "Failed to add root hub match-id: %s.\n", str_error(ret));
156
157 ret = ddf_fun_bind(hub_fun);
158 CHECK_RET_RETURN(ret,
159 "Failed to bind root hub function: %s.\n", str_error(ret));
160
161 return EOK;
162#undef CHECK_RET_RELEASE
163}
164/*----------------------------------------------------------------------------*/
165/** Initialize OHCI hc driver structure
166 *
167 * @param[in] instance Memory place for the structure.
168 * @param[in] regs Address of the memory mapped I/O registers.
169 * @param[in] reg_size Size of the memory mapped area.
170 * @param[in] interrupts True if w interrupts should be used
171 * @return Error code
172 */
173int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
174{
175 assert(instance);
176
177#define CHECK_RET_RETURN(ret, message...) \
178if (ret != EOK) { \
179 usb_log_error(message); \
180 return ret; \
181} else (void)0
182
183 int ret =
184 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
185 CHECK_RET_RETURN(ret,
186 "Failed to gain access to device registers: %s.\n", str_error(ret));
187
188 list_initialize(&instance->pending_batches);
189
190 ret = hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11,
191 bandwidth_count_usb11);
192 CHECK_RET_RETURN(ret, "Failed to initialize generic driver: %s.\n",
193 str_error(ret));
194 instance->generic.private_data = instance;
195 instance->generic.schedule = hc_schedule;
196 instance->generic.ep_add_hook = ohci_endpoint_init;
197
198 ret = hc_init_memory(instance);
199 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
200 str_error(ret));
201#undef CHECK_RET_RETURN
202
203 fibril_mutex_initialize(&instance->guard);
204
205 hc_gain_control(instance);
206
207 if (!interrupts) {
208 instance->interrupt_emulator =
209 fibril_create((int(*)(void*))interrupt_emulator, instance);
210 fibril_add_ready(instance->interrupt_emulator);
211 }
212
213 rh_init(&instance->rh, instance->registers);
214 hc_start(instance);
215
216 return EOK;
217}
218/*----------------------------------------------------------------------------*/
219void hc_enqueue_endpoint(hc_t *instance, endpoint_t *ep)
220{
221 endpoint_list_t *list = &instance->lists[ep->transfer_type];
222 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
223 /* Enqueue ep */
224 switch (ep->transfer_type) {
225 case USB_TRANSFER_CONTROL:
226 instance->registers->control &= ~C_CLE;
227 endpoint_list_add_ep(list, ohci_ep);
228 instance->registers->control_current = 0;
229 instance->registers->control |= C_CLE;
230 break;
231 case USB_TRANSFER_BULK:
232 instance->registers->control &= ~C_BLE;
233 endpoint_list_add_ep(list, ohci_ep);
234 instance->registers->control |= C_BLE;
235 break;
236 case USB_TRANSFER_ISOCHRONOUS:
237 case USB_TRANSFER_INTERRUPT:
238 instance->registers->control &= (~C_PLE & ~C_IE);
239 endpoint_list_add_ep(list, ohci_ep);
240 instance->registers->control |= C_PLE | C_IE;
241 break;
242 }
243}
244/*----------------------------------------------------------------------------*/
245void hc_dequeue_endpoint(hc_t *instance, endpoint_t *ep)
246{
247 /* Dequeue ep */
248 endpoint_list_t *list = &instance->lists[ep->transfer_type];
249 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
250 switch (ep->transfer_type) {
251 case USB_TRANSFER_CONTROL:
252 instance->registers->control &= ~C_CLE;
253 endpoint_list_remove_ep(list, ohci_ep);
254 instance->registers->control_current = 0;
255 instance->registers->control |= C_CLE;
256 break;
257 case USB_TRANSFER_BULK:
258 instance->registers->control &= ~C_BLE;
259 endpoint_list_remove_ep(list, ohci_ep);
260 instance->registers->control |= C_BLE;
261 break;
262 case USB_TRANSFER_ISOCHRONOUS:
263 case USB_TRANSFER_INTERRUPT:
264 instance->registers->control &= (~C_PLE & ~C_IE);
265 endpoint_list_remove_ep(list, ohci_ep);
266 instance->registers->control |= C_PLE | C_IE;
267 break;
268 default:
269 break;
270 }
271}
272/*----------------------------------------------------------------------------*/
273/** Add USB transfer to the schedule.
274 *
275 * @param[in] instance OHCI hc driver structure.
276 * @param[in] batch Batch representing the transfer.
277 * @return Error code.
278 */
279int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
280{
281 assert(hcd);
282 hc_t *instance = hcd->private_data;
283 assert(instance);
284
285 /* Check for root hub communication */
286 if (batch->ep->address == instance->rh.address) {
287 rh_request(&instance->rh, batch);
288 return EOK;
289 }
290 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
291 if (!ohci_batch)
292 return ENOMEM;
293
294 fibril_mutex_lock(&instance->guard);
295 list_append(&ohci_batch->link, &instance->pending_batches);
296 ohci_transfer_batch_commit(ohci_batch);
297
298 /* Control and bulk schedules need a kick to start working */
299 switch (batch->ep->transfer_type)
300 {
301 case USB_TRANSFER_CONTROL:
302 instance->registers->command_status |= CS_CLF;
303 break;
304 case USB_TRANSFER_BULK:
305 instance->registers->command_status |= CS_BLF;
306 break;
307 default:
308 break;
309 }
310 fibril_mutex_unlock(&instance->guard);
311 return EOK;
312}
313/*----------------------------------------------------------------------------*/
314/** Interrupt handling routine
315 *
316 * @param[in] instance OHCI hc driver structure.
317 * @param[in] status Value of the status register at the time of interrupt.
318 */
319void hc_interrupt(hc_t *instance, uint32_t status)
320{
321 assert(instance);
322 if ((status & ~I_SF) == 0) /* ignore sof status */
323 return;
324 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
325 if (status & I_RHSC)
326 rh_interrupt(&instance->rh);
327
328 if (status & I_WDH) {
329 fibril_mutex_lock(&instance->guard);
330 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
331 instance->registers->hcca,
332 (void *) addr_to_phys(instance->hcca));
333 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
334 instance->registers->periodic_current);
335
336 link_t *current = list_first(&instance->pending_batches);
337 while (current && current != &instance->pending_batches.head) {
338 link_t *next = current->next;
339 ohci_transfer_batch_t *batch =
340 ohci_transfer_batch_from_link(current);
341
342 if (ohci_transfer_batch_is_complete(batch)) {
343 list_remove(current);
344 ohci_transfer_batch_finish_dispose(batch);
345 }
346
347 current = next;
348 }
349 fibril_mutex_unlock(&instance->guard);
350 }
351
352 if (status & I_UE) {
353 usb_log_fatal("Error like no other!\n");
354 hc_start(instance);
355 }
356
357}
358/*----------------------------------------------------------------------------*/
359/** Check status register regularly
360 *
361 * @param[in] instance OHCI hc driver structure.
362 * @return Error code
363 */
364int interrupt_emulator(hc_t *instance)
365{
366 assert(instance);
367 usb_log_info("Started interrupt emulator.\n");
368 while (1) {
369 const uint32_t status = instance->registers->interrupt_status;
370 instance->registers->interrupt_status = status;
371 hc_interrupt(instance, status);
372 async_usleep(10000);
373 }
374 return EOK;
375}
376/*----------------------------------------------------------------------------*/
377/** Turn off any (BIOS)driver that might be in control of the device.
378 *
379 * This function implements routines described in chapter 5.1.1.3 of the OHCI
380 * specification (page 40, pdf page 54).
381 *
382 * @param[in] instance OHCI hc driver structure.
383 */
384void hc_gain_control(hc_t *instance)
385{
386 assert(instance);
387
388 usb_log_debug("Requesting OHCI control.\n");
389 if (instance->registers->revision & R_LEGACY_FLAG) {
390 /* Turn off legacy emulation, it should be enough to zero
391 * the lowest bit, but it caused problems. Thus clear all
392 * except GateA20 (causes restart on some hw).
393 * See page 145 of the specs for details.
394 */
395 volatile uint32_t *ohci_emulation_reg =
396 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
397 usb_log_debug("OHCI legacy register %p: %x.\n",
398 ohci_emulation_reg, *ohci_emulation_reg);
399 /* Zero everything but A20State */
400 *ohci_emulation_reg &= 0x100;
401 usb_log_debug(
402 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
403 ohci_emulation_reg, *ohci_emulation_reg);
404 }
405
406 /* Interrupt routing enabled => smm driver is active */
407 if (instance->registers->control & C_IR) {
408 usb_log_debug("SMM driver: request ownership change.\n");
409 instance->registers->command_status |= CS_OCR;
410 /* Hope that SMM actually knows its stuff or we can hang here */
411 while (instance->registers->control & C_IR) {
412 async_usleep(1000);
413 }
414 usb_log_info("SMM driver: Ownership taken.\n");
415 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
416 async_usleep(50000);
417 return;
418 }
419
420 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
421 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
422 if (hc_status != C_HCFS_RESET) {
423 usb_log_debug("BIOS driver found.\n");
424 if (hc_status == C_HCFS_OPERATIONAL) {
425 usb_log_info("BIOS driver: HC operational.\n");
426 return;
427 }
428 /* HC is suspended assert resume for 20ms, */
429 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
430 async_usleep(20000);
431 usb_log_info("BIOS driver: HC resumed.\n");
432 return;
433 }
434
435 /* HC is in reset (hw startup) => no other driver
436 * maintain reset for at least the time specified in USB spec (50 ms)*/
437 usb_log_debug("Host controller found in reset state.\n");
438 async_usleep(50000);
439}
440/*----------------------------------------------------------------------------*/
441/** OHCI hw initialization routine.
442 *
443 * @param[in] instance OHCI hc driver structure.
444 */
445void hc_start(hc_t *instance)
446{
447 /* OHCI guide page 42 */
448 assert(instance);
449 usb_log_debug2("Started hc initialization routine.\n");
450
451 /* Save contents of fm_interval register */
452 const uint32_t fm_interval = instance->registers->fm_interval;
453 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
454
455 /* Reset hc */
456 usb_log_debug2("HC reset.\n");
457 size_t time = 0;
458 instance->registers->command_status = CS_HCR;
459 while (instance->registers->command_status & CS_HCR) {
460 async_usleep(10);
461 time += 10;
462 }
463 usb_log_debug2("HC reset complete in %zu us.\n", time);
464
465 /* Restore fm_interval */
466 instance->registers->fm_interval = fm_interval;
467 assert((instance->registers->command_status & CS_HCR) == 0);
468
469 /* hc is now in suspend state */
470 usb_log_debug2("HC should be in suspend state(%x).\n",
471 instance->registers->control);
472
473 /* Use HCCA */
474 instance->registers->hcca = addr_to_phys(instance->hcca);
475
476 /* Use queues */
477 instance->registers->bulk_head =
478 instance->lists[USB_TRANSFER_BULK].list_head_pa;
479 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
480 instance->lists[USB_TRANSFER_BULK].list_head,
481 instance->lists[USB_TRANSFER_BULK].list_head_pa);
482
483 instance->registers->control_head =
484 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
485 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
486 instance->lists[USB_TRANSFER_CONTROL].list_head,
487 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
488
489 /* Enable queues */
490 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
491 usb_log_debug2("All queues enabled(%x).\n",
492 instance->registers->control);
493
494 /* Enable interrupts */
495 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
496 usb_log_debug2("Enabled interrupts: %x.\n",
497 instance->registers->interrupt_enable);
498 instance->registers->interrupt_enable = I_MI;
499
500 /* Set periodic start to 90% */
501 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
502 instance->registers->periodic_start = (frame_length / 10) * 9;
503 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
504 instance->registers->periodic_start,
505 instance->registers->periodic_start, frame_length);
506
507 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
508 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
509 instance->registers->control);
510}
511/*----------------------------------------------------------------------------*/
512/** Initialize schedule queues
513 *
514 * @param[in] instance OHCI hc driver structure
515 * @return Error code
516 */
517int hc_init_transfer_lists(hc_t *instance)
518{
519 assert(instance);
520#define SETUP_ENDPOINT_LIST(type) \
521do { \
522 const char *name = usb_str_transfer_type(type); \
523 int ret = endpoint_list_init(&instance->lists[type], name); \
524 if (ret != EOK) { \
525 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
526 name, str_error(ret)); \
527 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
528 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
529 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
530 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
531 return ret; \
532 } \
533} while (0)
534
535 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
536 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
537 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
538 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
539#undef SETUP_ENDPOINT_LIST
540 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
541 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
542
543 return EOK;
544}
545/*----------------------------------------------------------------------------*/
546/** Initialize memory structures used by the OHCI hcd.
547 *
548 * @param[in] instance OHCI hc driver structure.
549 * @return Error code.
550 */
551int hc_init_memory(hc_t *instance)
552{
553 assert(instance);
554
555 bzero(&instance->rh, sizeof(instance->rh));
556 /* Init queues */
557 const int ret = hc_init_transfer_lists(instance);
558 if (ret != EOK) {
559 return ret;
560 }
561
562 /*Init HCCA */
563 instance->hcca = malloc32(sizeof(hcca_t));
564 if (instance->hcca == NULL)
565 return ENOMEM;
566 bzero(instance->hcca, sizeof(hcca_t));
567 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
568
569 unsigned i = 0;
570 for (; i < 32; ++i) {
571 instance->hcca->int_ep[i] =
572 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
573 }
574 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
575 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
576 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
577
578 return EOK;
579}
580
581/**
582 * @}
583 */
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