source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 90dd59dc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 90dd59dc was 90dd59dc, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

ohci: implement schedule function, finish batch initialization
  • Property mode set to 100644
File size: 21.5 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "hcd_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63
64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
95 if (ret != EOK)
96 return ret;
97
98 /* Some bogus access to force create mapping. DO NOT remove,
99 * unless whole virtual addresses in irq is replaced
100 * NOTE: Compiler won't remove this as ohci_regs_t members
101 * are declared volatile.
102 *
103 * Introducing CMD_MEM set of IRQ code commands broke
104 * assumption that IRQ code does not cause page faults.
105 * If this happens during idling (THREAD == NULL)
106 * it causes kernel panic.
107 */
108 registers->revision;
109
110 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
111
112 void *address = (void*)&registers->interrupt_status;
113 cmds[0].addr = address;
114 cmds[3].addr = address;
115 return EOK;
116}
117/*----------------------------------------------------------------------------*/
118/** Announce OHCI root hub to the DDF
119 *
120 * @param[in] instance OHCI driver intance
121 * @param[in] hub_fun DDF fuction representing OHCI root hub
122 * @return Error code
123 */
124int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
125{
126 assert(instance);
127 assert(hub_fun);
128
129 const usb_address_t hub_address =
130 device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
131 if (hub_address <= 0) {
132 usb_log_error("Failed to get OHCI root hub address: %s\n",
133 str_error(hub_address));
134 return hub_address;
135 }
136 instance->rh.address = hub_address;
137 usb_device_keeper_bind(
138 &instance->manager, hub_address, hub_fun->handle);
139
140#define CHECK_RET_RELEASE(ret, message...) \
141if (ret != EOK) { \
142 usb_log_error(message); \
143 hc_remove_endpoint(instance, hub_address, 0, USB_DIRECTION_BOTH); \
144 usb_device_keeper_release(&instance->manager, hub_address); \
145 return ret; \
146} else (void)0
147
148 int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
149 USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
150 CHECK_RET_RELEASE(ret,
151 "Failed to add OHCI root hub endpoint 0: %s.\n", str_error(ret));
152
153 ret = ddf_fun_add_match_id(hub_fun, "usb&class=hub", 100);
154 CHECK_RET_RELEASE(ret,
155 "Failed to add root hub match-id: %s.\n", str_error(ret));
156
157 ret = ddf_fun_bind(hub_fun);
158 CHECK_RET_RELEASE(ret,
159 "Failed to bind root hub function: %s.\n", str_error(ret));
160
161 return EOK;
162#undef CHECK_RET_RELEASE
163}
164/*----------------------------------------------------------------------------*/
165static int schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
166{
167 assert(hcd);
168 return hc_schedule(hcd->private_data, batch);
169}
170/*----------------------------------------------------------------------------*/
171/** Initialize OHCI hc driver structure
172 *
173 * @param[in] instance Memory place for the structure.
174 * @param[in] regs Address of the memory mapped I/O registers.
175 * @param[in] reg_size Size of the memory mapped area.
176 * @param[in] interrupts True if w interrupts should be used
177 * @return Error code
178 */
179int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
180{
181 assert(instance);
182
183#define CHECK_RET_RETURN(ret, message...) \
184if (ret != EOK) { \
185 usb_log_error(message); \
186 return ret; \
187} else (void)0
188
189 int ret =
190 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
191 CHECK_RET_RETURN(ret,
192 "Failed to gain access to device registers: %s.\n", str_error(ret));
193
194 list_initialize(&instance->pending_batches);
195 usb_device_keeper_init(&instance->manager);
196
197 ret = usb_endpoint_manager_init(&instance->ep_manager,
198 BANDWIDTH_AVAILABLE_USB11);
199 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
200 str_error(ret));
201
202 ret = hcd_init(&instance->generic, BANDWIDTH_AVAILABLE_USB11);
203 instance->generic.private_data = instance;
204 instance->generic.schedule = schedule;
205 instance->generic.batch_init_hook = batch_init_ohci;
206 instance->generic.ep_add_hook = NULL;
207
208 ret = hc_init_memory(instance);
209 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
210 str_error(ret));
211#undef CHECK_RET_RETURN
212
213 fibril_mutex_initialize(&instance->guard);
214
215 hc_gain_control(instance);
216
217 if (!interrupts) {
218 instance->interrupt_emulator =
219 fibril_create((int(*)(void*))interrupt_emulator, instance);
220 fibril_add_ready(instance->interrupt_emulator);
221 }
222
223 rh_init(&instance->rh, instance->registers);
224 hc_start(instance);
225
226 return EOK;
227}
228/*----------------------------------------------------------------------------*/
229/** Create and register endpoint structures.
230 *
231 * @param[in] instance OHCI driver structure.
232 * @param[in] address USB address of the device.
233 * @param[in] endpoint USB endpoint number.
234 * @param[in] speed Communication speeed of the device.
235 * @param[in] type Endpoint's transfer type.
236 * @param[in] direction Endpoint's direction.
237 * @param[in] mps Maximum packet size the endpoint accepts.
238 * @param[in] size Maximum allowed buffer size.
239 * @param[in] interval Time between transfers(interrupt transfers only).
240 * @return Error code
241 */
242int hc_add_endpoint(
243 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
244 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
245 size_t mps, size_t size, unsigned interval)
246{
247 endpoint_t *ep =
248 endpoint_get(address, endpoint, direction, type, speed, mps);
249 if (ep == NULL)
250 return ENOMEM;
251
252 int ret = hcd_endpoint_assign(ep);
253 if (ret != EOK) {
254 endpoint_destroy(ep);
255 return ret;
256 }
257
258 ret = usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
259 if (ret != EOK) {
260 endpoint_destroy(ep);
261 return ret;
262 }
263
264 /* Enqueue hcd_ep */
265 switch (ep->transfer_type) {
266 case USB_TRANSFER_CONTROL:
267 instance->registers->control &= ~C_CLE;
268 endpoint_list_add_ep(
269 &instance->lists[ep->transfer_type], hcd_endpoint_get(ep));
270 instance->registers->control_current = 0;
271 instance->registers->control |= C_CLE;
272 break;
273 case USB_TRANSFER_BULK:
274 instance->registers->control &= ~C_BLE;
275 endpoint_list_add_ep(
276 &instance->lists[ep->transfer_type], hcd_endpoint_get(ep));
277 instance->registers->control |= C_BLE;
278 break;
279 case USB_TRANSFER_ISOCHRONOUS:
280 case USB_TRANSFER_INTERRUPT:
281 instance->registers->control &= (~C_PLE & ~C_IE);
282 endpoint_list_add_ep(
283 &instance->lists[ep->transfer_type], hcd_endpoint_get(ep));
284 instance->registers->control |= C_PLE | C_IE;
285 break;
286 }
287
288 return EOK;
289}
290/*----------------------------------------------------------------------------*/
291/** Dequeue and delete endpoint structures
292 *
293 * @param[in] instance OHCI hc driver structure.
294 * @param[in] address USB address of the device.
295 * @param[in] endpoint USB endpoint number.
296 * @param[in] direction Direction of the endpoint.
297 * @return Error code
298 */
299int hc_remove_endpoint(hc_t *instance, usb_address_t address,
300 usb_endpoint_t endpoint, usb_direction_t direction)
301{
302 assert(instance);
303 fibril_mutex_lock(&instance->guard);
304 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
305 address, endpoint, direction, NULL);
306 if (ep == NULL) {
307 usb_log_error("Endpoint unregister failed: No such EP.\n");
308 fibril_mutex_unlock(&instance->guard);
309 return ENOENT;
310 }
311
312 hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);
313 if (hcd_ep) {
314 /* Dequeue hcd_ep */
315 switch (ep->transfer_type) {
316 case USB_TRANSFER_CONTROL:
317 instance->registers->control &= ~C_CLE;
318 endpoint_list_remove_ep(
319 &instance->lists[ep->transfer_type], hcd_ep);
320 instance->registers->control_current = 0;
321 instance->registers->control |= C_CLE;
322 break;
323 case USB_TRANSFER_BULK:
324 instance->registers->control &= ~C_BLE;
325 endpoint_list_remove_ep(
326 &instance->lists[ep->transfer_type], hcd_ep);
327 instance->registers->control |= C_BLE;
328 break;
329 case USB_TRANSFER_ISOCHRONOUS:
330 case USB_TRANSFER_INTERRUPT:
331 instance->registers->control &= (~C_PLE & ~C_IE);
332 endpoint_list_remove_ep(
333 &instance->lists[ep->transfer_type], hcd_ep);
334 instance->registers->control |= C_PLE | C_IE;
335 break;
336 default:
337 break;
338 }
339 } else {
340 usb_log_warning("Endpoint without hcd equivalent structure.\n");
341 }
342 int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
343 address, endpoint, direction);
344 fibril_mutex_unlock(&instance->guard);
345 return ret;
346}
347/*----------------------------------------------------------------------------*/
348/** Get access to endpoint structures
349 *
350 * @param[in] instance OHCI hc driver structure.
351 * @param[in] address USB address of the device.
352 * @param[in] endpoint USB endpoint number.
353 * @param[in] direction Direction of the endpoint.
354 * @param[out] bw Reserved bandwidth.
355 * @return Error code
356 */
357endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
358 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
359{
360 assert(instance);
361 fibril_mutex_lock(&instance->guard);
362 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
363 address, endpoint, direction, bw);
364 fibril_mutex_unlock(&instance->guard);
365 return ep;
366}
367/*----------------------------------------------------------------------------*/
368/** Add USB transfer to the schedule.
369 *
370 * @param[in] instance OHCI hc driver structure.
371 * @param[in] batch Batch representing the transfer.
372 * @return Error code.
373 */
374int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
375{
376 assert(instance);
377 assert(batch);
378 assert(batch->ep);
379
380 /* Check for root hub communication */
381 if (batch->ep->address == instance->rh.address) {
382 rh_request(&instance->rh, batch);
383 return EOK;
384 }
385
386 fibril_mutex_lock(&instance->guard);
387 list_append(&batch->link, &instance->pending_batches);
388 batch_commit(batch);
389
390 /* Control and bulk schedules need a kick to start working */
391 switch (batch->ep->transfer_type)
392 {
393 case USB_TRANSFER_CONTROL:
394 instance->registers->command_status |= CS_CLF;
395 break;
396 case USB_TRANSFER_BULK:
397 instance->registers->command_status |= CS_BLF;
398 break;
399 default:
400 break;
401 }
402 fibril_mutex_unlock(&instance->guard);
403 return EOK;
404}
405/*----------------------------------------------------------------------------*/
406/** Interrupt handling routine
407 *
408 * @param[in] instance OHCI hc driver structure.
409 * @param[in] status Value of the status register at the time of interrupt.
410 */
411void hc_interrupt(hc_t *instance, uint32_t status)
412{
413 assert(instance);
414 if ((status & ~I_SF) == 0) /* ignore sof status */
415 return;
416 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
417 if (status & I_RHSC)
418 rh_interrupt(&instance->rh);
419
420 if (status & I_WDH) {
421 fibril_mutex_lock(&instance->guard);
422 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
423 instance->registers->hcca,
424 (void *) addr_to_phys(instance->hcca));
425 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
426 instance->registers->periodic_current);
427
428 link_t *current = instance->pending_batches.head.next;
429 while (current != &instance->pending_batches.head) {
430 link_t *next = current->next;
431 usb_transfer_batch_t *batch =
432 usb_transfer_batch_from_link(current);
433
434 if (batch_is_complete(batch)) {
435 list_remove(current);
436 usb_transfer_batch_finish(batch);
437 }
438
439 current = next;
440 }
441 fibril_mutex_unlock(&instance->guard);
442 }
443
444 if (status & I_UE) {
445 hc_start(instance);
446 }
447
448}
449/*----------------------------------------------------------------------------*/
450/** Check status register regularly
451 *
452 * @param[in] instance OHCI hc driver structure.
453 * @return Error code
454 */
455int interrupt_emulator(hc_t *instance)
456{
457 assert(instance);
458 usb_log_info("Started interrupt emulator.\n");
459 while (1) {
460 const uint32_t status = instance->registers->interrupt_status;
461 instance->registers->interrupt_status = status;
462 hc_interrupt(instance, status);
463 async_usleep(10000);
464 }
465 return EOK;
466}
467/*----------------------------------------------------------------------------*/
468/** Turn off any (BIOS)driver that might be in control of the device.
469 *
470 * This function implements routines described in chapter 5.1.1.3 of the OHCI
471 * specification (page 40, pdf page 54).
472 *
473 * @param[in] instance OHCI hc driver structure.
474 */
475void hc_gain_control(hc_t *instance)
476{
477 assert(instance);
478
479 usb_log_debug("Requesting OHCI control.\n");
480 if (instance->registers->revision & R_LEGACY_FLAG) {
481 /* Turn off legacy emulation, it should be enough to zero
482 * the lowest bit, but it caused problems. Thus clear all
483 * except GateA20 (causes restart on some hw).
484 * See page 145 of the specs for details.
485 */
486 volatile uint32_t *ohci_emulation_reg =
487 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
488 usb_log_debug("OHCI legacy register %p: %x.\n",
489 ohci_emulation_reg, *ohci_emulation_reg);
490 /* Zero everything but A20State */
491 *ohci_emulation_reg &= 0x100;
492 usb_log_debug(
493 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
494 ohci_emulation_reg, *ohci_emulation_reg);
495 }
496
497 /* Interrupt routing enabled => smm driver is active */
498 if (instance->registers->control & C_IR) {
499 usb_log_debug("SMM driver: request ownership change.\n");
500 instance->registers->command_status |= CS_OCR;
501 /* Hope that SMM actually knows its stuff or we can hang here */
502 while (instance->registers->control & C_IR) {
503 async_usleep(1000);
504 }
505 usb_log_info("SMM driver: Ownership taken.\n");
506 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
507 async_usleep(50000);
508 return;
509 }
510
511 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
512 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
513 if (hc_status != C_HCFS_RESET) {
514 usb_log_debug("BIOS driver found.\n");
515 if (hc_status == C_HCFS_OPERATIONAL) {
516 usb_log_info("BIOS driver: HC operational.\n");
517 return;
518 }
519 /* HC is suspended assert resume for 20ms, */
520 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
521 async_usleep(20000);
522 usb_log_info("BIOS driver: HC resumed.\n");
523 return;
524 }
525
526 /* HC is in reset (hw startup) => no other driver
527 * maintain reset for at least the time specified in USB spec (50 ms)*/
528 usb_log_debug("Host controller found in reset state.\n");
529 async_usleep(50000);
530}
531/*----------------------------------------------------------------------------*/
532/** OHCI hw initialization routine.
533 *
534 * @param[in] instance OHCI hc driver structure.
535 */
536void hc_start(hc_t *instance)
537{
538 /* OHCI guide page 42 */
539 assert(instance);
540 usb_log_debug2("Started hc initialization routine.\n");
541
542 /* Save contents of fm_interval register */
543 const uint32_t fm_interval = instance->registers->fm_interval;
544 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
545
546 /* Reset hc */
547 usb_log_debug2("HC reset.\n");
548 size_t time = 0;
549 instance->registers->command_status = CS_HCR;
550 while (instance->registers->command_status & CS_HCR) {
551 async_usleep(10);
552 time += 10;
553 }
554 usb_log_debug2("HC reset complete in %zu us.\n", time);
555
556 /* Restore fm_interval */
557 instance->registers->fm_interval = fm_interval;
558 assert((instance->registers->command_status & CS_HCR) == 0);
559
560 /* hc is now in suspend state */
561 usb_log_debug2("HC should be in suspend state(%x).\n",
562 instance->registers->control);
563
564 /* Use HCCA */
565 instance->registers->hcca = addr_to_phys(instance->hcca);
566
567 /* Use queues */
568 instance->registers->bulk_head =
569 instance->lists[USB_TRANSFER_BULK].list_head_pa;
570 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
571 instance->lists[USB_TRANSFER_BULK].list_head,
572 instance->lists[USB_TRANSFER_BULK].list_head_pa);
573
574 instance->registers->control_head =
575 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
576 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
577 instance->lists[USB_TRANSFER_CONTROL].list_head,
578 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
579
580 /* Enable queues */
581 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
582 usb_log_debug2("All queues enabled(%x).\n",
583 instance->registers->control);
584
585 /* Enable interrupts */
586 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
587 usb_log_debug2("Enabled interrupts: %x.\n",
588 instance->registers->interrupt_enable);
589 instance->registers->interrupt_enable = I_MI;
590
591 /* Set periodic start to 90% */
592 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
593 instance->registers->periodic_start = (frame_length / 10) * 9;
594 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
595 instance->registers->periodic_start,
596 instance->registers->periodic_start, frame_length);
597
598 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
599 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
600 instance->registers->control);
601}
602/*----------------------------------------------------------------------------*/
603/** Initialize schedule queues
604 *
605 * @param[in] instance OHCI hc driver structure
606 * @return Error code
607 */
608int hc_init_transfer_lists(hc_t *instance)
609{
610 assert(instance);
611#define SETUP_ENDPOINT_LIST(type) \
612do { \
613 const char *name = usb_str_transfer_type(type); \
614 int ret = endpoint_list_init(&instance->lists[type], name); \
615 if (ret != EOK) { \
616 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
617 name, str_error(ret)); \
618 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
619 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
620 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
621 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
622 return ret; \
623 } \
624} while (0)
625
626 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
627 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
628 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
629 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
630#undef SETUP_ENDPOINT_LIST
631 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
632 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
633
634 return EOK;
635}
636/*----------------------------------------------------------------------------*/
637/** Initialize memory structures used by the OHCI hcd.
638 *
639 * @param[in] instance OHCI hc driver structure.
640 * @return Error code.
641 */
642int hc_init_memory(hc_t *instance)
643{
644 assert(instance);
645
646 bzero(&instance->rh, sizeof(instance->rh));
647 /* Init queues */
648 const int ret = hc_init_transfer_lists(instance);
649 if (ret != EOK) {
650 return ret;
651 }
652
653 /*Init HCCA */
654 instance->hcca = malloc32(sizeof(hcca_t));
655 if (instance->hcca == NULL)
656 return ENOMEM;
657 bzero(instance->hcca, sizeof(hcca_t));
658 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
659
660 unsigned i = 0;
661 for (; i < 32; ++i) {
662 instance->hcca->int_ep[i] =
663 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
664 }
665 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
666 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
667 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
668
669 return EOK;
670}
671
672/**
673 * @}
674 */
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