source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 6210a333

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 6210a333 was 6210a333, checked in by Jan Vesely <jano.vesely@…>, 12 years ago

uhci, ohci: Cleanup irq code generation.
  • Property mode set to 100644
File size: 16.8 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbohcihc
30 * @{
31 */
32/** @file
33 * @brief OHCI Host controller driver routines
34 */
35
36#include <errno.h>
37#include <str_error.h>
38#include <adt/list.h>
39#include <libarch/ddi.h>
40
41#include <usb/debug.h>
42#include <usb/usb.h>
43
44#include "macros.h"
45#include "hc.h"
46#include "ohci_endpoint.h"
47
48#define OHCI_USED_INTERRUPTS \
49 (I_SO | I_WDH | I_UE | I_RHSC)
50
51static const irq_pio_range_t ohci_pio_ranges[] = {
52 {
53 .base = 0,
54 .size = sizeof(ohci_regs_t)
55 }
56};
57
58static const irq_cmd_t ohci_irq_commands[] = {
59 {
60 .cmd = CMD_PIO_READ_32,
61 .dstarg = 1,
62 .addr = NULL
63 },
64 {
65 .cmd = CMD_AND,
66 .srcarg = 1,
67 .dstarg = 2,
68 .value = 0
69 },
70 {
71 .cmd = CMD_PREDICATE,
72 .srcarg = 2,
73 .value = 2
74 },
75 {
76 .cmd = CMD_PIO_WRITE_A_32,
77 .srcarg = 1,
78 .addr = NULL
79 },
80 {
81 .cmd = CMD_ACCEPT
82 }
83};
84
85static void hc_gain_control(hc_t *instance);
86static void hc_start(hc_t *instance);
87static int hc_init_transfer_lists(hc_t *instance);
88static int hc_init_memory(hc_t *instance);
89static int interrupt_emulator(hc_t *instance);
90
91/** Generate IRQ code.
92 * @param[out] ranges PIO ranges buffer.
93 * @param[in] ranges_size Size of the ranges buffer (bytes).
94 * @param[out] cmds Commands buffer.
95 * @param[in] cmds_size Size of the commands buffer (bytes).
96 * @param[in] regs Device's register range.
97 *
98 * @return Error code.
99 */
100int hc_gen_irq_code(irq_code_t *code, addr_range_t *regs)
101{
102 assert(code);
103 if (RNGSZ(*regs) < sizeof(ohci_regs_t))
104 return EOVERFLOW;
105
106 code->ranges = malloc(sizeof(ohci_pio_ranges));
107 if (code->ranges == NULL)
108 return ENOMEM;
109
110 code->cmds = malloc(sizeof(ohci_irq_commands));
111 if (code->cmds == NULL) {
112 free(code->ranges);
113 return ENOMEM;
114 }
115
116 code->rangecount = ARRAY_SIZE(ohci_pio_ranges);
117 code->cmdcount = ARRAY_SIZE(ohci_irq_commands);
118
119 memcpy(code->ranges, ohci_pio_ranges, sizeof(ohci_pio_ranges));
120 code->ranges[0].base = RNGABS(*regs);
121
122 memcpy(code->cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
123 ohci_regs_t *registers = (ohci_regs_t *) RNGABSPTR(*regs);
124 code->cmds[0].addr = (void *) &registers->interrupt_status;
125 code->cmds[3].addr = (void *) &registers->interrupt_status;
126 OHCI_WR(code->cmds[1].value, OHCI_USED_INTERRUPTS);
127
128 return EOK;
129}
130
131/** Register interrupt handler.
132 *
133 * @param[in] device Host controller DDF device
134 * @param[in] regs Register range
135 * @param[in] irq Interrupt number
136 * @paran[in] handler Interrupt handler
137 *
138 * @return EOK on success or negative error code
139 */
140int hc_register_irq_handler(ddf_dev_t *device, addr_range_t *regs, int irq,
141 interrupt_handler_t handler)
142{
143 irq_code_t irq_code = { 0 };
144
145 int ret = hc_gen_irq_code(&irq_code, regs);
146 if (ret != EOK) {
147 usb_log_error("Failed to generate IRQ code: %s.\n",
148 str_error(ret));
149 return ret;
150 }
151
152 //TODO we leak memory here
153
154 /* Register handler to avoid interrupt lockup */
155 ret = register_interrupt_handler(device, irq, handler, &irq_code);
156 if (ret != EOK) {
157 usb_log_error("Failed to register interrupt handler: %s.\n",
158 str_error(ret));
159 return ret;
160 }
161
162 return EOK;
163}
164
165/** Initialize OHCI hc driver structure
166 *
167 * @param[in] instance Memory place for the structure.
168 * @param[in] regs Device's I/O registers range.
169 * @param[in] interrupts True if w interrupts should be used
170 * @return Error code
171 */
172int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts)
173{
174 assert(instance);
175
176 int ret = pio_enable_range(regs, (void **) &instance->registers);
177 if (ret != EOK) {
178 usb_log_error("Failed to gain access to device registers: %s.\n",
179 str_error(ret));
180 return ret;
181 }
182
183 list_initialize(&instance->pending_batches);
184 fibril_mutex_initialize(&instance->guard);
185
186 ret = hc_init_memory(instance);
187 if (ret != EOK) {
188 usb_log_error("Failed to create OHCI memory structures: %s.\n",
189 str_error(ret));
190 return ret;
191 }
192
193 hc_gain_control(instance);
194
195 if (!interrupts) {
196 instance->interrupt_emulator =
197 fibril_create((int(*)(void*))interrupt_emulator, instance);
198 fibril_add_ready(instance->interrupt_emulator);
199 }
200
201 ohci_rh_init(&instance->rh, instance->registers, "ohci rh");
202 hc_start(instance);
203
204 return EOK;
205}
206
207void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
208{
209 assert(instance);
210 assert(ep);
211
212 endpoint_list_t *list = &instance->lists[ep->transfer_type];
213 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
214 assert(list);
215 assert(ohci_ep);
216
217 /* Enqueue ep */
218 switch (ep->transfer_type) {
219 case USB_TRANSFER_CONTROL:
220 OHCI_CLR(instance->registers->control, C_CLE);
221 endpoint_list_add_ep(list, ohci_ep);
222 OHCI_WR(instance->registers->control_current, 0);
223 OHCI_SET(instance->registers->control, C_CLE);
224 break;
225 case USB_TRANSFER_BULK:
226 OHCI_CLR(instance->registers->control, C_BLE);
227 endpoint_list_add_ep(list, ohci_ep);
228 OHCI_WR(instance->registers->bulk_current, 0);
229 OHCI_SET(instance->registers->control, C_BLE);
230 break;
231 case USB_TRANSFER_ISOCHRONOUS:
232 case USB_TRANSFER_INTERRUPT:
233 OHCI_CLR(instance->registers->control, C_PLE | C_IE);
234 endpoint_list_add_ep(list, ohci_ep);
235 OHCI_SET(instance->registers->control, C_PLE | C_IE);
236 break;
237 }
238}
239
240void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
241{
242 assert(instance);
243 assert(ep);
244
245 /* Dequeue ep */
246 endpoint_list_t *list = &instance->lists[ep->transfer_type];
247 ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
248
249 assert(list);
250 assert(ohci_ep);
251 switch (ep->transfer_type) {
252 case USB_TRANSFER_CONTROL:
253 OHCI_CLR(instance->registers->control, C_CLE);
254 endpoint_list_remove_ep(list, ohci_ep);
255 OHCI_WR(instance->registers->control_current, 0);
256 OHCI_SET(instance->registers->control, C_CLE);
257 break;
258 case USB_TRANSFER_BULK:
259 OHCI_CLR(instance->registers->control, C_BLE);
260 endpoint_list_remove_ep(list, ohci_ep);
261 OHCI_WR(instance->registers->bulk_current, 0);
262 OHCI_SET(instance->registers->control, C_BLE);
263 break;
264 case USB_TRANSFER_ISOCHRONOUS:
265 case USB_TRANSFER_INTERRUPT:
266 OHCI_CLR(instance->registers->control, C_PLE | C_IE);
267 endpoint_list_remove_ep(list, ohci_ep);
268 OHCI_SET(instance->registers->control, C_PLE | C_IE);
269 break;
270 default:
271 break;
272 }
273}
274
275/** Add USB transfer to the schedule.
276 *
277 * @param[in] instance OHCI hc driver structure.
278 * @param[in] batch Batch representing the transfer.
279 * @return Error code.
280 */
281int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
282{
283 assert(hcd);
284 hc_t *instance = hcd->driver.data;
285 assert(instance);
286
287 /* Check for root hub communication */
288 if (batch->ep->address == ohci_rh_get_address(&instance->rh)) {
289 usb_log_debug("OHCI root hub request.\n");
290 return ohci_rh_schedule(&instance->rh, batch);
291 }
292 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
293 if (!ohci_batch)
294 return ENOMEM;
295
296 fibril_mutex_lock(&instance->guard);
297 list_append(&ohci_batch->link, &instance->pending_batches);
298 ohci_transfer_batch_commit(ohci_batch);
299
300 /* Control and bulk schedules need a kick to start working */
301 switch (batch->ep->transfer_type)
302 {
303 case USB_TRANSFER_CONTROL:
304 OHCI_SET(instance->registers->command_status, CS_CLF);
305 break;
306 case USB_TRANSFER_BULK:
307 OHCI_SET(instance->registers->command_status, CS_BLF);
308 break;
309 default:
310 break;
311 }
312 fibril_mutex_unlock(&instance->guard);
313 return EOK;
314}
315
316/** Interrupt handling routine
317 *
318 * @param[in] instance OHCI hc driver structure.
319 * @param[in] status Value of the status register at the time of interrupt.
320 */
321void hc_interrupt(hc_t *instance, uint32_t status)
322{
323 status = OHCI_RD(status);
324 assert(instance);
325 if ((status & ~I_SF) == 0) /* ignore sof status */
326 return;
327 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
328 if (status & I_RHSC)
329 ohci_rh_interrupt(&instance->rh);
330
331 if (status & I_WDH) {
332 fibril_mutex_lock(&instance->guard);
333 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
334 OHCI_RD(instance->registers->hcca),
335 (void *) addr_to_phys(instance->hcca));
336 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
337 OHCI_RD(instance->registers->periodic_current));
338
339 link_t *current = list_first(&instance->pending_batches);
340 while (current && current != &instance->pending_batches.head) {
341 link_t *next = current->next;
342 ohci_transfer_batch_t *batch =
343 ohci_transfer_batch_from_link(current);
344
345 if (ohci_transfer_batch_is_complete(batch)) {
346 list_remove(current);
347 ohci_transfer_batch_finish_dispose(batch);
348 }
349
350 current = next;
351 }
352 fibril_mutex_unlock(&instance->guard);
353 }
354
355 if (status & I_UE) {
356 usb_log_fatal("Error like no other!\n");
357 hc_start(instance);
358 }
359
360}
361
362/** Check status register regularly
363 *
364 * @param[in] instance OHCI hc driver structure.
365 * @return Error code
366 */
367int interrupt_emulator(hc_t *instance)
368{
369 assert(instance);
370 usb_log_info("Started interrupt emulator.\n");
371 while (1) {
372 const uint32_t status = instance->registers->interrupt_status;
373 instance->registers->interrupt_status = status;
374 hc_interrupt(instance, status);
375 async_usleep(10000);
376 }
377 return EOK;
378}
379
380/** Turn off any (BIOS)driver that might be in control of the device.
381 *
382 * This function implements routines described in chapter 5.1.1.3 of the OHCI
383 * specification (page 40, pdf page 54).
384 *
385 * @param[in] instance OHCI hc driver structure.
386 */
387void hc_gain_control(hc_t *instance)
388{
389 assert(instance);
390
391 usb_log_debug("Requesting OHCI control.\n");
392 if (OHCI_RD(instance->registers->revision) & R_LEGACY_FLAG) {
393 /* Turn off legacy emulation, it should be enough to zero
394 * the lowest bit, but it caused problems. Thus clear all
395 * except GateA20 (causes restart on some hw).
396 * See page 145 of the specs for details.
397 */
398 volatile uint32_t *ohci_emulation_reg =
399 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
400 usb_log_debug("OHCI legacy register %p: %x.\n",
401 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));
402 /* Zero everything but A20State */
403 OHCI_CLR(*ohci_emulation_reg, ~0x100);
404 usb_log_debug(
405 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
406 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));
407 }
408
409 /* Interrupt routing enabled => smm driver is active */
410 if (OHCI_RD(instance->registers->control) & C_IR) {
411 usb_log_debug("SMM driver: request ownership change.\n");
412 OHCI_SET(instance->registers->command_status, CS_OCR);
413 /* Hope that SMM actually knows its stuff or we can hang here */
414 while (OHCI_RD(instance->registers->control & C_IR)) {
415 async_usleep(1000);
416 }
417 usb_log_info("SMM driver: Ownership taken.\n");
418 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
419 async_usleep(50000);
420 return;
421 }
422
423 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
424 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
425 if (hc_status != C_HCFS_RESET) {
426 usb_log_debug("BIOS driver found.\n");
427 if (hc_status == C_HCFS_OPERATIONAL) {
428 usb_log_info("BIOS driver: HC operational.\n");
429 return;
430 }
431 /* HC is suspended assert resume for 20ms */
432 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
433 async_usleep(20000);
434 usb_log_info("BIOS driver: HC resumed.\n");
435 return;
436 }
437
438 /* HC is in reset (hw startup) => no other driver
439 * maintain reset for at least the time specified in USB spec (50 ms)*/
440 usb_log_debug("Host controller found in reset state.\n");
441 async_usleep(50000);
442}
443
444/** OHCI hw initialization routine.
445 *
446 * @param[in] instance OHCI hc driver structure.
447 */
448void hc_start(hc_t *instance)
449{
450 /* OHCI guide page 42 */
451 assert(instance);
452 usb_log_debug2("Started hc initialization routine.\n");
453
454 /* Save contents of fm_interval register */
455 const uint32_t fm_interval = OHCI_RD(instance->registers->fm_interval);
456 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
457
458 /* Reset hc */
459 usb_log_debug2("HC reset.\n");
460 size_t time = 0;
461 OHCI_WR(instance->registers->command_status, CS_HCR);
462 while (OHCI_RD(instance->registers->command_status) & CS_HCR) {
463 async_usleep(10);
464 time += 10;
465 }
466 usb_log_debug2("HC reset complete in %zu us.\n", time);
467
468 /* Restore fm_interval */
469 OHCI_WR(instance->registers->fm_interval, fm_interval);
470 assert((OHCI_RD(instance->registers->command_status) & CS_HCR) == 0);
471
472 /* hc is now in suspend state */
473 usb_log_debug2("HC should be in suspend state(%x).\n",
474 OHCI_RD(instance->registers->control));
475
476 /* Use HCCA */
477 OHCI_WR(instance->registers->hcca, addr_to_phys(instance->hcca));
478
479 /* Use queues */
480 OHCI_WR(instance->registers->bulk_head,
481 instance->lists[USB_TRANSFER_BULK].list_head_pa);
482 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
483 instance->lists[USB_TRANSFER_BULK].list_head,
484 instance->lists[USB_TRANSFER_BULK].list_head_pa);
485
486 OHCI_WR(instance->registers->control_head,
487 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
488 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
489 instance->lists[USB_TRANSFER_CONTROL].list_head,
490 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
491
492 /* Enable queues */
493 OHCI_SET(instance->registers->control, (C_PLE | C_IE | C_CLE | C_BLE));
494 usb_log_debug("Queues enabled(%x).\n",
495 OHCI_RD(instance->registers->control));
496
497 /* Enable interrupts */
498 OHCI_WR(instance->registers->interrupt_enable, OHCI_USED_INTERRUPTS);
499 usb_log_debug("Enabled interrupts: %x.\n",
500 OHCI_RD(instance->registers->interrupt_enable));
501 OHCI_WR(instance->registers->interrupt_enable, I_MI);
502
503 /* Set periodic start to 90% */
504 const uint32_t frame_length =
505 (fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK;
506 OHCI_WR(instance->registers->periodic_start,
507 ((frame_length / 10) * 9) & PS_MASK << PS_SHIFT);
508 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
509 OHCI_RD(instance->registers->periodic_start),
510 OHCI_RD(instance->registers->periodic_start), frame_length);
511 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
512 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
513 OHCI_RD(instance->registers->control));
514}
515
516/** Initialize schedule queues
517 *
518 * @param[in] instance OHCI hc driver structure
519 * @return Error code
520 */
521int hc_init_transfer_lists(hc_t *instance)
522{
523 assert(instance);
524#define SETUP_ENDPOINT_LIST(type) \
525do { \
526 const char *name = usb_str_transfer_type(type); \
527 const int ret = endpoint_list_init(&instance->lists[type], name); \
528 if (ret != EOK) { \
529 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
530 name, str_error(ret)); \
531 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
532 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
533 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
534 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
535 return ret; \
536 } \
537} while (0)
538
539 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
540 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
541 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
542 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
543#undef SETUP_ENDPOINT_LIST
544 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
545 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
546
547 return EOK;
548}
549
550/** Initialize memory structures used by the OHCI hcd.
551 *
552 * @param[in] instance OHCI hc driver structure.
553 * @return Error code.
554 */
555int hc_init_memory(hc_t *instance)
556{
557 assert(instance);
558
559 memset(&instance->rh, 0, sizeof(instance->rh));
560 /* Init queues */
561 const int ret = hc_init_transfer_lists(instance);
562 if (ret != EOK) {
563 return ret;
564 }
565
566 /*Init HCCA */
567 instance->hcca = hcca_get();
568 if (instance->hcca == NULL)
569 return ENOMEM;
570 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
571
572 for (unsigned i = 0; i < HCCA_INT_EP_COUNT; ++i) {
573 hcca_set_int_ep(instance->hcca, i,
574 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
575 }
576 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
577 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
578 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
579
580 return EOK;
581}
582
583/**
584 * @}
585 */
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